NXP Semiconductors P87LPC762BD,512
- Part No.:
- P87LPC762BD,512
- Manufacturer:
- NXP Semiconductors
- Category:
- Microcontrollers
- Package:
- 20-SOIC (0.295", 7.50mm Width)
- Datasheet:
-
P87LPC762BD,512.pdf
- Description:
- IC MCU 8BIT 2KB OTP 20SO
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
P87LPC762BD,512 from NXP Semiconductors (formerly Philips) is a 20-pin, low-power, OTP-based 80C51-compatible microcontroller with 2 kbyte on-chip EPROM, 128 byte RAM, dual 16-bit timers, two analog comparators, full-duplex UART, and I²C interface - designed for cost-sensitive embedded control in industrial sensors and appliance UIs.
For engineers reviewing the P87LPC762BD,512 datasheet, P87LPC762BD,512 pinout, P87LPC762BD,512 application, or P87LPC762BD,512 equivalent, key selection criteria include its 2.7–6.0 V operating range, programmable port configurations (quasi-bidirectional/open-drain/push-pull), on-chip RC oscillator eliminating external crystals, and 1 µA typical Power Down current.
Technical Context
The P87LPC762BD,512 implements an accelerated 80C51 core executing all instructions (except MUL/DIV) in 300–600 ns at 20 MHz, with CPU clock division via CLKR/DIVM registers and independent watchdog oscillator enabling fail-detect functionality. Its memory map includes 2 kbyte OTP code space, 32-byte customer code area, and 128-byte RAM - no external data memory support.
Peripheral integration includes two analog comparators with selectable reference and interrupt capability, eight-keypad-interrupt inputs on Port 0, four interrupt priority levels, and configurable I/O with Schmitt-trigger inputs, LED drive (20 mA), and controlled slew-rate outputs (≥10 ns ramp time) to reduce EMI.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Core Architecture | Accelerated 80C51 CPU - executes instructions at 2× speed of standard 80C51; 6-clock-cycle machine cycle. |
| Memory | 2 kbyte on-chip OTP EPROM + 128 byte RAM + 32-byte customer code space - enables device serialization and parameter storage without external memory. |
| Operating Voltage | 2.7 V to 6.0 V - supports direct battery operation (e.g., 3 V coin cell or 5 V rail) with brownout detection at two preset thresholds. |
| Timers/Counters | Two 16-bit timers (T0, T1) - each可 configured to toggle a port pin on overflow for precise timing or PWM generation. |
| Communication Interfaces | Full-duplex UART + I²C bus (SCL/SDA on P1.2/P1.3) - enables serial host communication and sensor/EEPROM interfacing with open-drain compliance. |
| Power Management | Idle and Power Down modes; typical Power Down current = 1 µA - extends battery life in intermittent-sensing applications. |
| Analog Functions | Two independent analog comparators (CMP1, CMP2) with internal reference (CMPREF) and interrupt capability - replaces discrete comparator circuits in threshold-detection systems. |
Pinout & Package
Package: 20-pin SO (Small Outline) per SOT163–1 drawing; RoHS-compliant plastic body, 7.5 mm width, 1.27 mm pitch.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (CMP2/P0.0) | Comparator 2 output / Port 0 bit 0 | Dual-function pin: delivers comparator decision logic or serves as general-purpose I/O with configurable drive mode. |
| 13 (P0.6/CMP1) | Comparator 1 output / Port 0 bit 6 | Active-high comparator result output; also usable as LED driver (20 mA sink/source) or interrupt-capable input. |
| 14 (P0.7/T1) | Timer 1 external count input / overflow output | Counts external pulses or toggles on timer overflow - enables event counting or hardware-generated square waves. |
| 16 (P0.5/CMPREF) | Comparator reference (negative) input | Accepts internal or external reference voltage - sets comparison threshold for both comparators simultaneously. |
| 9 (SDA/INT0/P1.3) | I²C data / External interrupt 0 / Port 1 bit 3 | Open-drain I²C node with interrupt wake-up capability - supports multi-drop bus and low-power event-driven wake. |
| 10 (SCL/T0/P1.2) | I²C clock / Timer 0 external count input / Port 1 bit 2 | Open-drain clock line; also provides edge-triggered counter input for frequency measurement or pulse-width capture. |
| 4 (RST/P1.5) | Reset input / Port 1 bit 5 (Schmitt trigger only) | Active-low reset with on-chip power-on reset - eliminates external RC network; when repurposed, functions as noise-immune digital input. |
| 6 (X1/P2.1) | Oscillator input / Port 2 bit 1 | Accepts crystal, resonator, or external clock; if RC oscillator selected, becomes general-purpose Schmitt-trigger input. |
Key Features
| Feature | Design Value |
|---|---|
| Configurable I/O drive modes | Per-pin selection of quasi-bidirectional, open-drain, push-pull, or input-only - eliminates external pull-ups and level shifters in mixed-voltage designs. |
| On-chip RC oscillator | Eliminates need for external crystal/resonator - reduces BOM cost and PCB area; supports 20 MHz (5 V) or 10 MHz (3 V) operation. |
| LED drive capability | All 15+ I/O pins source/sink up to 20 mA - directly drives indicators or small displays without external drivers. |
| Watchdog timer with fail-detect | Dedicated on-chip oscillator enables reliable timeout and crystal failure detection - prevents system lockup without external components. |
| Keypad interrupt (KBI) | Eight-port-input scan with automatic wake-from-Power-Down - enables ultra-low-power touch/button interfaces in battery-powered devices. |
Applications
| Industrial Sensor Node | Home Appliance Control Panel |
|---|---|
Use Scenario: Standalone temperature/humidity monitor with local display and I²C sensor interface. IC Role / Device Role / Timing Role: Main controller executing sensor polling, ADC emulation via comparator, UART logging, and LED status indication. Use Value: Integrated comparators replace external op-amps; on-chip RC oscillator cuts BOM cost; 1 µA Power Down enables multi-year battery life. |
Use Scenario: Microwave oven or washing machine front-panel with keypad, display, and motor control signals. IC Role / Device Role / Timing Role: User interface manager handling button scan (KBI), LED/digit drive, buzzer timing, and serial command relay to main MCU. Use Value: 20 mA per pin drives LEDs directly; programmable slew rate reduces EMI near sensitive RF modules; dual timers manage precise buzzer tones and display refresh. |
| Low-Cost Power Metering Module | Smart Lighting Dimmer Switch |
Use Scenario: DIN-rail mounted energy monitor using current transformer and voltage divider inputs. IC Role / Device Role / Timing Role: Analog front-end conditioner using comparators for zero-crossing detection and overvoltage alerting. Use Value: Dual comparators with shared reference enable simultaneous AC phase monitoring; brownout detection triggers graceful shutdown before meter data corruption. |
Use Scenario: Wall-mounted dimmer with rotary encoder, triac gate drive, and Bluetooth module interface. IC Role / Device Role / Timing Role: System coordinator managing encoder interrupts, triac firing angle (via T0/T1), UART bridge to BLE SoC, and status LEDs. Use Value: Keypad interrupt wakes CPU from Power Down on rotation; UART handles configuration commands; open-drain I²C pins safely interface with isolated BLE modules. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 8-bit microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AT89LP2052-20PU | 2 kB Flash (not OTP), 18-pin PDIP, no I²C, no analog comparators, 2.4–5.5 V operation. | Lacks comparator-based sensing and I²C bus - requires external components for sensor interfacing and level translation. | Choose when reprogrammability is required and analog functions are handled externally. |
| STM8S003F3P6 | 16 MHz Cortex-M0+, 8 kB Flash, 1 kB RAM, 10-bit ADC, no built-in comparators, 2.95–5.5 V. | Higher performance but lacks dedicated comparator outputs and KBI - needs firmware-based key scanning and external reference for thresholding. | Choose for applications needing ADC or higher throughput where comparator offloading isn't critical. |
Compared with AT89LP2052-20PU and STM8S003F3P6, the P87LPC762BD,512 uniquely integrates dual analog comparators with interrupt capability, I²C master/slave, and KBI - reducing component count and firmware complexity in cost-constrained sensing and UI applications.
Availability
P87LPC762BD,512 is available at Aetrix Electronics and suitable for industrial sensor nodes, home appliance control panels, and smart lighting dimmer switches requiring stable component supply across extended product lifecycles.
Supply support for P87LPC762BD,512 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor leader focused on secure connectivity solutions for automotive, industrial, and IoT markets.
The P87LPC762BD,512 belongs to NXP's legacy LPC700 family - engineered for ultra-low-cost, low-pin-count embedded control where integration of analog functions, communication peripherals, and power efficiency outweighs the need for flash reprogrammability.
FAQ
What is the maximum operating frequency of the P87LPC762BD,512 and under what voltage conditions?
The P87LPC762BD,512 operates up to 20 MHz when VDD is 4.5–6.0 V, and up to 10 MHz when VDD is 2.7–6.0 V. This dual-speed specification allows flexible power/performance trade-offs - for example, running at 10 MHz on 3 V batteries preserves battery life while maintaining sufficient throughput for sensor polling and UI updates in the P87LPC762BD,512.
Does the P87LPC762BD,512 support in-circuit programming, and what security features protect firmware?
Yes, the P87LPC762BD,512 supports serial EPROM programming for in-circuit production coding. It includes two EPROM security bits that prevent reading of the 2 kbyte OTP code memory - ensuring proprietary algorithms and calibration data remain protected against unauthorized access in deployed P87LPC762BD,512 units.
How does the P87LPC762BD,512 implement analog comparator functionality without external components?
The P87LPC762BD,512 integrates two independent analog comparators (CMP1, CMP2) with a shared negative input (CMPREF) and four positive inputs (CIN1A/B, CIN2A/B). An internal reference voltage generator or external voltage applied to CMPREF sets the threshold, enabling direct voltage-level detection - eliminating op-amps, resistors, and external references in threshold-monitoring circuits using the P87LPC762BD,512.
Can the P87LPC762BD,512 operate without any external timing components, and how is this achieved?
Yes, the P87LPC762BD,512 can operate with no external timing components by selecting the on-chip RC oscillator option via EPROM configuration bits. This internal oscillator supports frequencies up to 20 MHz (at 5 V) and eliminates crystals, capacitors, or resonators - simplifying design, reducing cost, and improving reliability in space-constrained P87LPC762BD,512 deployments.
What power-saving modes does the P87LPC762BD,512 offer, and how is wake-up triggered from Power Down mode?
The P87LPC762BD,512 supports Idle and Power Down modes, with typical Power Down current of 1 µA. Wake-up from Power Down is triggered by any enabled interrupt source - including external pins (INT0/INT1), keypad inputs (KBI), comparator events, or UART activity. This enables responsive, ultra-low-power operation in battery-powered P87LPC762BD,512 applications.
P87LPC762BD,512 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Package/Case:
- 20-SOIC (0.295", 7.50mm Width)
- Series:
- LPC700
- Packaging:
- Tube
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Core Processor:
- 8051
- Core Size:
- 8-Bit
- Speed:
- 20MHz
- Connectivity:
- I2C, UART/USART
- Peripherals:
- Brown-out Detect/Reset, LED, POR, WDT
- Number of I/O:
- 18
- Program Memory Size:
- 2KB (2K x 8)
- Program Memory Type:
- OTP
- EEPROM Size:
- -
- RAM Size:
- 128 x 8
- Voltage - Supply (Vcc/Vdd):
- 2.7V ~ 6V
- Data Converters:
- -
- Oscillator Type:
- Internal
- Operating Temperature:
- 0°C ~ 70°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
P87LPC762BD,512 FAQ
1.How can I place an order for P87LPC762BD,512 through Aetrix?
Please submit a Request for Quotation (RFQ) for P87LPC762BD,512 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for P87LPC762BD,512 reliable?
The price and inventory of P87LPC762BD,512 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for P87LPC762BD,512 is usually 5 days.
3.What payment methods are accepted for P87LPC762BD,512?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for P87LPC762BD,512 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for P87LPC762BD,512?
P87LPC762BD,512 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your P87LPC762BD,512 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for P87LPC762BD,512?
For technical support, including P87LPC762BD,512 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your P87LPC762BD,512 requirements.
6.How does Aetrix verify that P87LPC762BD,512 is sourced from the original manufacturer or authorized distributors?
All P87LPC762BD,512 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that P87LPC762BD,512 meets industry standards.
7.What is the process for return or replacement of P87LPC762BD,512?
All P87LPC762BD,512 units undergo pre-shipment inspection (PSI). If there is an issue with P87LPC762BD,512, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The P87LPC762BD,512 part is unused and in its original packaging.
Return procedure for P87LPC762BD,512:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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