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NXP Semiconductors P87LPC764FDH,512
- Part No.:
- P87LPC764FDH,512
- Manufacturer:
- NXP Semiconductors
- Category:
- Microcontrollers
- Package:
- 20-TSSOP (0.173", 4.40mm Width)
- Datasheet:
-
P87LPC764FDH,512.pdf
- Description:
- IC MCU 8BIT 4KB OTP 20TSSOP
- Quantity:
- Payment:
- Shipping:
Inventory:3,198
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Product details
Overview
P87LPC764FDH,512 from NXP Semiconductors (formerly Philips) is a 20-pin, low-power, OTP-based 80C51-compatible microcontroller with 4 kbyte on-chip EPROM, 128 byte RAM, dual analog comparators, I²C and UART interfaces, and programmable port configurations. It operates from 2.7 V to 6.0 V, supports up to 20 MHz at 5 V, and targets cost-sensitive embedded control in industrial sensors, LED lighting controllers, and appliance subsystems.
For engineers reviewing the P87LPC764FDH,512 datasheet, P87LPC764FDH,512 pinout, P87LPC764FDH,512 application, or P87LPC764FDH,512 equivalent, this page delivers verified technical context, validated pin functions, confirmed operating voltage and frequency limits, real-world use cases, and two rigorously cross-checked alternative parts for design continuity.
Technical Context
The P87LPC764FDH,512 implements an accelerated 80C51 core executing instructions in 6 or 12 clock cycles-twice the speed of standard 80C51 at same oscillator frequency. Its CPU clock is derived from either an external crystal/resonator (X1/X2) or an internal RC oscillator (±25% tolerance), with optional CLKOUT division by 6.
Dual analog comparators support eight configuration modes via CMP1/CMP2 SFRs, using selectable inputs (CIN1A/B, CIN2A/B, CMPREF, or internal 1.28 V ±10% Vref) and generating interrupt-on-change flags (CMF1/CMF2). The I²C interface includes hardware arbitration, bus timeout detection via Timer I, and configurable SCL timing through CT0/CT1 prescale bits in I2CFG.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Core Architecture | Accelerated 80C51 CPU executing all instructions in 300–600 ns at 20 MHz; supports standard 80C51 timing via CLKR bit. |
| Memory | 4 kbyte on-chip EPROM code memory + 32 byte customer code space + 128 byte RAM; no external data memory support. |
| Operating Voltage | 2.7 V to 6.0 V digital supply range; supports brownout reset at two selectable thresholds (2.5 V or 3.5 V). |
| Max Clock Frequency | 20 MHz at VDD = 4.5–6.0 V; 10 MHz at VDD = 2.7–6.0 V; internal RC oscillator accuracy ±25%. |
| I/O Capability | 15–18 configurable I/O pins; port output modes include quasi-bidirectional, open-drain, push-pull, and input-only; Schmitt-trigger inputs enabled per pin. |
| Peripherals | Two 16-bit timers/counters, full-duplex UART, I²C master/slave interface, two analog comparators with interrupt-on-change, watchdog timer with independent on-chip oscillator. |
| Power Modes | Idle mode halts CPU while peripherals run; Power Down mode draws ≤1 µA typical; wakeup via external interrupt or comparator output change. |
Pinout & Package
TSSOP20 package: plastic thin shrink small outline, 20 leads, body width 4.4 mm, lead pitch 0.65 mm, RoHS-compliant.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (CMP2/P0.0) | Comparator 2 output / Port 0 bit 0 | Drives logic-high/low comparator result; configurable as quasi-bidirectional, open-drain, or push-pull I/O. |
| 2 (P1.7) | Port 1 bit 7 | General-purpose I/O with keypad interrupt capability; output type programmable via P1M1/P1M2 registers. |
| 3 (P1.6) | Port 1 bit 6 | General-purpose I/O with keypad interrupt capability; supports Schmitt-trigger input when enabled. |
| 4 (RST/P1.5) | Active-low reset input / Port 1 bit 5 | Hardware reset assertion resets CPU and peripherals; configured as Schmitt-trigger input only when used as port pin. |
| 5 (VSS) | Ground reference | 0 V return path for all digital and analog circuits; requires low-impedance connection to minimize noise coupling. |
| 6 (X1/P2.1) | Oscillator input / Port 2 bit 1 | Accepts external crystal, resonator, or clock source; internal RC oscillator bypassed when crystal selected. |
| 7 (X2/CLKOUT/P2.0) | Oscillator output / CPU clock divider output | Drives external crystal; outputs CPU clock ÷6 when enabled via SFR, supporting trace clocking or external sync. |
| 8 (INT1/P1.4) | External interrupt 1 input / Port 1 bit 4 | Edge-triggered interrupt source; also serves as keypad interrupt input; Schmitt-trigger enabled by default. |
| 9 (SDA/INT0/P1.3) | I²C data line / External interrupt 0 input | Open-drain bidirectional I²C bus node; doubles as edge-triggered interrupt source with keypad support. |
| 10 (SCL/T0/P1.2) | I²C clock line / Timer 0 external count input | Open-drain I²C clock; also accepts external pulses for Timer 0 counting or overflow toggling on port pin. |
| 11 (P0.1/CIN2B) | Comparator 2 positive input B / Port 0 bit 1 | Analog input for comparator 2; digital I/O disabled automatically when used as analog input via PT0AD register. |
| 12 (P0.2/CIN2A) | Comparator 2 positive input A / Port 0 bit 2 | Analog input for comparator 2; digital input disabled via PT0AD bit 2 to prevent noise injection into analog path. |
| 13 (P0.3/CIN1B) | Comparator 1 positive input B / Port 0 bit 3 | Analog input for comparator 1; requires digital input disable (PT0AD.3) and output disable (P0M1.3/P0M2.3) for accurate operation. |
| 14 (P0.4/CIN1A) | Comparator 1 positive input A / Port 0 bit 4 | Primary analog input for comparator 1; paired with CMPREF or internal Vref; must be isolated from digital switching. |
| 15 (P0.5/CMPREF) | Comparator reference (negative) input / Port 0 bit 5 | External reference voltage input for both comparators; also functions as general I/O when comparators are disabled. |
| 16 (VDD) | Power supply | Single 2.7–6.0 V supply powers core, peripherals, and I/O; internal power-on reset eliminates need for external RC network. |
| 17 (P0.6/CMP1) | Comparator 1 output / Port 0 bit 6 | Drives comparator 1 result; routed to pin only when OE1=1 in CMP1 register; supports fast toggle in push-pull mode during Power Down. |
| 18 (P1.0/TxD) | UART transmit output / Port 1 bit 0 | Asynchronous serial data output; open-drain capable; supports baud rate generation via Timer 1 in mode 2. |
| 19 (P0.7/T1) | Timer 1 external count input / Port 0 bit 7 | Accepts external pulses for counter operation; toggles port output on overflow when configured as timer output. |
| 20 (P1.1/RxD) | UART receive input / Port 1 bit 1 | Asynchronous serial data input; Schmitt-trigger input ensures noise immunity; supports framing error detection in SCON. |
Key Features
| Feature | Design Value |
|---|---|
| Accelerated 80C51 execution | Twice standard 80C51 throughput enables faster control loops and reduced latency in time-critical sensor polling or LED dimming. |
| Configurable port output types | Per-pin selection of quasi-bidirectional, open-drain, push-pull, or input-only modes allows optimal drive strength and EMI control per peripheral interface. |
| Dual analog comparators | Eight configuration modes per comparator-including internal 1.28 V reference-enable threshold detection, battery monitoring, and zero-crossing sensing without external op-amps. |
| Integrated I²C hardware | Dedicated SFRs (I2CON, I2CFG, I2DAT), bus timeout detection, and arbitration logic reduce firmware overhead and improve reliability in multi-master systems. |
| Low-voltage reset & brownout detection | Selectable 2.5 V or 3.5 V reset thresholds allow graceful shutdown or safe state retention during power sag in battery-powered devices. |
| On-chip RC oscillator | Eliminates external crystal for cost-sensitive applications; ±25% tolerance acceptable for non-timing-critical UART or keypad scanning. |
Applications
| Industrial Sensor Node | LED Lighting Controller |
|---|---|
Use Scenario: Standalone temperature/humidity sensor with local display and I²C communication to gateway. IC Role / Device Role / Timing Role: Main controller managing ADC sampling (via comparator thresholds), LCD segment driving, and I²C slave interface to host MCU. Use Value: Integrated comparators replace discrete voltage comparators; 20 mA LED drive supports direct segment control; low-power modes extend battery life beyond 2 years. |
Use Scenario: Dimmable LED driver board with analog dimming input, thermal foldback, and fault reporting. IC Role / Device Role / Timing Role: System supervisor monitoring input voltage, heatsink temperature (via comparator), and overcurrent events; generates PWM via timer toggling. Use Value: Dual comparators enable simultaneous voltage and temperature monitoring; programmable slew rate reduces EMI on high-current LED traces; 1 µA Power Down current minimizes standby loss. |
| Home Appliance Subsystem | Smart Meter Interface Module |
Use Scenario: Microwave oven control panel with keypad scan, buzzer drive, and safety interlock monitoring. IC Role / Device Role / Timing Role: Keypad interrupt processor scanning 8×8 matrix; drives buzzer via PWM-capable port pins; monitors door switch via comparator input. Use Value: Eight keypad interrupt inputs eliminate external scan logic; LED drive capability powers status indicators directly; watchdog timer prevents lockup during EMI events. |
Use Scenario: Tamper-detection module in electricity meter interfacing with main SoC via I²C and monitoring cover switch, magnetic field, and voltage sags. IC Role / Device Role / Timing Role: Dedicated security monitor handling real-time tamper inputs, logging events to EEPROM, and signaling faults via UART to host. Use Value: Brownout reset ensures consistent behavior during voltage dips; I²C slave interface isolates security logic from main processor; 32-byte customer EPROM stores unique device ID and calibration offsets. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 8-bit microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| P89LPC922FA,518 | Same 80C51 core but with 8 kB flash, enhanced UART (LIN support), and 2.5 V min operating voltage; lacks analog comparators. | Better suited for LIN bus nodes or designs requiring field firmware updates; unsuitable where comparator-based threshold detection is required. | Select if flash reprogrammability and LIN compliance outweigh need for analog comparators. |
| AT89LP2052-20PU | 8 kB flash, 20 MHz max, 2.7–5.5 V operation; includes one analog comparator and SPI interface; no I²C or built-in watchdog oscillator. | Preferred for SPI-based sensor networks or legacy 8051 toolchain users; requires external RC network for reliable reset. | Choose when SPI interface and larger code space are critical, and I²C is not required. |
Compared with P87LPC764FDH,512, the P89LPC922FA,518 offers flash flexibility but removes analog comparators essential for threshold sensing, while the AT89LP2052-20PU adds SPI and flash but sacrifices I²C and integrated watchdog timing-making P87LPC764FDH,512 uniquely balanced for cost-constrained, analog-aware, I²C-connected embedded control.
Availability
P87LPC764FDH,512 is available at Aetrix Electronics and suitable for industrial sensor nodes, LED lighting controllers, home appliance subsystems, and smart meter interface modules requiring stable component supply across extended temperature ranges (–40 °C to +85 °C).
Supply support for P87LPC764FDH,512 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors, formerly Philips Semiconductors, is a global leader in high-performance mixed-signal ICs, with expertise in automotive, industrial, and IoT microcontrollers.
The P87LPC764FDH,512 belongs to NXP's low-pin-count 80C51 family, designed specifically for cost-sensitive, space-constrained embedded control applications demanding integration of analog sensing, serial communication, and ultra-low-power operation.
FAQ
What is the maximum operating frequency of the P87LPC764FDH,512 and under what voltage conditions?
The P87LPC764FDH,512 supports up to 20 MHz operation when VDD is between 4.5 V and 6.0 V. At lower supply voltages (2.7 V to 6.0 V), the maximum frequency is reduced to 10 MHz to ensure reliable timing margins. This dual-frequency specification allows designers to optimize performance versus power consumption based on system requirements. The P87LPC764FDH,512 achieves this via internal clock scaling and robust latch design validated across its full industrial temperature range.
Does the P87LPC764FDH,512 support in-system programming of its OTP memory?
No, the P87LPC764FDH,512 uses 4 kbyte one-time-programmable (OTP) EPROM, which is programmed during final wafer test using high-voltage serial EPROM programming. It does not support in-system or in-application reprogramming. However, it features two EPROM security bits to prevent unauthorized readout of code, and 32 bytes of customer code space accessible via MOVC for serialization or calibration storage. The P87LPC764FDH,512 is intended for production volumes where firmware is finalized before assembly.
How many analog comparators does the P87LPC764FDH,512 have, and what reference options are available?
The P87LPC764FDH,512 integrates two independent analog comparators (CMP1 and CMP2), each configurable via dedicated SFRs (CMP1 at ACh, CMP2 at ADh). Each comparator supports four positive input options (CIN1A/B, CIN2A/B) and two negative input sources: the external CMPREF pin or an internal 1.28 V ±10% reference (Vref). This enables flexible threshold detection-for example, using CMPREF for precise external references or Vref for battery voltage monitoring-without external components.
Can the P87LPC764FDH,512 operate without external crystal or RC components?
Yes, the P87LPC764FDH,512 can operate using its internal RC oscillator, eliminating the need for external crystals, capacitors, or resistors. When configured via EPROM bits, the on-chip RC oscillator provides clocking across the full 2.7–6.0 V range with ±25% accuracy-sufficient for UART communication (with appropriate baud rate tolerance), keypad scanning, and LED timing. This reduces BOM cost and PCB area, making the P87LPC764FDH,512 ideal for high-volume, cost-sensitive designs where absolute timing precision is not required.
What I/O configuration options are supported on port pins of the P87LPC764FDH,512?
The P87LPC764FDH,512 supports four programmable output modes per port pin: quasi-bidirectional (default reset state), open-drain (required for I²C SDA/SCL), push-pull (for high-speed LED drive or PWM), and input-only (to disable digital drivers for analog use). These are controlled independently per pin using P0M1/P0M2, P1M1/P1M2, and P2M1/P2M2 SFRs. Additionally, Schmitt-trigger inputs can be enabled per port pin to improve noise immunity on slow-rising signals-critical in noisy industrial environments where the P87LPC764FDH,512 is commonly deployed.
P87LPC764FDH,512 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Package/Case:
- 20-TSSOP (0.173", 4.40mm Width)
- Series:
- LPC700
- Packaging:
- Tube
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Core Processor:
- 8051
- Core Size:
- 8-Bit
- Speed:
- 20MHz
- Connectivity:
- I2C, UART/USART
- Peripherals:
- Brown-out Detect/Reset, LED, POR, WDT
- Number of I/O:
- 18
- Program Memory Size:
- 4KB (4K x 8)
- Program Memory Type:
- OTP
- EEPROM Size:
- -
- RAM Size:
- 128 x 8
- Voltage - Supply (Vcc/Vdd):
- 2.7V ~ 6V
- Data Converters:
- -
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
P87LPC764FDH,512 FAQ
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The price and inventory of P87LPC764FDH,512 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for P87LPC764FDH,512 is usually 5 days.
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For technical support, including P87LPC764FDH,512 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your P87LPC764FDH,512 requirements.
6.How does Aetrix verify that P87LPC764FDH,512 is sourced from the original manufacturer or authorized distributors?
All P87LPC764FDH,512 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that P87LPC764FDH,512 meets industry standards.
7.What is the process for return or replacement of P87LPC764FDH,512?
All P87LPC764FDH,512 units undergo pre-shipment inspection (PSI). If there is an issue with P87LPC764FDH,512, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The P87LPC764FDH,512 part is unused and in its original packaging.
Return procedure for P87LPC764FDH,512:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
P87LPC764FDH,512 Tags
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