NXP Semiconductors P89C668HBBD/00,557
- Part No.:
- P89C668HBBD/00,557
- Manufacturer:
- NXP Semiconductors
- Category:
- Microcontrollers
- Package:
- 44-LQFP
- Datasheet:
-
P89C668HBBD/00,557.pdf
- Description:
- IC MCU 8BIT 64KB FLASH 44LQFP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
P89C668HBBD/00,557 from NXP Semiconductors (formerly Philips) is an 8-bit 80C51-compatible Flash microcontroller with 64 KB ISP/IAP Flash, 8 KB RAM, four 8-bit I/O ports, three 16-bit timers, enhanced UART, I²C interface, and Programmable Counter Array (PCA) supporting PWM and capture/compare - deployed in motor control, industrial automation, and IPMI-compliant embedded systems.
For engineers reviewing the P89C668HBBD/00,557 datasheet, P89C668HBBD/00,557 pinout, P89C668HBBD/00,557 application, or P89C668HBBD/00,557 equivalent, key selection criteria include 6-clock-cycle CPU timing (20 MHz max), LQFP-44 package with verified I²C/SCL/SDA on P1.6/P1.7, PCA-based PWM generation, and dual clock-mode configurability (6/12 cycles per machine cycle).
Technical Context
The P89C668HBBD/00,557 implements a static CMOS 80C51 core with instruction- and timing-compatible execution, delivering twice the throughput of standard 80C51 at 6-clock mode (20 MHz). Its architecture integrates a full-duplex enhanced UART with framing error detection and automatic address recognition, plus a dedicated I²C serial interface using open-drain P1.6/SCL and P1.7/SDA pins.
It features a 5-level nested interrupt structure with four priority levels and eight sources, alongside a 5-channel Programmable Counter Array (PCA) supporting PWM output, edge-triggered capture, and software-timed compare operations - all accessible via dedicated SFRs including CCAPMn, CCON, and CH/CL registers.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Core Architecture | 80C51-compatible 8-bit CPU with 100% instruction set and timing compatibility |
| Flash Memory | 64 KB ISP/IAP Flash - enables field firmware updates via UART without external programmer |
| RAM | 8 KB on-chip RAM - supports large data buffers and real-time task stacks without external expansion |
| Clock Modes | Configurable 6-cycle (20 MHz max) or 12-cycle (33 MHz max) machine cycle - selectable via OTP bit |
| I/O Ports | Four 8-bit bidirectional ports (P0–P3), with P1.6/P1.7 as open-drain I²C pins and P1.0–P1.5 as PCA channels |
| Timers & Counters | Three 16-bit timers (T0/T1/T2) + five-channel PCA - enables simultaneous PWM generation and input capture for motor phase control |
| Serial Interfaces | Enhanced UART (RxD/TxD with framing error detection) + hardware I²C (SCL/SDA) - supports multi-master bus communication |
Pinout & Package
LQFP-44 package (SOT389-1), 10 mm × 10 mm, 0.8 mm pitch, thermally enhanced with exposed pad (not electrically connected).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| P0.0–P0.7 | Open-drain bidirectional I/O / AD0–AD7 | Multiplexed address/data bus for external memory access; requires external pull-ups for reliable high-impedance input |
| P1.0–P1.5 | General I/O / T2, T2EX, ECI, CEX0–CEX2 | Dedicated PCA channel I/O - CEX0–CEX2 support capture/compare; T2/T2EX enable Timer2 reload and direction control |
| P1.6 / P1.7 | I²C interface / SCL / SDA | Open-drain outputs - require external pull-up resistors (typically 4.7 kΩ) to VCC for I²C bus operation |
| P2.0–P2.7 | Bidirectional I/O / A8–A15 | High-order address bus during 16-bit external memory access; retains port function when not used for addressing |
| P3.0 / P3.1 | UART interface / RxD / TxD | Full-duplex serial communication - supports framing error detection and automatic address recognition in multi-drop networks |
| P3.2 / P3.3 | External interrupts / INT0 / INT1 | Level-sensitive inputs - configured via TCON register; support wake-up from Idle/Power-Down modes |
| RST | Active-high reset input | Minimum 2-machine-cycle high pulse required; internal weak pull-down permits power-on reset with RC network |
| XTAL1 / XTAL2 | Crystal oscillator inputs | Supports quartz crystal (1–20 MHz) or ceramic resonator; XTAL1 accepts external clock source when XTAL2 is left floating |
Key Features
| Feature | Design Value |
|---|---|
| In-System Programming (ISP) | Serial Flash reprogramming via UART using built-in ROM boot loader - eliminates need for external programmer in production or field updates |
| In-Application Programming (IAP) | Runtime Flash self-modification using ROM-resident routines - enables remote firmware upgrades over modem or network link |
| Programmable Clock-Out | 50% duty cycle clock output on P1.0 (122 Hz–8 MHz at 16 MHz crystal) - configurable via RCAP2H/L and T2MOD for test signal generation or peripheral clocking |
| Low-Power Operation | Three power modes: Idle (CPU halted, peripherals active), Stop Clock (oscillator halted, RAM retained), Power-Down (VCC down to 2.0 V supported) |
| I²C Slave Address Recognition | Hardware-accelerated address match for S1ADR/SADEN registers - triggers interrupt on valid SLA+W/R or general call, reducing CPU polling overhead |
| Asynchronous Port Reset | Independent reset assertion on individual ports via SFR writes - allows safe reinitialization of I/O states without full device reset |
Applications
| Motor Control System | Industrial PLC I/O Module |
|---|---|
|
Use Scenario: Closed-loop DC/BLDC motor control with real-time current sensing, commutation timing, and fault protection. IC Role / Device Role / Timing Role: Primary controller executing PID loop, generating six-step PWM via PCA channels CEX0–CEX2, and monitoring hall sensors via INT0/INT1. Use Value: 6-clock CPU mode delivers deterministic 50 ns instruction resolution at 20 MHz; PCA's independent capture/compare registers enable precise phase-aligned PWM with <1 µs jitter. |
Use Scenario: Modular digital input/output expansion unit with isolated 24 V DC sensing and relay drive, communicating via RS-485 backplane. IC Role / Device Role / Timing Role: Local intelligence node managing opto-isolated inputs, driving solid-state relays, and buffering serial commands via enhanced UART with framing error detection. Use Value: 8 KB RAM buffers multiple command frames; four priority-level interrupts ensure timely response to emergency stop signals while background tasks run. |
| IPMI Baseboard Management | Legacy Equipment Retrofit Controller |
|
Use Scenario: Embedded baseboard management controller (BMC) for server motherboards, monitoring temperature, fan speed, and power supply status. IC Role / Device Role / Timing Role: I²C master interfacing with thermal sensors and voltage monitors; UART handles IPMI-over-LAN serial console; PCA generates watchdog timeout pulses. Use Value: Hardware I²C engine offloads bit-banging; S1STA register provides atomic bus status visibility; WDTRST register enables precise 1–10 s watchdog intervals. |
Use Scenario: Drop-in replacement for obsolete 87C51-based controllers in legacy test equipment requiring field-upgradable firmware. IC Role / Device Role / Timing Role: Pin-compatible upgrade path with identical PLCC/LQFP footprint and 80C51 instruction set - retains existing PCB layout and assembly process. Use Value: 64 KB Flash accommodates modern diagnostic firmware; ISP capability eliminates need for socketed EPROM erasers during calibration updates. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 8-bit Flash microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AT89C51ED2-RL24 | 512 B RAM, 12 KB Flash, no PCA, single 16-bit timer, no I²C - uses standard 12-clock 8051 core | Lacks PWM/capture capability and I²C; suitable only for basic control without motor timing or sensor bus interfaces | Select only if design requires minimal code size, no field update, and no advanced timing peripherals |
| STC89C52RC-PD | 8 KB Flash, 512 B RAM, no ISP/IAP, no I²C, no PCA - enhanced 6-clock 8051 derivative with built-in ISP bootloader | Requires external UART bootloader; lacks hardware I²C and multi-channel PCA needed for synchronous motor control | Choose for cost-sensitive, low-pin-count designs where external Flash programming is acceptable and I²C/PCA are unused |
Compared with AT89C51ED2-RL24 and STC89C52RC-PD, the P89C668HBBD/00,557 uniquely combines 64 KB field-programmable Flash, 8 KB RAM, hardware I²C, and five-channel PCA - making it the only option among the three capable of standalone motor commutation and IPMI sensor management without external logic.
Availability
P89C668HBBD/00,557 is available at Aetrix Electronics and suitable for motor control systems, industrial PLC modules, IPMI baseboard management units, and legacy equipment retrofit projects requiring stable component supply and long-term obsolescence mitigation.
Supply support for P89C668HBBD/00,557 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor leader focused on secure connectivity solutions for automotive, industrial, and IoT applications, with roots in Philips' pioneering IC development.
The P89C668HBBD/00,557 belongs to NXP's legacy 80C51 Flash MCU family, designed specifically for cost-sensitive, high-reliability embedded control applications requiring field-upgradable firmware, deterministic real-time response, and mixed-signal peripheral integration.
FAQ
What is the maximum operating frequency of the P89C668HBBD/00,557 in 6-clock mode?
The P89C668HBBD/00,557 supports up to 20 MHz in 6-clock mode, delivering effective performance equivalent to a 40 MHz standard 80C51. This timing mode is factory-default and enables sub-500 ns instruction execution for time-critical control loops. The P89C668HBBD/00,557 must be operated within its specified 4.5–5.5 V supply range to sustain this frequency reliably.
Does the P89C668HBBD/00,557 support In-Application Programming (IAP) without external hardware?
Yes, the P89C668HBBD/00,557 supports full IAP using ROM-resident Flash programming routines. The user application can erase and reprogram Flash sectors by calling these routines via SFR-controlled interfaces - no external programmer or debug probe is required. This capability is integral to the P89C668HBBD/00,557 architecture and enables secure remote firmware updates over UART or modem links.
Which pins on the P89C668HBBD/00,557 provide hardware I²C functionality?
The P89C668HBBD/00,557 implements hardware I²C on P1.6 (SCL) and P1.7 (SDA), both configured as open-drain outputs requiring external pull-up resistors. These pins are alternate functions of Port 1 and must have their output latches set to logic 1 to enable I²C operation. The SIO1 peripheral handles arbitration, START/STOP generation, and slave address matching autonomously.
Can the P89C668HBBD/00,557 generate PWM signals while simultaneously running UART communication?
Yes, the P89C668HBBD/00,557 can generate PWM via its five-channel PCA (e.g., CEX0–CEX2) while maintaining full-duplex UART operation on P3.0/RxD and P3.1/TxD. The PCA and UART are independent peripherals sharing no critical resources; their SFRs (CCAPMn, CCON, S0CON) are separately controlled. This concurrency is confirmed in the P89C668HBBD/00,557 block diagram and functional description.
What power-saving modes does the P89C668HBBD/00,557 support, and how are they exited?
The P89C668HBBD/00,557 supports Idle Mode (CPU halted, peripherals active), Stop Clock Mode (oscillator halted, RAM retained), and Power-Down Mode (VCC down to 2.0 V, RAM preserved). Idle and Stop Clock modes exit on any enabled interrupt; Power-Down exits via hardware reset or level-sensitive INT0/INT1 - with oscillator stabilization time (<10 ms) required before resuming execution. All modes are controlled via PCON register bits.
P89C668HBBD/00,557 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Package/Case:
- 44-LQFP
- Series:
- 89C
- Packaging:
- Bag
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Core Processor:
- 8051
- Core Size:
- 8-Bit
- Speed:
- 33MHz
- Connectivity:
- I2C, UART/USART
- Peripherals:
- POR, PWM, WDT
- Number of I/O:
- 32
- Program Memory Size:
- 64KB (64K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 8K x 8
- Voltage - Supply (Vcc/Vdd):
- 4.5V ~ 5.5V
- Data Converters:
- -
- Oscillator Type:
- Internal
- Operating Temperature:
- 0°C ~ 70°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
P89C668HBBD/00,557 FAQ
1.How can I place an order for P89C668HBBD/00,557 through Aetrix?
Please submit a Request for Quotation (RFQ) for P89C668HBBD/00,557 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for P89C668HBBD/00,557 reliable?
The price and inventory of P89C668HBBD/00,557 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for P89C668HBBD/00,557 is usually 5 days.
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Once your P89C668HBBD/00,557 order is processed, you will receive an email with the shipment details and tracking number.
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5.How can I obtain technical support or documentation for P89C668HBBD/00,557?
For technical support, including P89C668HBBD/00,557 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your P89C668HBBD/00,557 requirements.
6.How does Aetrix verify that P89C668HBBD/00,557 is sourced from the original manufacturer or authorized distributors?
All P89C668HBBD/00,557 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that P89C668HBBD/00,557 meets industry standards.
7.What is the process for return or replacement of P89C668HBBD/00,557?
All P89C668HBBD/00,557 units undergo pre-shipment inspection (PSI). If there is an issue with P89C668HBBD/00,557, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The P89C668HBBD/00,557 part is unused and in its original packaging.
Return procedure for P89C668HBBD/00,557:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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