NXP Semiconductors P89LPC902FN,129
- Part No.:
- P89LPC902FN,129
- Manufacturer:
- NXP Semiconductors
- Category:
- Microcontrollers
- Package:
- 8-DIP (0.300", 7.62mm)
- Datasheet:
-
P89LPC902FN,129.pdf
- Description:
- IC MCU 8BIT 1KB FLASH 8DIP
- Quantity:
- Payment:

- Shipping:

Inventory:2,972
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
P89LPC902FN,129 from NXP Semiconductors (formerly Philips) is an 8-bit microcontroller based on a two-clock 80C51 core, delivering six times the instruction throughput of standard 80C51 devices at the same frequency. It integrates 1 kB Flash code memory, 128-byte RAM, dual 16-bit timers, a 23-bit system/real-time clock, and two analog comparators - all in an 8-pin DIP package. It targets low-cost embedded control applications requiring compact footprint, internal oscillator operation, and keypad interrupt support.
For engineers reviewing the P89LPC902FN,129 datasheet, P89LPC902FN,129 pinout, P89LPC902FN,129 application, or P89LPC902FN,129 equivalent, key selection criteria include its dual-comparator architecture, five-keypad-interrupt capability, 2.4–3.6 V operation with 5 V-tolerant I/Os, and compatibility with In-Application Programming (IAP-Lite) for field firmware updates.
Technical Context
The P89LPC902FN,129 executes instructions in two to four clocks using an accelerated 80C51 CPU core, enabling 18 MHz operation with 111–222 ns instruction cycles. Its internal RC oscillator is factory-calibrated to ±1 % and supports frequencies from 20 kHz to 18 MHz without external components.
It features two independent analog comparators (CMP1 and CMP2), each with dedicated inputs and outputs, and supports programmable port configurations (quasi-bidirectional, open-drain, push-pull) across all I/O pins. Keypad interrupt detection operates on Port 0 pins with pattern-match logic and maskable inputs.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Core Architecture | Two-clock 80C51 CPU executing instructions in 2–4 cycles; delivers 6× performance vs. standard 80C51 at same clock frequency. |
| Memory | 1 kB byte-erasable Flash (256-byte sectors, 16-byte pages) + 128-byte RAM; supports non-volatile data storage via single-byte erase. |
| Operating Voltage | 2.4 V to 3.6 V VDD; I/O pins tolerate up to 5.5 V - enables direct interfacing with 5 V logic without level shifters. |
| Timers & Clock | Dual 16-bit counter/timers + 23-bit system timer usable as real-time clock; internal RC oscillator selectable from 20 kHz to 18 MHz. |
| Analog Peripherals | Two independent analog comparators (CMP1, CMP2) with dedicated positive/negative inputs and digital outputs for threshold detection. |
| Interrupt System | Four priority levels; five dedicated keypad interrupt inputs (KBI0, KBI2, KBI4–KBI6); port pattern-match interrupt on Port 0. |
| Power Management | Idle and two Power-down modes; typical Power-down current is 1 µA (with comparators disabled); low-voltage reset (brownout detect). |
Pinout & Package
Package: Plastic dual in-line package (DIP8), 300 mil body width (SOT97-1). Pin spacing and layout conform to industry-standard 8-pin DIP footprint.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 - VDD | Power supply input | Primary power rail (2.4–3.6 V); powers core, peripherals, and I/O; supports 5 V-tolerant I/O operation. |
| 2 - P0.2/CIN2A/KBI2 | Multi-function I/O | Port 0 bit 2: comparator 2 positive input (CIN2A) and keypad interrupt input 2 (KBI2); Schmitt-triggered input. |
| 3 - P0.0/CMP2/KBI0 | Multi-function I/O | Port 0 bit 0: comparator 2 output (CMP2) and keypad interrupt input 0 (KBI0); supports wake-up and event detection. |
| 4 - RST/P1.5 | Reset input | Active-low reset input (P1.5); also used to force In-System Programming mode during power-on sequence. |
| 5 - VSS | Ground reference | 0 V return path for all internal circuits and I/O; required for stable operation and noise immunity. |
| 6 - P0.4/CIN1A/KBI4 | Multi-function I/O | Port 0 bit 4: comparator 1 positive input (CIN1A) and keypad interrupt input 4 (KBI4); supports analog sensing and key scan. |
| 7 - P0.5/CMPREF/KBI5 | Multi-function I/O | Port 0 bit 5: comparator reference (negative) input (CMPREF) and keypad interrupt input 5 (KBI5); sets threshold for both comparators. |
| 8 - P0.6/CMP1/KBI6 | Multi-function I/O | Port 0 bit 6: comparator 1 output (CMP1) and keypad interrupt input 6 (KBI6); provides digital result of CIN1A vs. CMPREF comparison. |
Key Features
| Feature | Design Value |
|---|---|
| In-Application Programming (IAP-Lite) | Enables firmware updates in-system without external programmer; Flash memory supports byte-erase for flexible non-volatile data storage. |
| Configurable Port Output Types | All I/O pins support quasi-bidirectional, open-drain, push-pull, or input-only modes - simplifies interface design with LEDs, switches, and sensors. |
| Keypad Interrupt Logic | Five dedicated KBI inputs (KBI0, KBI2, KBI4–KBI6) with maskable and pattern-match detection - reduces CPU polling overhead in key-scan applications. |
| Internal RC Oscillator | Factory-calibrated ±1 % accuracy; eliminates need for external crystal/resonator; supports full-speed operation up to 18 MHz. |
| LED Drive Capability | All port pins drive up to 20 mA sink/source (chip-limited total); enables direct LED control without external drivers in low-power UI designs. |
| Controlled Slew Rate Outputs | Outputs feature ~10 ns minimum ramp time - reduces EMI and improves signal integrity in noisy industrial environments. |
Applications
| Home Appliance Control | Industrial Sensor Interface |
|---|---|
|
Use Scenario: Compact control unit for microwave ovens, coffee makers, or washing machine user interfaces with mechanical keypads and status indicators. IC Role / Device Role / Timing Role: Primary 8-bit controller managing keypad scan, LED display timing, relay actuation, and real-time cooking cycle tracking. Use Value: Five dedicated keypad interrupts and built-in 23-bit RTC eliminate external timing ICs and reduce BOM count by ≥2 components. |
Use Scenario: Analog sensor front-end in temperature/humidity monitors or pressure transducers where local threshold detection is required before data transmission. IC Role / Device Role / Timing Role: Signal-conditioning node performing comparator-based over/under-limit detection and timestamping via system timer. Use Value: Dual independent comparators (CMP1, CMP2) with configurable references enable simultaneous high/low threshold monitoring without ADC overhead. |
| Low-Power Remote Controls | Embedded Power Supply Monitor |
|
Use Scenario: Battery-powered IR remote with multi-button matrix and low-battery alert functionality. IC Role / Device Role / Timing Role: System manager handling button debouncing, IR modulation timing, and brownout detection during battery discharge. Use Value: 1 µA typical Power-down current (with comparators disabled) extends shelf life; internal RC oscillator avoids crystal aging drift in long-storage units. |
Use Scenario: Supervisory circuit in DC-DC converter modules or PoE-powered devices requiring precise undervoltage lockout and fault logging. IC Role / Device Role / Timing Role: Independent voltage monitor using CMPREF and internal bandgap reference to trigger reset or interrupt on supply sag. Use Value: 2.4–3.6 V operating range aligns with common 3.3 V rails; 5 V-tolerant I/O allows direct connection to upstream 5 V bias networks. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 8-bit microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| P89LPC901FN,129 | Single analog comparator; only two keypad interrupt inputs (KBI4, KBI5); no CMP2 or KBI0/KBI2/KBI6 support. | Suitable for simpler keypad systems with ≤2 keys and single-threshold analog monitoring. | Select when dual-comparator or five-keypad functionality is unnecessary - reduces cost and software complexity. |
| P89LPC903FN,129 | Includes UART (TxD/RxD pins); replaces CMP1/CMP2 outputs with serial I/O; lacks KBI0, KBI2, KBI6 - only KBI4, KBI5 retained. | Targeted at serial communication applications (e.g., RS-232/485 sensor nodes) rather than keypad-centric control. | Choose when host MCU communication is required and keypad count is ≤2; trade off comparator flexibility for serial connectivity. |
Compared with P89LPC901FN,129 and P89LPC903FN,129, the P89LPC902FN,129 uniquely balances five-keypad support with dual analog comparators - making it optimal for cost-sensitive, sensor-augmented UIs where UART is not needed and higher key density is required.
Availability
P89LPC902FN,129 is available at Aetrix Electronics and suitable for home appliance control, industrial sensor interface, low-power remote controls, and embedded power supply monitoring requiring stable component supply and long-term manufacturability.
Supply support for P89LPC902FN,129 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors (originally Philips Semiconductors) is a global leader in high-performance mixed-signal ICs, with deep expertise in 8-bit microcontrollers for cost-sensitive embedded systems.
The P89LPC90x family was designed specifically for ultra-compact, low-pin-count applications demanding integrated analog functions, keypad support, and minimal external components - targeting appliance, industrial, and consumer control markets.
FAQ
What is the maximum operating frequency of the P89LPC902FN,129?
The P89LPC902FN,129 supports a maximum CPU clock frequency of 18 MHz when using the internal RC oscillator or external crystal source. At this rate, instruction cycle times range from 111 ns to 222 ns - six times faster than a standard 80C51 running at the same clock. The device maintains full functionality including comparator operation, keypad interrupts, and IAP-Lite programming at 18 MHz.
Does the P89LPC902FN,129 support In-System Programming (ISP)?
Yes, the P89LPC902FN,129 supports In-System Programming via its built-in serial loader using the RST pin and Port 0 pins. This enables firmware updates without removing the device from the PCB. The P89LPC902FN,129 implements IAP-Lite functionality, allowing selective byte-erase and reprogramming of Flash memory while the application runs - critical for field upgrades and calibration data storage.
How many keypad interrupt inputs does the P89LPC902FN,129 provide?
The P89LPC902FN,129 provides five dedicated keypad interrupt inputs: KBI0, KBI2, KBI4, KBI5, and KBI6 - mapped to P0.0, P0.2, P0.4, P0.5, and P0.6 respectively. These inputs support maskable, edge-triggered interrupts and can be combined with port pattern-match logic to detect specific keypress combinations without continuous polling - reducing CPU load in UI-intensive designs.
Can the P89LPC902FN,129 operate without an external crystal?
Yes, the P89LPC902FN,129 operates fully without an external crystal thanks to its factory-calibrated internal RC oscillator (±1 % accuracy), configurable from 20 kHz to 18 MHz. When selected, this oscillator eliminates external timing components, reduces board space, and improves reliability - especially in cost-sensitive and high-volume applications like home appliances and remote controls.
What are the analog comparator capabilities of the P89LPC902FN,129?
The P89LPC902FN,129 integrates two independent analog comparators: CMP1 and CMP2. CMP1 uses CIN1A (P0.4) and CMPREF (P0.5) with output on P0.6; CMP2 uses CIN2A (P0.2) and CMPREF (P0.5) with output on P0.0. Both comparators support hysteresis control and generate digital outputs usable for interrupt generation or direct GPIO reading - enabling threshold-based decisions without ADC conversion.
P89LPC902FN,129 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Package/Case:
- 8-DIP (0.300", 7.62mm)
- Series:
- LPC900
- Packaging:
- Tube
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Core Processor:
- 8051
- Core Size:
- 8-Bit
- Speed:
- 7.3728MHz
- Connectivity:
- -
- Peripherals:
- Brown-out Detect/Reset, LED, POR, WDT
- Number of I/O:
- 6
- Program Memory Size:
- 1KB (1K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 128 x 8
- Voltage - Supply (Vcc/Vdd):
- 2.4V ~ 3.6V
- Data Converters:
- -
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Through Hole
- Supplier Device Package:
P89LPC902FN,129 FAQ
1.How can I place an order for P89LPC902FN,129 through Aetrix?
Please submit a Request for Quotation (RFQ) for P89LPC902FN,129 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for P89LPC902FN,129 reliable?
The price and inventory of P89LPC902FN,129 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for P89LPC902FN,129 is usually 5 days.
3.What payment methods are accepted for P89LPC902FN,129?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for P89LPC902FN,129 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for P89LPC902FN,129?
P89LPC902FN,129 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your P89LPC902FN,129 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for P89LPC902FN,129?
For technical support, including P89LPC902FN,129 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your P89LPC902FN,129 requirements.
6.How does Aetrix verify that P89LPC902FN,129 is sourced from the original manufacturer or authorized distributors?
All P89LPC902FN,129 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that P89LPC902FN,129 meets industry standards.
7.What is the process for return or replacement of P89LPC902FN,129?
All P89LPC902FN,129 units undergo pre-shipment inspection (PSI). If there is an issue with P89LPC902FN,129, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The P89LPC902FN,129 part is unused and in its original packaging.
Return procedure for P89LPC902FN,129:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
P89LPC902FN,129 Tags

-
ATTINY4-TSHR
Microchip Technology

-
ATTINY10-TSHR
Microchip Technology

-
ATTINY10-TS8R
Microchip Technology

-
ATTINY202-SSNR
Microchip Technology

-
ATTINY202-SSFR
Microchip Technology

-
ATTINY402-SSNR
Microchip Technology

-
PIC16F15213T-I/MF
Microchip Technology

-
PIC16F15213-E/MF
Microchip Technology

-
PIC10F200T-I/OT
Microchip Technology

-
ATTINY412-SSNR
Microchip Technology

-
PIC10F202T-I/OT
Microchip Technology

-
ATTINY404-SSNR
Microchip Technology
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

