NXP Semiconductors P89LPC935FDH,518

Overview

P89LPC935FDH,518 from NXP Semiconductors is an 8-bit accelerated two-clock 80C51 microcontroller in TSSOP28 package with 8 kB flash, dual 8-bit ADCs (ADC0/ADC1), 512-byte on-chip data EEPROM, Capture/Compare Unit (CCU), and 23-bit system timer usable as RTC. It operates from 2.4 V to 3.6 V with 5 V-tolerant I/O and supports industrial temperature range (−40 °C to +85 °C), targeting embedded control in sensor interfaces and low-power instrumentation.

For engineers reviewing the P89LPC935FDH,518 datasheet, P89LPC935FDH,518 pinout, P89LPC935FDH,518 application, or P89LPC935FDH,518 equivalent, key selection criteria include its dual ADC capability, CCU-based PWM generation, on-chip EEPROM for parameter storage, and compatibility with ISP/IAP firmware updates in deployed systems.

Technical Context

The P89LPC935FDH,518 implements an enhanced 80C51 core executing instructions in 2–4 clocks-six times faster than standard 80C51 at same frequency-enabling 111 ns to 222 ns instruction cycles at 18 MHz. Its architecture integrates dual 8-bit A/D converters (ADC0 and ADC1), analog comparators with selectable references, and a dedicated Capture/Compare Unit supporting input capture, output compare, and PWM functions.

It features a configurable on-chip oscillator (20 kHz–18 MHz), fractional baud rate UART, I²C (400 kHz), SPI, and watchdog timer with independent RC oscillator. Power management includes idle mode and two power-down modes with typical 1 μA total current in deep power-down (voltage comparators disabled), enabled by low-voltage reset and software-controlled wake-up via interrupt inputs.

Key Specifications

Pinout & Package

Package: TSSOP28 (plastic thin shrink small outline package; 28 leads; body width 4.4 mm; SOT361-1).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar 8-bit microcontroller applications.

Compared with P89LPC935FDH,518, P89LPC936FDH offers double flash capacity for complex firmware, while P89LPC935FHN delivers identical functionality in a smaller, thermally enhanced HVQFN package-neither requires schematic or layout revision beyond footprint adaptation.

Availability

P89LPC935FDH,518 is available at Aetrix Electronics and suitable for industrial sensor nodes, smart meter interfaces, PLC I/O modules, and LED lighting control requiring stable component supply, long-term lifecycle support, and traceable sourcing.

Supply support for P89LPC935FDH,518 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

NXP Semiconductors is a global semiconductor company specializing in secure connectivity solutions for automotive, industrial, and IoT applications, with leadership in microcontrollers, RF, and analog technologies.

The P89LPC935FDH,518 belongs to NXP's LPC900 family of enhanced 80C51 microcontrollers designed for cost-sensitive, low-power embedded control applications requiring integrated analog peripherals, robust communication interfaces, and field-upgradable firmware.

FAQ

What is the maximum operating frequency of the P89LPC935FDH,518?

The P89LPC935FDH,518 supports a maximum CPU clock frequency of 18 MHz. This is achievable using the internal RC oscillator (fine-tunable), external crystal/resonator, or external clock source. At 18 MHz, instruction cycle times range from 111 ns to 222 ns-six times faster than a standard 80C51 running at the same frequency. The P89LPC935FDH,518 datasheet specifies this limit under the recommended operating conditions for VDD = 2.4 V to 3.6 V and temperature −40 °C to +85 °C.

Does the P89LPC935FDH,518 support in-system programming (ISP)?

Yes, the P89LPC935FDH,518 supports In-System Programming (ISP) via its UART or I²C interface, allowing firmware updates while the device is soldered into the target application. No external programmer or socket is required. ISP is initiated by holding P1.5/RST low during power-up with VDD rising through the valid range, and it uses the on-chip bootloader. This capability is integral to the P89LPC935FDH,518 design and documented in the NXP User Manual.

How many analog-to-digital converter (ADC) channels does the P89LPC935FDH,518 have?

The P89LPC935FDH,518 includes two independent 8-bit ADC subsystems: ADC0 and ADC1. ADC0 supports four analog inputs (AD00–AD03), and ADC1 supports four analog inputs (AD10–AD13), for a total of eight configurable ADC channels. Both ADCs can operate simultaneously or in sequence, and their inputs are mapped to specific Port 0 and Port 2 pins as defined in the P89LPC935FDH,518 pin description table.

What is the purpose of the Capture/Compare Unit (CCU) in the P89LPC935FDH,518?

The Capture/Compare Unit (CCU) in the P89LPC935FDH,518 provides four output compare channels (OCA, OCB, OCC, OCD) and two input capture channels (ICA, ICB). It enables hardware-timed PWM generation, precise edge-triggered timestamping (e.g., for encoder position), and synchronized event generation. These functions offload timing-critical tasks from the CPU, improving determinism in motor control, lighting, and measurement applications-all implemented within the P89LPC935FDH,518 without external logic.

Is the P89LPC935FDH,518 pin-compatible with other devices in the LPC93x family?

Yes, the P89LPC935FDH,518 is pin-compatible with P89LPC933FDH, P89LPC934FDH, and P89LPC936FDH in the same TSSOP28 package (SOT361-1). All share identical pin numbering, electrical characteristics, and core peripheral mapping. Differences lie in flash size (4/8/16 kB), presence of auxiliary RAM (512-byte only in P89LPC935FDH,518 and P89LPC936FDH), and ADC/CCU availability-making the P89LPC935FDH,518 a direct drop-in replacement for P89LPC933FDH/P89LPC934FDH where those features are needed.