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NXP Semiconductors P89V660FBC,557
- Part No.:
- P89V660FBC,557
- Manufacturer:
- NXP Semiconductors
- Category:
- Microcontrollers
- Package:
- 44-TQFP
- Datasheet:
-
P89V660FBC,557.pdf
- Description:
- IC MCU 8BIT 16KB FLASH 44TQFP
- Quantity:
- Payment:
- Shipping:
Inventory:2,715
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Product details
Overview
P89V660FBC,557 from NXP Semiconductors is an 8-bit 80C51 microcontroller with 32 kB on-chip flash code memory, 1 kB RAM, dual I²C-bus interfaces (primary and secondary), SPI, and four 16-bit timers - deployed in industrial control systems requiring firmware-upgradable embedded logic with non-volatile data storage via 128-byte page-erasable flash.
For engineers reviewing the P89V660FBC,557 datasheet, P89V660FBC,557 pinout, P89V660FBC,557 application, or P89V660FBC,557 equivalent, this device supports drop-in software compatibility with legacy P89C660/662/664, offers 0–40 MHz operation in 12x mode, includes Port 4 for expanded I/O, and enables efficient code-memory reuse via IAP-driven 128-byte page erase.
Technical Context
The P89V660FBC,557 implements a standard 80C51 CPU core with enhanced peripheral integration: dual independent I²C-bus controllers (SCL/SDA and SCL_1/SDA_1), full-duplex SPI with master/slave support (SPICLK/MOSI/MISO/SS), and a five-channel Programmable Counter Array (PCA) supporting PWM, capture, and compare functions across CEX0–CEX4 pins.
Memory architecture includes 32 kB flash (128-byte page erasable in ≤30 ms), 1 kB internal RAM, 768 B XDATA RAM, and dual DPTR registers selectable via DPS bit - enabling simultaneous access to multiple external memory regions or internal buffers without software overhead.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Core Architecture | 80C51-compatible 8-bit CPU with 6-clock and 12-clock mode selection |
| Flash Memory | 32 kB on-chip flash with 128-byte page erase (≤30 ms) for firmware + NV data storage |
| RAM | 1 kB internal RAM + 768 B XDATA RAM accessible via MOVX with EXTRAM=1 |
| Operating Frequency | 0–40 MHz in 12x mode; 0–20 MHz in 6x mode; crystal or resonator supported |
| I/O Ports | Four 8-bit ports (P0–P3) plus 4-bit Port 4 (P4[0]–P4[3]) with internal pull-ups |
| Peripherals | Dual I²C-bus (100 kHz), SPI, UART, PCA (5 channels), 3×16-bit timers, WDT, 10-interrupt sources |
| Package | TQFP44 (10 × 10 × 1.0 mm); lead-free, RoHS-compliant |
Pinout & Package
TQFP44 package: 44-pin plastic thin quad flat package, body size 10 × 10 × 1.0 mm, exposed pad not specified, moisture sensitivity level (MSL) per NXP standard.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| P0[0]–P0[7] | Port 0 bidirectional I/O / AD0–AD7 | Open-drain port; multiplexed low-order address/data bus for external memory access |
| P1[0]/T2, P1[1]/T2EX | Timer 2 I/O | T2: external count input or clock-out; T2EX: capture/reload trigger and direction control |
| P1[6]/SCL, P1[7]/SDA | Primary I²C-bus interface | Standard 100 kHz I²C serial clock and data lines with open-drain drive capability |
| P2[0]–P2[7] | Port 2 bidirectional I/O / A8–A15 | High-order address bus during external memory accesses; internal pull-up enabled |
| P3[0]/RXD, P3[1]/TXD | UART serial interface | Full-duplex asynchronous communication; compatible with standard 80C51 framing |
| P4[0]/SCL_1/SPICLK | Secondary I²C clock / SPI clock | Shared pin: second I²C bus clock or SPI master/slave clock signal |
| P4[1]/SDA_1/MISO | Secondary I²C data / SPI MISO | Shared pin: second I²C bus data line or SPI master-in/slave-out signal |
| P4[2]/MOSI, P4[3]/SS | SPI data and slave select | MOSI: master-out/slave-in; SS: active-low chip select for SPI slave operation |
| RST, EA, ALE/PROG | Reset, external access, address latch | RST: active-high reset; EA: VDD = internal execution, VSS = external code fetch; ALE/PROG: address latch enable or flash programming pulse |
| XTAL1, XTAL2 | Crystal oscillator inputs | Connects to quartz crystal or ceramic resonator (1–20 MHz typical); internal oscillator circuitry |
Key Features
| Feature | Design Value |
|---|---|
| Dual I²C-bus interfaces | Enables concurrent communication with two separate I²C peripherals (e.g., sensor + EEPROM) without software arbitration |
| 128-byte flash page erase | Allows fine-grained non-volatile data logging in code memory without disrupting firmware execution |
| Port 4 (4-bit) | Provides dedicated GPIO expansion beyond standard 80C51 ports, supporting SPI and secondary I²C functions |
| In-Application Programming (IAP) | Permits runtime firmware updates or parameter storage using on-chip boot ROM without external programmer |
| Programmable 6x/12x mode | Switches CPU clock division dynamically via ISP/IAP or parallel programming - no hardware change required |
| Five-channel PCA | Supports simultaneous PWM generation (e.g., motor control), input capture (e.g., pulse width measurement), and event timing |
Applications
| Industrial PLC I/O Module | Smart Sensor Hub |
|---|---|
Use Scenario: Local logic in DIN-rail mounted I/O modules handling analog/digital signal conditioning, relay control, and fieldbus bridging. IC Role / Device Role / Timing Role: Main controller executing ladder logic, managing SPI-connected ADCs/DACs, and driving isolated digital outputs via Port 0/2. Use Value: 32 kB flash stores multiple firmware versions; dual I²C interfaces manage local temperature/humidity sensors and EEPROM configuration storage. |
Use Scenario: Aggregation node collecting data from heterogeneous sensors (I²C accelerometers, SPI pressure transducers, UART GPS). IC Role / Device Role / Timing Role: Central coordinator with real-time scheduling via three 16-bit timers and interrupt prioritization across ten sources. Use Value: Port 4 enables concurrent SPI and secondary I²C without pin conflict; 128-byte page erase allows timestamped sensor log storage in flash. |
| Legacy Equipment Retrofit Controller | Energy Meter Communication Interface |
Use Scenario: Drop-in replacement for obsolete P89C662 in aging HVAC control panels requiring extended lifecycle support. IC Role / Device Role / Timing Role: Pin- and software-compatible upgrade delivering enhanced diagnostics via UART and remote update via IAP. Use Value: Identical PLCC44/TQFP44 footprint; same instruction set; added SPI and dual I²C enable future feature expansion without board redesign. |
Use Scenario: AMI (Advanced Metering Infrastructure) endpoint interfacing with metrology ICs and RF/PLC communication chips. IC Role / Device Role / Timing Role: Secure data handler using PCA for precise time-stamping of energy pulses and WDT for fail-safe reset under brownout. Use Value: Dual I²C buses isolate metrology (primary) and security module (secondary); 1 kB RAM buffers encrypted payload before transmission. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 80C51-based microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| P89V662FBC | Same TQFP44 package, identical pinout and peripherals, but with 32 kB flash (vs. 16 kB in P89V660FBC) | Required where larger firmware image or more NV data storage is needed without changing PCB layout | Select P89V662FBC when >16 kB code space is confirmed; P89V660FBC remains optimal for cost-sensitive 16 kB-constrained designs |
| P89V664FBC | Same package and pinout, but with 64 kB flash and 2 kB RAM (vs. 32 kB/1 kB in P89V660FBC) | Suitable for complex protocol stacks (e.g., Modbus TCP + TLS) where extended memory headroom is critical | Choose P89V664FBC only if firmware growth trajectory justifies higher unit cost and power; verify flash wear leveling requirements |
Compared with P89V662FBC and P89V664FBC, the P89V660FBC delivers optimal balance of flash capacity (32 kB), RAM (1 kB), and peripheral richness for mid-complexity industrial control - avoiding over-provisioning while retaining IAP, dual I²C, and SPI essential for modern edge-node functionality.
Availability
P89V660FBC,557 is available at Aetrix Electronics and suitable for industrial automation, smart metering, and legacy equipment retrofit requiring stable component supply, long-term manufacturability, and RoHS-compliant TQFP packaging.
Supply support for P89V660FBC,557 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor leader focused on secure connectivity solutions for automotive, industrial, and IoT applications.
The P89V660FBC,557 belongs to NXP's legacy 80C51 microcontroller family, designed specifically for cost-effective, pin-compatible upgrades of aging embedded systems while adding modern interfaces like dual I²C and SPI.
FAQ
What is the maximum operating frequency of the P89V660FBC,557?
The P89V660FBC,557 operates up to 40 MHz in 12x mode and up to 20 MHz in 6x mode. Frequency selection is programmable via ISP, IAP, or parallel programmer - no hardware modification is needed to switch modes. The oscillator accepts crystals or resonators connected between XTAL1 and XTAL2 pins.
Does the P89V660FBC,557 support in-application programming (IAP)?
Yes, the P89V660FBC,557 includes factory-programmed IAP boot code that enables firmware updates and non-volatile data storage directly from application code. It supports 128-byte page erase (≤30 ms) and full-block erase (150 ms), allowing safe reprogramming without halting system operation.
How many I²C-bus interfaces does the P89V660FBC,557 have, and how are they assigned?
The P89V660FBC,557 features two independent I²C-bus interfaces. The primary interface uses P1[6]/SCL and P1[7]/SDA. The secondary interface uses P4[0]/SCL_1 and P4[1]/SDA_1 - both operate at 100 kHz and support standard I²C protocol with slave addressing and arbitration.
What is the function of Port 4 on the P89V660FBC,557?
Port 4 is a 4-bit bidirectional I/O port (P4[0]–P4[3]) with internal pull-ups. Its pins serve dual roles: P4[0] is SCL_1/SPICLK, P4[1] is SDA_1/MISO, P4[2] is MOSI, and P4[3] is SS. This enables concurrent SPI and secondary I²C operation without external multiplexing.
Is the P89V660FBC,557 pin-compatible with earlier P89C660/662/664 devices?
Yes, the P89V660FBC,557 is a drop-in hardware replacement for P89C660/662/664 in TQFP44 package. It retains identical pinout, voltage levels, and timing - while adding Port 4, SPI, dual I²C, and 128-byte page erase. Software compatibility is maintained across all standard 80C51 instructions and SFR mappings.
P89V660FBC,557 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Package/Case:
- 44-TQFP
- Series:
- 89V
- Packaging:
- Tray
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Core Processor:
- 8051
- Core Size:
- 8-Bit
- Speed:
- 40MHz
- Connectivity:
- I2C, SPI, UART/USART
- Peripherals:
- POR, PWM, WDT
- Number of I/O:
- 36
- Program Memory Size:
- 16KB (16K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 512 x 8
- Voltage - Supply (Vcc/Vdd):
- 4.5V ~ 5.5V
- Data Converters:
- -
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
P89V660FBC,557 FAQ
1.How can I place an order for P89V660FBC,557 through Aetrix?
Please submit a Request for Quotation (RFQ) for P89V660FBC,557 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for P89V660FBC,557 reliable?
The price and inventory of P89V660FBC,557 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for P89V660FBC,557 is usually 5 days.
3.What payment methods are accepted for P89V660FBC,557?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for P89V660FBC,557 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for P89V660FBC,557?
P89V660FBC,557 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your P89V660FBC,557 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for P89V660FBC,557?
For technical support, including P89V660FBC,557 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your P89V660FBC,557 requirements.
6.How does Aetrix verify that P89V660FBC,557 is sourced from the original manufacturer or authorized distributors?
All P89V660FBC,557 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that P89V660FBC,557 meets industry standards.
7.What is the process for return or replacement of P89V660FBC,557?
All P89V660FBC,557 units undergo pre-shipment inspection (PSI). If there is an issue with P89V660FBC,557, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The P89V660FBC,557 part is unused and in its original packaging.
Return procedure for P89V660FBC,557:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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