NXP Semiconductors P89V664FBC,557
- Part No.:
- P89V664FBC,557
- Manufacturer:
- NXP Semiconductors
- Category:
- Microcontrollers
- Package:
- 44-TQFP
- Datasheet:
-
P89V664FBC,557.pdf
- Description:
- IC MCU 8BIT 64KB FLASH 44TQFP
- Quantity:
- Payment:

- Shipping:

Inventory:3,852
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
P89V664FBC from NXP Semiconductors is an 8-bit 80C51 microcontroller with 64 kB on-chip flash, 2 kB RAM, dual I²C-bus interfaces (primary and secondary), SPI, and a 4-bit Port 4 - designed as a drop-in, software-compatible replacement for P89C664 in industrial control and embedded instrumentation applications.
For engineers reviewing the P89V664FBC datasheet, P89V664FBC pinout, P89V664FBC application, or P89V664FBC equivalent, key selection considerations include 128-byte page-erase capability for non-volatile data storage, 40 MHz max operating frequency in 12x mode, TQFP44 package compatibility, and dual I²C/SPI peripheral coexistence in resource-constrained designs.
Technical Context
The P89V664FBC implements an enhanced 80C51 CPU core with dual I²C-bus controllers (SCL/SDA on P1[6:7] and SCL_1/SDA_1 on P4[0:1]), full-duplex SPI (SPICLK/MOSI/MISO/SS on P4[0:3]), and a five-channel Programmable Counter Array supporting PWM, capture, and compare functions. It supports both 6-clock and 12-clock modes via ISP/IAP configuration.
Memory architecture includes 64 kB flash with 128-byte page erase (≤30 ms), 2 kB RAM (512 B internal + 1.5 kB expanded XRAM), and dual DPTR registers for efficient external memory access. The device operates from −40 °C to +85 °C with 5 V supply and integrates WDT, three 16-bit timers, and ten interrupt sources with four priority levels.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Core Architecture | Enhanced 80C51 CPU with 6-clock/12-clock mode selection and software compatibility with P89C664. |
| Flash Memory | 64 kB on-chip flash with 128-byte page erase (≤30 ms) enabling efficient non-volatile data storage alongside firmware. |
| RAM | 2 kB total: 512 B internal RAM + 1.5 kB expanded XRAM accessible via MOVX when EXTRAM=1. |
| Operating Frequency | 0–40 MHz in 12x mode; 0–20 MHz in 6x mode - configurable via ISP/IAP or parallel programmer. |
| I/O Ports | Four 8-bit ports (P0–P3) plus one 4-bit Port 4 (P4[0:3]), supporting SPI, secondary I²C, and PCA I/O functions. |
| Peripherals | Dual I²C-bus (100 kHz byte-wide), SPI, enhanced UART, five-channel PCA, three 16-bit timers, WDT, and ten interrupt sources. |
| Package | TQFP44 (10 × 10 × 1.0 mm, SOT376-1) with lead-free finish and industrial temperature range (−40 °C to +85 °C). |
Pinout & Package
TQFP44 package (SOT376-1), 10 × 10 × 1.0 mm body, 44-pin quad flat layout with exposed pad option not specified. Pin functions validated per NXP Rev. 3.1 datasheet (October 2011).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| P0[0]–P0[7] | Port 0 bidirectional I/O / AD0–AD7 | Open-drain port; multiplexed low-order address/data bus for external memory access; requires external pull-ups for GPIO use. |
| P1[0]/T2, P1[1]/T2EX, P1[2]/ECI, P1[3–4]/CEX0–1, P1[5]/CEX2, P1[6]/SCL, P1[7]/SDA | Port 1 with PCA & primary I²C | PCA channel I/O (CEX0–CEX2), Timer2 I/O (T2/T2EX), PCA clock input (ECI), and primary I²C interface (SCL/SDA). |
| P2[0]–P2[7]/A8–A15 | Port 2 bidirectional I/O / A8–A15 | High-order address bus for external memory; internal pull-ups enable direct GPIO use without external resistors. |
| P3[0]/RXD, P3[1]/TXD, P3[2]/INT0, P3[3]/INT1, P3[4]/T0/CEX3, P3[5]/T1/CEX4, P3[6]/WR, P3[7]/RD | Port 3 with serial & control functions | UART I/O, external interrupts, PCA channels 3–4, and external memory control signals (WR/RD). |
| P4[0]/SCL_1/SPICLK, P4[1]/SDA_1/MISO, P4[2]/MOSI, P4[3]/SS | Port 4 with secondary I²C & SPI | Dedicated pins for second I²C bus (SCL_1/SDA_1) and full SPI interface (SPICLK/MOSI/MISO/SS) - no function sharing. |
| RST, EA, ALE/PROG, XTAL1, XTAL2, VDD, VSS | Power, clock, reset & control | Standard 80C51 control signals: reset active-high, EA enables internal/external code fetch, ALE latches address, crystal oscillator interface. |
Key Features
| Feature | Design Value |
|---|---|
| 128-byte flash page erase | Enables reliable non-volatile data logging within code memory space without requiring external EEPROM. |
| Dual independent I²C-bus interfaces | Allows concurrent communication with two separate I²C slave networks (e.g., sensor hub + display controller) without software arbitration. |
| Full-duplex SPI master/slave | Supports high-speed peripheral interfacing (e.g., ADCs, DACs, flash memory) with dedicated MOSI/MISO/SPICLK/SS pins on Port 4. |
| Five-channel PCA with PWM | Provides precise timing control for motor drives, LED dimming, or pulse-width modulation without consuming main CPU cycles. |
| Expanded 2 kB RAM architecture | Combines 512 B internal RAM with 1.5 kB on-chip XRAM - accessed via MOVX with EXTRAM bit, eliminating need for external RAM in many designs. |
| Drop-in P89C664 replacement | Maintains identical instruction set, memory map, and interrupt vector layout - enabling legacy firmware reuse with minimal requalification. |
Applications
| Industrial PLC I/O Module | Smart Energy Metering |
|---|---|
|
Use Scenario: Real-time acquisition of analog sensor inputs and digital status signals in DIN-rail mounted programmable logic controllers. IC Role / Device Role / Timing Role: Central 80C51 controller managing ADC interface via SPI, reading I²C-based temperature/humidity sensors, and driving relay outputs via PCA PWM. Use Value: Dual I²C and SPI allow simultaneous connection to multiple sensor ICs and metering ICs without bus contention or polling overhead. |
Use Scenario: Residential electricity meter with tamper detection, tariff switching, and LCD display using isolated communication interfaces. IC Role / Device Role / Timing Role: Main MCU executing metrology firmware, handling secure I²C EEPROM for tariff tables, and driving SPI-connected real-time clock and LCD controller. Use Value: 64 kB flash accommodates encrypted firmware + calibration data; 128-byte page erase enables safe over-the-air parameter updates. |
| Embedded HVAC Controller | Factory Automation Gateway |
|
Use Scenario: Compact wall-mounted thermostat with multi-sensor fusion (NTC, humidity, occupancy) and RS-485 Modbus output. IC Role / Device Role / Timing Role: Primary controller running PID loop, communicating with local I²C sensors and managing UART-to-RS485 translation via enhanced UART. Use Value: Port 4 SPI offloads UART conversion tasks; secondary I²C isolates sensor traffic from Modbus interface, improving determinism. |
Use Scenario: Protocol translator bridging legacy fieldbus (e.g., Profibus) to Ethernet/IP in manufacturing cell edge devices. IC Role / Device Role / Timing Role: Interface coordinator managing I²C EEPROM for configuration, SPI-connected PHY, and dual I²C buses for diagnostics and sensor monitoring. Use Value: Dual I²C allows separate configuration storage (I²C-1) and real-time sensor telemetry (I²C-2), preventing bus saturation during firmware updates. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 8-bit microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| P89V662FBC | 32 kB flash, 1 kB RAM, identical peripherals and pinout - differs only in memory size and erase block count. | Suitable where firmware footprint is <32 kB and non-volatile data storage requirements are ≤1 kB. | Select when cost-sensitive designs do not require full 64 kB flash or 2 kB RAM headroom. |
| AT89C51ED2-RL24 | 64 kB flash, 1 kB RAM, single I²C, no secondary I²C or Port 4; different SFR mapping and ISP mechanism. | Lacks dual I²C and SPI coexistence; requires redesign for I²C/SPI concurrent use cases. | Choose only if dual I²C is unnecessary and legacy Atmel toolchain support is mandatory. |
Compared with P89V662FBC, the P89V664FBC provides double flash and RAM capacity for larger firmware and data buffers; compared with AT89C51ED2-RL24, it delivers true hardware-isolated dual I²C and dedicated SPI pins - critical for deterministic multi-peripheral systems.
Availability
P89V664FBC is available at Aetrix Electronics and suitable for industrial automation, smart metering, and embedded HVAC applications requiring stable component supply, long-term lifecycle support, and verified drop-in replacement capability.
Supply support for P89V664FBC includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor leader focused on secure connectivity solutions for automotive, industrial, and IoT markets, with deep heritage in 80C51 architecture development.
The P89V664FBC belongs to NXP's legacy 80C51 microcontroller product line, engineered specifically for cost-sensitive, reliability-critical industrial control applications requiring robust flash endurance and peripheral flexibility.
FAQ
What is the maximum operating frequency of the P89V664FBC?
The P89V664FBC supports up to 40 MHz in 12x mode and 20 MHz in 6x mode. Frequency mode is selected via ISP or parallel programming and affects instruction cycle timing - 12x mode delivers one instruction per 12 oscillator cycles, while 6x mode halves the cycle count for higher throughput at same crystal frequency.
Does the P89V664FBC support in-application programming (IAP)?
Yes, the P89V664FBC fully supports IAP with 128-byte page erase capability (≤30 ms per page). This enables firmware updates and non-volatile data storage directly from running application code without external programming hardware - a key feature distinguishing it from earlier P89C664 devices.
How does the dual I²C-bus interface work on the P89V664FBC?
The P89V664FBC implements two independent I²C controllers: primary (SCL/SDA on P1[6:7]) and secondary (SCL_1/SDA_1 on P4[0:1]). Each has dedicated SFRs (S1CON/S1DAT/S2CON/S2DAT), separate slave addresses, and autonomous operation - allowing concurrent communication with two distinct I²C networks without software arbitration.
What is the purpose of Port 4 on the P89V664FBC?
Port 4 is a dedicated 4-bit I/O port (P4[0:3]) providing hardware-mapped functions: SCL_1/SPICLK, SDA_1/MISO, MOSI, and SS. Unlike shared-function pins elsewhere, these assignments are fixed - enabling simultaneous use of secondary I²C and full-duplex SPI without pin conflict or mode switching overhead.
Is the P89V664FBC pin-compatible with the P89C664FA or P89C664FBC?
Yes, the P89V664FBC is pin-compatible with P89C664FBC (TQFP44) and P89C664FA (PLCC44) in identical package variants. All share the same pinout, voltage levels, and timing specifications - making it a true drop-in replacement with no PCB changes required for migration from P89C664 devices.
P89V664FBC,557 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Package/Case:
- 44-TQFP
- Series:
- 89V
- Packaging:
- Tray
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Core Processor:
- 8051
- Core Size:
- 8-Bit
- Speed:
- 40MHz
- Connectivity:
- I2C, SPI, UART/USART
- Peripherals:
- POR, PWM, WDT
- Number of I/O:
- 36
- Program Memory Size:
- 64KB (64K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 2K x 8
- Voltage - Supply (Vcc/Vdd):
- 4.5V ~ 5.5V
- Data Converters:
- -
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
P89V664FBC,557 FAQ
1.How can I place an order for P89V664FBC,557 through Aetrix?
Please submit a Request for Quotation (RFQ) for P89V664FBC,557 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for P89V664FBC,557 reliable?
The price and inventory of P89V664FBC,557 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for P89V664FBC,557 is usually 5 days.
3.What payment methods are accepted for P89V664FBC,557?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for P89V664FBC,557 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for P89V664FBC,557?
P89V664FBC,557 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your P89V664FBC,557 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for P89V664FBC,557?
For technical support, including P89V664FBC,557 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your P89V664FBC,557 requirements.
6.How does Aetrix verify that P89V664FBC,557 is sourced from the original manufacturer or authorized distributors?
All P89V664FBC,557 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that P89V664FBC,557 meets industry standards.
7.What is the process for return or replacement of P89V664FBC,557?
All P89V664FBC,557 units undergo pre-shipment inspection (PSI). If there is an issue with P89V664FBC,557, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The P89V664FBC,557 part is unused and in its original packaging.
Return procedure for P89V664FBC,557:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
P89V664FBC,557 Tags

-
ATTINY4-TSHR
Microchip Technology

-
ATTINY10-TSHR
Microchip Technology

-
ATTINY10-TS8R
Microchip Technology

-
ATTINY202-SSNR
Microchip Technology

-
ATTINY202-SSFR
Microchip Technology

-
ATTINY402-SSNR
Microchip Technology

-
PIC16F15213T-I/MF
Microchip Technology

-
PIC16F15213-E/MF
Microchip Technology

-
PIC10F200T-I/OT
Microchip Technology

-
ATTINY412-SSNR
Microchip Technology

-
PIC10F202T-I/OT
Microchip Technology

-
ATTINY404-SSNR
Microchip Technology
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

