Qorvo PAC5526QMSR
- Part No.:
- PAC5526QMSR
- Manufacturer:
- Qorvo
- Category:
- Application Specific Microcontrollers
- Package:
- 48-WFQFN Exposed Pad
- Datasheet:
-
PAC5526QMSR.pdf
- Description:
- 48V CHARGEPUMP MOTOR CONT DRIVER
- Quantity:
- Payment:

- Shipping:

Inventory:3,895
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Product details
Overview
PAC5526QMSR from Qorvo is a 48V Power Application Controller® (PAC) integrating a 150MHz Arm® Cortex®-M4F MCU core, 128kB FLASH/32kB SRAM, 2.5MSPS 12-bit ADC, configurable analog front-end (CAFE), and application-specific power drivers (ASPD) for BLDC motor control. It delivers integrated gate drive (3 high-side/3 low-side), charge pump + buck-boost power management, and CAN 2.0B interface in a single TQFN-48 package.
For engineers reviewing the PAC5526QMSR datasheet, pinout, applications, or equivalent options, this device serves as a system-on-chip solution for battery-powered 48V motor drives-requiring no external gate drivers, voltage regulators, or analog signal conditioning circuitry in typical implementations.
Technical Context
The PAC5526QMSR implements a tightly coupled SoC architecture where the Arm Cortex-M4F core directly controls PWM timing, dead-time insertion (16 hardware generators), and dynamic ADC sampling via the DTSE engine. Its Power Manager provides VM-referenced HVCP (VM + VP) and configurable 10V/12V MVBB outputs to drive high- and low-side MOSFETs independently.
The Configurable Analog Front-End includes 1 differential + 5 single-ended PGAs, 2 DACs, and programmable comparators with cycle-by-cycle over-current protection-enabling real-time current sensing, phase voltage monitoring, and closed-loop feedback without external op-amps or discrete protection circuits.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Core | 150MHz Arm Cortex-M4F with FPU, 8-region MPU, and ETM trace |
| Memory | 128kB FLASH (4-level code protection), 32kB SRAM with ECC |
| ADC | 12-bit, 2.5MSPS SAR with DTSE auto-sampling across 24 sequences |
| Power Drivers | 6-channel ASPD: 3 high-side (1A peak), 3 low-side, 100% duty cycle support |
| Power Management | HVCP (VM + VP), MVBB (10V/12V configurable), 5 LDOs (VSYS/VCCIO/VCC33/VCORE/VCC18) |
| Interfaces | CAN 2.0B, 3×USART (SPI/UART), I²C, SWD/JTAG, CRC engine |
| Operating Range | −40°C to +125°C ambient; VM input 6V–48V |
Pinout & Package
Package: TQFN-48 (6mm × 6mm, exposed thermal pad).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VM | Battery input supply | Main high-voltage rail (6–48V); feeds HVCP and MVBB; requires 1µF + 0.1µF bypass |
| VCP | High-side gate driver supply | Charge-pump output = VM + VP; powers DRHx drivers |
| VP | Low-side gate driver supply | MVBB output (10V or 12V); powers DRLx drivers and LDO chain |
| DRH1–DRH3 | High-side gate driver outputs | 3 dedicated outputs driving upper MOSFETs; 1A peak sink/source capability |
| DRL1–DRL3 | Low-side gate driver outputs | 3 dedicated outputs driving lower MOSFETs; supports 100% duty cycle |
| AIO0–AIO9 | Configurable analog front-end I/O | 6 pins support PGA/CMP/DAC/ADC functions; include differential inputs and push-button sense |
| PD0–PD15, PE0–PE7, PF0–PF7, PG0–PG7 | General-purpose I/O | 20 GPIOs with peripheral MUX (up to 8 functions per pin), 3.3V tolerant, 6–25mA drive |
| SW1/SW2 | MVBB switching node | Connects to 10µH inductor; defines buck-boost topology operation |
Key Features
| Feature | Design Value |
|---|---|
| Integrated Power Drivers | 3 high-side + 3 low-side gate drivers eliminate need for 6 external drivers and associated level-shifters |
| Configurable Analog Front-End | 1 differential + 5 single-ended PGAs enable direct shunt-based current sensing with programmable gain and offset |
| Dynamic Triggering & Sampling Engine | Hardware-accelerated ADC sequencing synchronized to PWM edges-no CPU overhead for motor commutation sampling |
| Hibernate Mode | 5µA VM supply current at 18V enables multi-year battery life in intermittent-use motor applications |
| On-die VM Sensing | Internal resistor divider allows battery voltage monitoring without external components or ADC channel allocation |
Applications
| Electric Power Tools | E-Bike Motor Controllers |
|---|---|
|
Use Scenario: Cordless drill/driver requiring rapid torque response, stall detection, and battery runtime optimization. IC Role / Device Role / Timing Role: System-on-chip controller managing FOC algorithm, 3-phase gate timing, battery telemetry, and thermal shutdown. Use Value: Reduces BOM by consolidating MCU, gate drivers, power regulation, and analog sensing-cutting PCB area by >40% vs discrete solutions. |
Use Scenario: Mid-drive e-bike controller operating from 36–48V Li-ion packs with pedal-assist and regenerative braking. IC Role / Device Role / Timing Role: Real-time motor commutation engine with CAN bus integration for display and sensor communication. Use Value: Enables precise 150MHz PWM resolution for smooth low-RPM torque and integrated fault logging via on-chip FLASH. |
| Industrial BLDC Pumps | Automotive HVAC Blowers |
|
Use Scenario: Sealed centrifugal pump for HVAC or fluid handling requiring IP67-rated compact design and EMI robustness. IC Role / Device Role / Timing Role: Closed-loop speed regulator using hall sensor or back-EMF commutation with integrated over-temperature protection. Use Value: Eliminates external voltage references and comparator networks-reducing calibration drift and component count. |
Use Scenario: 12V/48V dual-voltage automotive blower module meeting AEC-Q100 Grade 1 requirements. IC Role / Device Role / Timing Role: Safety-aware motor controller with ASIL-B capable diagnostics (CRC, memory ECC, voltage/temperature monitoring). Use Value: On-die power monitor (VMON) and persistent fault registers simplify ISO 26262 diagnostic coverage reporting. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar motor control applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| STSPIN32F0B | 48MHz Cortex-M0+, integrated 3-phase gate driver only (no buck-boost, no CAFE), 64kB FLASH | Limited to simpler trapezoidal control; lacks differential PGA, CAN, or hibernate mode | Choose for cost-sensitive, low-complexity fans or pumps where full FOC and battery telemetry are unnecessary |
| Infineon XMC4400-F100K512 | 120MHz Cortex-M4, no integrated gate drivers or power management; requires external drivers, regulators, and analog front-end | Higher BOM cost and layout complexity; flexible for custom topologies but longer development cycle | Choose when needing >512kB FLASH, Ethernet, or multi-axis synchronization not supported by PAC5526QMSR |
Compared with STSPIN32F0B and XMC4400-F100K512, the PAC5526QMSR delivers highest integration density for 48V BLDC systems-reducing total solution size by up to 35% while enabling faster time-to-market through elimination of 12+ external components typically required for gate drive, power, and analog signal conditioning.
Availability
PAC5526QMSR is available at Aetrix Electronics and suitable for electric power tools, e-bike controllers, industrial BLDC pumps, and automotive HVAC blowers requiring stable component supply across production lifecycles.
Supply support for PAC5526QMSR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Qorvo is a U.S.-based semiconductor company specializing in RF, power management, and motion control ICs for high-efficiency, high-reliability applications.
The PAC5526QMSR belongs to Qorvo's Power Application Controller® family, designed specifically to replace multi-chip motor control subsystems with a single, thermally optimized SoC for battery-powered 48V BLDC applications.
FAQ
What is the maximum VM input voltage supported by the PAC5526QMSR?
The PAC5526QMSR supports a VM input voltage range of 6V to 48V, with absolute maximum rating of 48V. Operation above 48V may cause permanent damage. The internal HVCP and MVBB regulators are designed to maintain stable gate drive supplies across this full range, enabling compatibility with nominal 48V battery systems including those with transient overvoltage conditions up to 48V.
Does the PAC5526QMSR support Field-Oriented Control (FOC) algorithms?
Yes, the PAC5526QMSR supports real-time FOC implementation via its 150MHz Cortex-M4F core with FPU, 2.5MSPS ADC with DTSE-triggered sampling, and 16 hardware dead-time generators. The integrated CAFE provides differential current sensing capability, and the ASPD enables precise 3-phase gate timing-making it suitable for sensorless or hall-based FOC in 48V BLDC applications without external signal conditioning.
How does hibernate mode function on the PAC5526QMSR?
The PAC5526QMSR achieves ultra-low-power hibernate mode with typical VM supply current of 5µA at 18V. In this state, the MCU core, all LDOs, and power regulators are shut down. Wake-up can be triggered by a configurable timer (8ms–4s) or an external push-button event on AIO6. Upon exit, the device performs full power-up sequence and MCU reinitialization, retaining only persistent power/temperature fault status bits.
Can the PAC5526QMSR operate without external gate driver components?
Yes-the PAC5526QMSR integrates six application-specific power drivers (3 high-side, 3 low-side) capable of 1A peak gate drive current and 100% duty cycle operation. These drivers eliminate the need for external high-side level shifters or discrete gate drivers in standard 3-phase BLDC inverters, reducing component count and layout complexity while maintaining robust shoot-through protection.
What analog sensing capabilities does the PAC5526QMSR provide?
The PAC5526QMSR includes a Configurable Analog Front-End (CAFE) with 1 differential and 5 single-ended programmable gain amplifiers, 2 DACs, 5 comparators (including phase and protection types), and 6 analog I/O pins. This enables direct shunt-based current sensing, phase voltage monitoring, temperature sensing, and over-current protection-all without external op-amps or discrete comparators.
PAC5526QMSR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Qorvo
- Series:
- PAC55xx
- Package/Case:
- 48-WFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- -
- Applications:
- BLDC Controller, Motor Control
- Core Processor:
- ARM® Cortex®-M4F
- Program Memory Type:
- FLASH (128kB)
- Controller Series:
- PAC™
- RAM Size:
- 32K x 8
- Interface:
- CAN, I2C, SPI, UART/USART
- Number of I/O:
- 20
- Voltage - Supply:
- 1.8V, 3.3V
- Operating Temperature:
- -40°C ~ 125°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 48-TQFN (6x6)
PAC5526QMSR FAQ
1.How can I place an order for PAC5526QMSR through Aetrix?
Please submit a Request for Quotation (RFQ) for PAC5526QMSR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for PAC5526QMSR reliable?
The price and inventory of PAC5526QMSR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PAC5526QMSR is usually 5 days.
3.What payment methods are accepted for PAC5526QMSR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PAC5526QMSR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for PAC5526QMSR?
PAC5526QMSR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your PAC5526QMSR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for PAC5526QMSR?
For technical support, including PAC5526QMSR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PAC5526QMSR requirements.
6.How does Aetrix verify that PAC5526QMSR is sourced from the original manufacturer or authorized distributors?
All PAC5526QMSR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PAC5526QMSR meets industry standards.
7.What is the process for return or replacement of PAC5526QMSR?
All PAC5526QMSR units undergo pre-shipment inspection (PSI). If there is an issue with PAC5526QMSR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The PAC5526QMSR part is unused and in its original packaging.
Return procedure for PAC5526QMSR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
PAC5526QMSR Tags

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CYPD3175-24LQXQ
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SLB9672VU20FW1523XTMA1
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SLB9670VQ20FW785XTMA1
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AT97SC3204-U2A1A-20
Microchip Technology

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SLM9670AQ20FW1311XTMA1
Infineon Technologies

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SLB9672XU20FW1613XTMA1
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SLB9672AU20FW1613XTMA1
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SLB9673AU20FW2613XTMA1
Infineon Technologies
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