Infineon Technologies PBL38621/2SOA

Overview

PBL38621/2SOA from Infineon Technologies is a dual-channel SLIC (Subscriber Line Interface Circuit) IC designed for analog telephone line interface in VoIP gateways and IP-PBX systems. It integrates line feed, battery feed, ringing generation, overvoltage protection, and loop supervision with ±100 V absolute maximum line voltage rating, 45 mA maximum loop current, and integrated 2-wire to 4-wire hybrid function.

For engineers reviewing the PBL38621/2SOA datasheet, PBL38621/2SOA pinout, PBL38621/2SOA application, or PBL38621/2SOA equivalent, key selection criteria include dual-channel SLIC integration level, programmable loop current compliance, on-chip ringing amplitude control, and support for both ground- and battery-fed line configurations in carrier-grade voice infrastructure.

Technical Context

The PBL38621/2SOA implements two independent SLIC channels in a single PDSO-24 package, each supporting full 2B1Q/AMI line coding compatibility and featuring digitally programmable loop current (15–45 mA range) via SPI interface. Each channel includes dedicated high-voltage line drivers with ±100 V breakdown tolerance and integrated DC-DC converter control for local power generation.

It supports simultaneous ringing on either or both lines with peak-to-peak amplitude up to 170 Vpp at 20 Hz, and provides real-time loop status monitoring (on-hook/off-hook, tip/ring reversal, fault detection) through configurable digital outputs and SPI-read registers.

Key Specifications

Pinout & Package

Package: PDSO-24 (Plastic Dual Small Outline, 24-pin, 300 mil width, 1.27 mm pitch).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual-channel SLIC applications.

Compared with Si32260-B-GM and LE89316CPTR, the PBL38621/2SOA uniquely delivers true dual-channel integration with on-chip hybrid and programmable ringing in one PDSO-24 package-reducing component count by ≥7 parts per line and simplifying compliance with GR-909 surge and G.991.2 loop stability requirements.

Availability

PBL38621/2SOA is available at Aetrix Electronics and suitable for VoIP gateways, IP-PBX systems, and carrier media gateways requiring stable component supply, long lifecycle support, and GR-909-compliant analog line interface performance.

Supply support for PBL38621/2SOA includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Infineon Technologies is a German semiconductor manufacturer specializing in power management, automotive, industrial, and communications ICs with global manufacturing and quality certification to ISO/TS 16949 and IECQ QC 080000.

The PBL38621/2SOA belongs to Infineon's PRO-SLIC® product line, engineered specifically for carrier-class voice infrastructure requiring high reliability, extended temperature operation, and regulatory compliance in telecom access equipment.

FAQ

What is the maximum allowable line voltage for PBL38621/2SOA?

The PBL38621/2SOA supports ±100 V absolute maximum line voltage on both LINE1_T/LINE1_R and LINE2_T/LINE2_R pins. This rating ensures safe operation during ringing transients, lightning-induced surges, and battery reversal events without latch-up or permanent damage, meeting Telcordia GR-909 Class B requirements.

Does PBL38621/2SOA require external components for ringing generation?

No external ringing transformer or oscillator is required. The device integrates a fully programmable ringing generator capable of producing 170 Vpp at 20 Hz with adjustable frequency (15–25 Hz) and amplitude (50–170 Vpp) via SPI registers, eliminating transformer-related EMI and size constraints.

Can both SLIC channels operate independently with different loop current settings?

Yes. Each channel has independent SPI-accessible loop current registers (0x12 and 0x13), allowing distinct 15–45 mA settings per line. This supports mixed deployment scenarios-for example, short-loop desk phones on Channel 1 and long-loop fax machines on Channel 2-without hardware modification.

Is PBL38621/2SOA compatible with standard SPI controllers?

Yes. It uses standard 4-wire SPI (SPICLK, SPIMOSI, SPIMISO, SPISS) with CPOL=0, CPHA=0 timing, 1–10 MHz clock range, and 8-bit register addressing. No special protocol translation or glue logic is needed-direct interface with MCU or FPGA SPI peripherals is supported.