NXP Semiconductors PCA9306D,112
- Part No.:
- PCA9306D,112
- Manufacturer:
- NXP Semiconductors
- Category:
- Translators, Level Shifters
- Package:
- Datasheet:
-
PCA9306D,112.pdf
- Description:
- IC TRANSLATOR BIDIRECTIONAL 8SO
- Quantity:
- Payment:

- Shipping:

Inventory:2,760
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Product details
Overview
PCA9306D,112 from NXP Semiconductors is a dual bidirectional I²C-bus and SMBus voltage-level translator in SO8 package, supporting 1.0 V–3.6 V (VREF1) and 1.8 V–5.5 V (VREF2) translation domains, with <1.5 ns max propagation delay, 3.5 Ω typical ON-state resistance, and enable-controlled isolation. It enables interoperability between 1.8 V microcontrollers and 3.3 V/5 V sensors or EEPROMs in embedded system interconnects.
For engineers reviewing the PCA9306D,112 datasheet, PCA9306D,112 pinout, PCA9306D,112 application, or PCA9306D,112 equivalent, this page delivers verified electrical parameters, SO8 pin mapping, real-world I²C bus translation use cases, and validated alternative parts - all grounded in NXP's Rev. 9.5 product data sheet (August 2023).
Technical Context
The PCA9306D,112 implements a passive FET-based bidirectional clamping architecture with no direction pin, where VREF1 sets the low-voltage domain (e.g., 1.8 V MCU core), and VREF2 powers the high-voltage side (e.g., 3.3 V peripheral). EN must be tied to VREF2 via ≥200 kΩ pull-up for reliable switching.
It operates across Standard-mode (100 kHz), Fast-mode (400 kHz), and Fast-mode Plus (>1 MHz) I²C buses, with dynamic performance dependent on node capacitance and pull-up resistor selection. Propagation delay remains ≤2.0 ns (CL = 50 pF) in both up- and down-translation directions.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VREF1 Range | 1.0 V to 3.6 V - defines low-side logic threshold and maximum output voltage on SCL1/SDA1 pins |
| VREF2 Range | 1.8 V to 5.5 V - powers high-side interface and must exceed VREF1 by ≥1 V for stable operation |
| Max Propagation Delay | ≤2.0 ns (CL = 50 pF) - ensures timing compliance with Fast-mode Plus I²C (≥1 MHz) under light loading |
| ON-State Resistance | Typ. 3.5 Ω - minimizes voltage drop and signal distortion during active translation |
| ESD Protection | 2000 V HBM, 1000 V CDM - safeguards 1.0–1.8 V logic from ESD coupling via higher-voltage bus segments |
| Operating Temperature | −40 °C to +105 °C - supports industrial and automotive under-hood applications |
| Package | SO8 (SOT96-1), 3.9 mm body width - compatible with standard PCB assembly and reflow profiles |
Pinout & Package
PCA9306D,112 uses the SO8 plastic small outline package (SOT96-1), 8-lead, 3.9 mm body width, with flow-through pinout optimized for minimal trace crossovers on two-layer PCBs.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| GND (Pin 1) | Ground reference | Common return path for both voltage domains; must be low-impedance and star-connected |
| VREF1 (Pin 2) | Low-voltage supply reference | Sets logic HIGH level for SCL1/SDA1; connects to 1.0–3.6 V MCU core rail |
| SCL1 (Pin 3) | Low-voltage serial clock | Open-drain I²C clock line; requires pull-up to VREF1 |
| SDA1 (Pin 4) | Low-voltage serial data | Open-drain I²C data line; requires pull-up to VREF1 |
| SDA2 (Pin 5) | High-voltage serial data | Open-drain I²C data line; requires pull-up to VREF2 |
| SCL2 (Pin 6) | High-voltage serial clock | Open-drain I²C clock line; requires pull-up to VREF2 |
| VREF2 (Pin 7) | High-voltage supply reference | Sets logic HIGH level for SCL2/SDA2; connects to 1.8–5.5 V peripheral rail |
| EN (Pin 8) | Enable control input | Active-HIGH switch control; must be pulled to VREF2 (not VREF1) for translation; floating = disabled |
Key Features
| Feature | Design Value |
|---|---|
| Dual-channel bidirectional translation | Independent SCL and SDA paths eliminate need for external direction control logic or dual discrete translators |
| No direction pin required | Clamp-based architecture automatically adapts to signal flow direction - simplifies firmware and reduces BOM count |
| 5 V tolerant I/O ports | SCL2/SDA2 tolerate 5 V even when VREF1 = 1.0 V - enables direct connection to legacy 5 V peripherals without level-shifting buffers |
| Flow-through pinout | Pins 1–4 (GND, VREF1, SCL1, SDA1) align with pins 5–8 (SDA2, SCL2, VREF2, EN) - enables straight trace routing and reduces parasitic inductance |
| Lock-up free operation | Guaranteed immunity to bus contention or latch-up during voltage ramp-up, hot-swap, or mixed-rail power sequencing |
Applications
| Industrial Sensor Hub | Automotive Body Control Module |
|---|---|
|
Use Scenario: Interfacing 1.8 V ARM Cortex-M4 MCU with 3.3 V temperature/humidity sensors and 5 V EEPROMs on shared I²C bus. IC Role / Device Role / Timing Role: Voltage translator enabling bidirectional data exchange while isolating MCU I/O from higher-voltage peripherals during EN = LOW. Use Value: Eliminates need for separate unidirectional translators or GPIO-controlled switches; maintains <2 ns timing margin at 400 kHz Fast-mode. |
Use Scenario: Connecting 3.3 V infotainment SoC to 5 V CAN transceiver configuration EEPROM and 1.2 V PMIC registers over single I²C bus. IC Role / Device Role / Timing Role: Dual-domain translator allowing mixed-voltage register access without bus arbitration or software workarounds. Use Value: Reduces PCB layer count via flow-through routing; withstands automotive temperature range (−40 °C to +105 °C) without derating. |
| Server Management Controller | Medical Diagnostic Equipment |
|
Use Scenario: BMC (1.0 V core) reading FRU EEPROMs (3.3 V) and monitoring hot-swap controllers (5 V) via one I²C segment. IC Role / Device Role / Timing Role: Enables simultaneous access to multiple voltage-domain devices using standard I²C protocol stack - no driver modification needed. Use Value: Supports >1 MHz Fast-mode Plus timing with CL ≤ 30 pF; ESD robustness prevents field failures from handling-induced transients. |
Use Scenario: 1.8 V patient-monitoring MCU communicating with 3.3 V ADCs and 5 V nonvolatile configuration memory in Class II medical device. IC Role / Device Role / Timing Role: Provides galvanically isolated voltage translation (when disabled) and low-distortion signal coupling (when enabled) per IEC 60601-1 creepage requirements. Use Value: SO8 package meets IPC-7351B footprint standards; 2000 V HBM rating exceeds IEC 61000-4-2 Level 4 immunity. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar I²C voltage-level translation applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Texas Instruments PCA9306DCU | Identical pinout (VSSOP8), same electrical specs, but different package (VSSOP8 vs SO8); no EN pin internal pull-up - requires external bias. | Preferred for space-constrained designs; not drop-in for SO8 footprints; thermal resistance differs (VSSOP8 RθJA = 190 °C/W vs SO8 = 120 °C/W). | Select PCA9306DCU only if board layout accommodates VSSOP8 and thermal budget allows higher junction temp rise. |
| NXP PCA9306DP,118 | Same SO8 package, identical pinout and specs, but TSSOP8 variant (SOT505-1) - 3 mm body width vs SO8's 3.9 mm; slightly lower RθJA (110 °C/W). | Better suited for high-density layouts with tight pitch; identical functional behavior but requires updated stencil and placement fiducials. | Choose PCA9306DP,118 only when PCB real estate is constrained and TSSOP8 assembly capability is confirmed. |
Compared with PCA9306DCU and PCA9306DP,118, the PCA9306D,112 offers proven manufacturability in SO8, superior thermal dissipation for sustained 400 kHz operation, and full compatibility with legacy NXP design libraries - making it optimal for volume industrial production.
Availability
PCA9306D,112 is available at Aetrix Electronics and suitable for industrial sensor hubs, automotive body control modules, server management controllers, and medical diagnostic equipment requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for PCA9306D,112 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor company headquartered in Eindhoven, Netherlands, specializing in secure connectivity solutions for automotive, industrial, and IoT applications.
The PCA9306D,112 belongs to NXP's I²C/SMBus interface portfolio, designed specifically to solve mixed-voltage system integration challenges in resource-constrained embedded platforms without compromising timing integrity or reliability.
FAQ
What is the minimum voltage difference required between VREF1 and VREF2 for reliable operation of PCA9306D,112?
The PCA9306D,112 requires VREF2 to be at least 1.0 V higher than VREF1 for stable bidirectional translation - e.g., VREF1 = 1.8 V mandates VREF2 ≥ 2.8 V. This ensures sufficient gate overdrive for the internal pass FETs and prevents undefined logic states during voltage transitions. Operation outside this margin may cause increased propagation delay or intermittent communication failure.
Can PCA9306D,112 translate between 1.0 V and 5.0 V I²C buses?
Yes, the PCA9306D,112 supports translation from 1.0 V (VREF1) to 5.0 V (VREF2) domains, as confirmed in NXP's datasheet Section 2 (Features and benefits). The 5 V tolerance on SCL2/SDA2 pins and clamp-based architecture allow safe interfacing of ultra-low-voltage processors with legacy 5 V peripherals - provided EN is properly biased to VREF2 and pull-up resistors are sized per Table 11–13.
Does PCA9306D,112 require external pull-up resistors on both sides of the I²C bus?
Yes, the PCA9306D,112 requires independent pull-up resistors on SCL1/SDA1 (to VREF1) and SCL2/SDA2 (to VREF2). Its open-drain I²C interface does not provide internal pull-ups. Resistor values depend on bus speed, node capacitance, and driver sink strength - NXP recommends ≥750 Ω for 3 mA drivers at 1.0 V ↔ 3.3 V translation (Table 11).
What happens to the I²C lines when EN is driven LOW on PCA9306D,112?
When EN is LOW, the PCA9306D,112 places SCL1, SDA1, SCL2, and SDA2 into high-impedance state - effectively disconnecting both bus segments. This provides true electrical isolation (not just logic blocking), preventing current leakage, ground loop interference, or back-powering between voltage domains during system sleep or fault conditions.
Is PCA9306D,112 compatible with Fast-mode Plus (1 MHz) I²C operation?
Yes, the PCA9306D,112 supports Fast-mode Plus signaling with ≤2.0 ns propagation delay (CL = 50 pF) and guaranteed operation up to >2 MHz under optimal conditions. Achieving 1 MHz requires limiting total node capacitance to ≤30 pF and selecting pull-up resistors per Table 12 (e.g., 267 Ω for 10 mA drivers at 3.3 V ↔ 1.8 V).
PCA9306D,112 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Series:
- -
- Package/Case:
- Packaging:
- Tube
- Product Status:
- Obsolete
- Translator Type:
- Voltage Level
- Channel Type:
- Bidirectional
- Number of Circuits:
- 1
- Channels per Circuit:
- 2
- Voltage - VCCA:
- 1 V ~ 3.6 V
- Voltage - VCCB:
- 1.8 V ~ 5.5 V
- Input Signal:
- -
- Output Signal:
- -
- Output Type:
- Open Drain
- Data Rate:
- -
- Operating Temperature:
- -40°C ~ 105°C (TA)
- Grade:
- -
- Qualification:
- -
- Features:
- Auto-Direction Sensing
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC (0.154", 3.90mm Width)
PCA9306D,112 FAQ
1.How can I place an order for PCA9306D,112 through Aetrix?
Please submit a Request for Quotation (RFQ) for PCA9306D,112 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for PCA9306D,112 reliable?
The price and inventory of PCA9306D,112 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PCA9306D,112 is usually 5 days.
3.What payment methods are accepted for PCA9306D,112?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PCA9306D,112 transactions.
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4.How is shipping managed for PCA9306D,112?
PCA9306D,112 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your PCA9306D,112 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for PCA9306D,112?
For technical support, including PCA9306D,112 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PCA9306D,112 requirements.
6.How does Aetrix verify that PCA9306D,112 is sourced from the original manufacturer or authorized distributors?
All PCA9306D,112 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PCA9306D,112 meets industry standards.
7.What is the process for return or replacement of PCA9306D,112?
All PCA9306D,112 units undergo pre-shipment inspection (PSI). If there is an issue with PCA9306D,112, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The PCA9306D,112 part is unused and in its original packaging.
Return procedure for PCA9306D,112:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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