NXP Semiconductors PCA9306DC,125
- Part No.:
- PCA9306DC,125
- Manufacturer:
- NXP Semiconductors
- Category:
- Translators, Level Shifters
- Package:
- Datasheet:
-
PCA9306DC,125.pdf
- Description:
- IC TRANSLTR BIDIRECTIONAL 8VSSOP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
PCA9306DC,125 from NXP Semiconductors is a dual bidirectional I²C-bus and SMBus voltage-level translator in VSSOP8 package, supporting 1.0 V–3.6 V (VREF1) and 1.8 V–5.5 V (VREF2) translation domains with <1.5 ns propagation delay and 3.5 Ω ON-state resistance. It enables seamless interconnection between low-voltage microcontrollers (e.g., 1.8 V ARM cores) and higher-voltage peripherals (e.g., 3.3 V sensors or EEPROMs) without direction control.
For engineers reviewing the PCA9306DC,125 datasheet, PCA9306DC,125 pinout, PCA9306DC,125 application, or PCA9306DC,125 equivalent, this device is critical for mixed-voltage I²C system integration where timing integrity, ESD robustness (>2000 V HBM), and board-space-constrained designs demand verified bidirectional level shifting with flow-through routing.
Technical Context
The PCA9306DC,125 implements a passive FET-based clamping architecture with two independent bidirectional channels (SCL/SDA), each featuring symmetrical Ron and matched propagation characteristics across translation directions. Its EN input controls conduction state without affecting signal path impedance when active.
It operates under strict voltage constraints: VREF2 must exceed VREF1 by ≥1 V for reliable clamping, and all I/O pins are 5 V tolerant with open-drain configuration requiring external pull-up resistors on both sides. The device supports Standard-mode (100 kHz), Fast-mode (400 kHz), and Fast-mode Plus (>1 MHz) I²C operation depending on RC time constant and layout.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VREF1 Range | 1.0 V to 3.6 V - sets low-side logic HIGH threshold for SCL1/SDA1; defines minimum compatible core voltage (e.g., 1.2 V or 1.8 V SoCs) |
| VREF2 Range | 1.8 V to 5.5 V - supplies high-side reference and EN bias; enables interface to 3.3 V or 5 V peripherals |
| Propagation Delay | <1.5 ns (typ.) - preserves I²C timing margins up to Fast-mode Plus; avoids clock stretching in multi-controller systems |
| ON-State Resistance | 3.5 Ω (typ.) - minimizes voltage drop and signal distortion during translation; ensures clean logic transitions under 64 mA pass current |
| ESD Protection | >2000 V HBM, >1000 V CDM - protects sensitive low-voltage devices (e.g., 1.2 V FPGA I/O) from bus-induced transients |
| Operating Temperature | −40 °C to +105 °C - qualified for industrial and automotive-adjacent embedded applications with thermal cycling |
| Package | VSSOP8 (SOT765-1), 2.3 mm body width - enables high-density routing in space-limited PCBs such as wearables or sensor nodes |
Pinout & Package
VSSOP8 package (SOT765-1), 8-lead plastic very thin shrink small outline, 2.3 mm body width, 0.5 mm pitch, exposed pad optional. Pin 1 index marked; flow-through layout simplifies PCB trace routing with minimal layer transitions.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| GND | Ground reference | Common return for both voltage domains; must be low-impedance connection to avoid ground bounce during switching |
| EN | Enable control input | Active-HIGH switch control; requires pull-up to VREF2 (≥1 V above VREF1) for reliable activation; disables isolation when LOW |
| VREF1 | Low-voltage side supply | Bias for SCL1/SDA1 clamp circuitry; sets output HIGH level on low-voltage port; connects to core power rail (e.g., 1.8 V) |
| VREF2 | High-voltage side supply | Bias for SCL2/SDA2 clamp circuitry and EN input; sets output HIGH level on high-voltage port; connects to peripheral rail (e.g., 3.3 V) |
| SCL1 / SDA1 | Low-voltage I²C signals | Open-drain inputs/outputs referenced to VREF1; require external pull-up to VREF1; interface to 1.0–3.6 V controllers |
| SCL2 / SDA2 | High-voltage I²C signals | Open-drain inputs/outputs referenced to VREF2; require external pull-up to VREF2; interface to 1.8–5.5 V peripherals |
Key Features
| Feature | Design Value |
|---|---|
| Dual independent bidirectional channels | Enables simultaneous translation of SCL and SDA without shared timing skew or cross-talk; supports full I²C protocol transparency |
| No direction pin required | Eliminates GPIO overhead and firmware complexity in resource-constrained systems; removes risk of misconfigured direction control |
| Flow-through pinout | Allows straight-line PCB routing between controller and peripheral ports, reducing parasitic capacitance and improving signal integrity |
| Lock-up free operation | Guarantees no latch-up under overvoltage or hot-swap conditions; safe for live insertion into powered I²C buses |
| 5 V tolerant I/O | Permits direct connection to legacy 5 V peripherals without additional protection circuitry; extends compatibility across voltage generations |
Applications
| Industrial Sensor Hub | Automotive Body Control Module |
|---|---|
Use Scenario: Interfacing 1.8 V ARM Cortex-M4 microcontroller to 3.3 V temperature/humidity sensors and 5 V EEPROMs on same I²C bus. IC Role / Device Role / Timing Role: Bidirectional voltage translator enabling mixed-supply I²C communication while preserving timing compliance at 400 kHz. Use Value: Eliminates need for discrete MOSFET translators or complex GPIO-controlled direction logic, reducing BOM count and layout area by >40%. | Use Scenario: Connecting 1.2 V domain MCU to 3.3 V CAN transceiver configuration EEPROM and 5 V lighting driver registers via shared I²C bus. IC Role / Device Role / Timing Role: Level-shifting bridge between ultra-low-voltage safety-critical logic and higher-voltage subsystems with guaranteed ESD immunity. Use Value: Provides >2000 V HBM protection to prevent latch-up in harsh automotive environments, meeting ISO 10605 requirements without external TVS diodes. |
| Wearable Health Monitor | Edge AI Inference Node |
Use Scenario: Linking 1.0 V ultra-low-power RISC-V sensor hub to 1.8 V biometric ADC and 3.3 V Bluetooth LE radio using compact VSSOP8 footprint. IC Role / Device Role / Timing Role: Space-optimized voltage translator supporting sub-1.2 V operation with minimal propagation delay to maintain real-time sensor fusion latency. Use Value: Enables use of smallest available I²C translator package (VSSOP8) without sacrificing speed or reliability-critical for sub-100 mm² PCBs. | Use Scenario: Isolating 1.8 V AI accelerator core from 3.3 V memory-mapped configuration registers and 5 V power management ICs in edge inference gateway. IC Role / Device Role / Timing Role: High-speed bidirectional translator allowing dynamic reconfiguration of AI model parameters over I²C at Fast-mode Plus rates. Use Value: Supports >1 MHz effective I²C throughput with <1.5 ns delay, accelerating firmware update cycles and runtime parameter tuning. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar I²C voltage-level translation applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Texas Instruments PCA9306DCU | Identical pinout, electrical specs, and VSSOP8 package; same functional behavior per TI datasheet SLVSAC3B (2022) | Same mixed-voltage I²C bridging use case; validated for TI ecosystem designs | Select PCA9306DCU only if sourcing exclusively from TI-authorized channels or when TI-specific qualification documentation is required |
| NXP PCA9306DP,118 | TSSOP8 package (3 mm body width); identical internal silicon but larger footprint and 0.65 mm pitch vs. VSSOP8's 0.5 mm | Preferred for manual assembly or lower-density boards where thermal dissipation margin is prioritized over size | Choose PCA9306DP,118 when VSSOP8 placement or reflow yield is a concern, or when existing TSSOP8 land patterns are reused |
Compared with PCA9306DC,125, the PCA9306DCU offers identical performance in a functionally interchangeable package, while PCA9306DP,118 trades board-area efficiency for easier handling and slightly better thermal performance-making the VSSOP8 version optimal for miniaturized, high-volume production.
Availability
PCA9306DC,125 is available at Aetrix Electronics and suitable for industrial sensor hubs, automotive body control modules, wearable health monitors, and edge AI inference nodes requiring stable component supply with guaranteed long-term availability.
Supply support for PCA9306DC,125 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor leader focused on secure connectivity solutions for automotive, industrial, IoT, and mobile applications, with deep expertise in interface and power management ICs.
The PCA9306 product line delivers robust, pin-compatible I²C/SMBus level translators designed specifically for mixed-voltage embedded systems where reliability, ESD resilience, and timing predictability are non-negotiable.
FAQ
What voltage ranges does the PCA9306DC,125 support for level translation?
The PCA9306DC,125 supports translation between 1.0 V–3.6 V on the VREF1 side and 1.8 V–5.5 V on the VREF2 side. For reliable operation, VREF2 must be at least 1 V higher than VREF1. This allows common configurations like 1.8 V ↔ 3.3 V or 1.2 V ↔ 5 V, and the PCA9306DC,125 maintains signal integrity across these combinations with <1.5 ns propagation delay and 3.5 Ω ON-resistance.
Does the PCA9306DC,125 require external pull-up resistors?
Yes, the PCA9306DC,125 requires external pull-up resistors on both the SCL1/SDA1 (to VREF1) and SCL2/SDA2 (to VREF2) lines because it uses open-drain I/O architecture. Pull-up values depend on bus capacitance, drive strength, and target frequency-e.g., 2.2 kΩ is typical for 400 kHz operation with 3.3 V VREF2 and 100 pF total load. The PCA9306DC,125 itself does not integrate pull-ups.
Can the PCA9306DC,125 translate between different I²C bus speeds?
Yes, the PCA9306DC,125 supports Standard-mode (100 kHz), Fast-mode (400 kHz), and Fast-mode Plus (>1 MHz) I²C operation. Maximum achievable frequency depends on external RC time constant-specifically pull-up resistor value and total bus capacitance. With optimized layout and 15 mA drive capability, the PCA9306DC,125 achieves >2 MHz in lab conditions, though system-level timing margins must be verified per application.
Is the PCA9306DC,125 pin-compatible with other packages in the PCA9306 family?
No-while the PCA9306DC,125 (VSSOP8) shares identical functionality and pin functions with SO8, TSSOP8, and XQFN8 variants, its pinout is physically identical only to other VSSOP8 versions (e.g., PCA9306DC1,125). It is not pin-compatible with SO8 (SOT96-1) or TSSOP8 (SOT505-1) due to differing lead counts, pitch, and body dimensions. Always verify land pattern against SOT765-1 mechanical drawing when designing with PCA9306DC,125.
How does the EN pin function in the PCA9306DC,125?
The EN pin on the PCA9306DC,125 is an active-HIGH enable input that controls conduction between SCL1↔SCL2 and SDA1↔SDA2. When EN is HIGH (≥VREF2 − 0.3 V), the internal switches turn on, enabling bidirectional translation. When EN is LOW, both ports enter high-impedance isolation. EN must be pulled up to VREF2-not VREF1-to ensure proper biasing, and a 200 kΩ resistor is recommended per NXP application guidance for PCA9306DC,125.
PCA9306DC,125 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Series:
- -
- Package/Case:
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Translator Type:
- Voltage Level
- Channel Type:
- Bidirectional
- Number of Circuits:
- 1
- Channels per Circuit:
- 2
- Voltage - VCCA:
- 1 V ~ 3.6 V
- Voltage - VCCB:
- 1.8 V ~ 5.5 V
- Input Signal:
- -
- Output Signal:
- -
- Output Type:
- Open Drain
- Data Rate:
- -
- Operating Temperature:
- -40°C ~ 105°C (TA)
- Grade:
- -
- Qualification:
- -
- Features:
- Auto-Direction Sensing
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-VFSOP (0.091", 2.30mm Width)
PCA9306DC,125 FAQ
1.How can I place an order for PCA9306DC,125 through Aetrix?
Please submit a Request for Quotation (RFQ) for PCA9306DC,125 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for PCA9306DC,125 reliable?
The price and inventory of PCA9306DC,125 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PCA9306DC,125 is usually 5 days.
3.What payment methods are accepted for PCA9306DC,125?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PCA9306DC,125 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for PCA9306DC,125?
PCA9306DC,125 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your PCA9306DC,125 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for PCA9306DC,125?
For technical support, including PCA9306DC,125 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PCA9306DC,125 requirements.
6.How does Aetrix verify that PCA9306DC,125 is sourced from the original manufacturer or authorized distributors?
All PCA9306DC,125 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PCA9306DC,125 meets industry standards.
7.What is the process for return or replacement of PCA9306DC,125?
All PCA9306DC,125 units undergo pre-shipment inspection (PSI). If there is an issue with PCA9306DC,125, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The PCA9306DC,125 part is unused and in its original packaging.
Return procedure for PCA9306DC,125:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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