NXP Semiconductors PCA9306DC1/DG,125
- Part No.:
- PCA9306DC1/DG,125
- Manufacturer:
- NXP Semiconductors
- Category:
- Translators, Level Shifters
- Package:
- Datasheet:
-
PCA9306DC1/DG,125.pdf
- Description:
- IC TRANSLTR BIDIRECTIONAL 8VSSOP
- Quantity:
- Payment:

- Shipping:

Inventory:2,277
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
PCA9306DC1/DG,125 from NXP Semiconductors is a dual bidirectional I²C-bus and SMBus voltage-level translator in VSSOP8 package, supporting 1.0–3.6 V (VREF1) and 1.8–5.5 V (VREF2) translation domains, with <1.5 ns max propagation delay, 3.5 Ω typical ON-state resistance, and 5 V-tolerant I/O. It enables seamless interconnection between low-voltage microcontrollers and higher-voltage peripherals in embedded sensor hubs.
For engineers reviewing the PCA9306DC1/DG,125 datasheet, PCA9306DC1/DG,125 pinout, PCA9306DC1/DG,125 application, or PCA9306DC1/DG,125 equivalent, key selection criteria include bidirectional level-shifting without direction control, EN-enabled isolation, flow-through pinout for PCB routing, and compatibility with Standard-mode, Fast-mode, and Fast-mode Plus I²C systems up to >2 MHz.
Technical Context
The PCA9306DC1/DG,125 implements a passive MOSFET-based clamping architecture with two independent bidirectional channels (SCL/SDA), where voltage translation occurs via controlled conduction between VREF1 and VREF2 domains. Its enable input (EN) controls high-impedance isolation between ports, and operation requires pull-up resistors on both sides.
It supports asymmetric voltage translation-e.g., 1.8 V ↔ 3.3 V or 1.2 V ↔ 5 V-with VREF2 ≥ VREF1 + 1 V recommended for stable switching. The device exhibits matched electrical characteristics across channels and provides ESD protection exceeding 2000 V HBM and 1000 V CDM.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VREF1 Range | 1.0 V to 3.6 V - sets low-side logic threshold and maximum output voltage on SCL1/SDA1 |
| VREF2 Range | 1.8 V to 5.5 V - powers high-side interface and defines SCL2/SDA2 output swing |
| Max Propagation Delay | <1.5 ns - ensures timing compliance with Fast-mode Plus (1 MHz) I²C buses under 15 pF load |
| ON-State Resistance | 3.5 Ω typical - minimizes signal distortion and voltage drop during active translation |
| ESD Protection | 2000 V HBM / 1000 V CDM - protects downstream 1.0–1.8 V logic from bus transients |
| Operating Temp | −40 °C to +105 °C - supports industrial and automotive under-hood applications |
| I²C Compatibility | Standard-mode (100 kHz), Fast-mode (400 kHz), Fast-mode Plus (1 MHz) - no protocol modification required |
Pinout & Package
VSSOP8 package: plastic very thin shrink small outline, 8 leads, body width 2.3 mm (SOT765-1), flow-through pinout optimized for minimal trace crossovers.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| GND | Ground reference | Common return path for both voltage domains; must be low-impedance connection |
| EN | Enable control input | Active-HIGH switch control; must be pulled to VREF2 (≥1 V above VREF1) for translation |
| VREF1 | Low-voltage domain supply | Sets logic HIGH level and clamp threshold for SCL1/SDA1; connects to core voltage rail |
| SCL1 | Low-voltage clock I/O | Bidirectional open-drain clock line referenced to VREF1; requires external pull-up |
| SDA1 | Low-voltage data I/O | Bidirectional open-drain data line referenced to VREF1; requires external pull-up |
| SDA2 | High-voltage data I/O | Bidirectional open-drain data line referenced to VREF2; requires external pull-up |
| SCL2 | High-voltage clock I/O | Bidirectional open-drain clock line referenced to VREF2; requires external pull-up |
| VREF2 | High-voltage domain supply | Sets logic HIGH level and clamp threshold for SCL2/SDA2; powers EN input and high-side interface |
Key Features
| Feature | Design Value |
|---|---|
| Directionless bidirectional translation | Eliminates need for direction-control logic or GPIO coordination in mixed-voltage I²C topologies |
| Flow-through pinout | Enables straight-line PCB routing between controller and peripheral, reducing parasitic capacitance and layout complexity |
| 5 V-tolerant I/O | Allows direct interfacing with legacy 5 V peripherals while protecting sub-2 V logic cores from overvoltage |
| Lock-up free operation | Guarantees robust state recovery after bus contention or power sequencing anomalies |
| Low ON-resistance symmetry | Ensures matched rise/fall times and minimal skew between SCL and SDA paths across both voltage domains |
Applications
| Industrial Sensor Node | Automotive Body Control Module |
|---|---|
Use Scenario: Interfacing 1.8 V MEMS sensors with 3.3 V CAN gateway MCU over shared I²C bus. IC Role / Device Role / Timing Role: Voltage-level translator enabling bidirectional communication between disparate supply domains without protocol overhead. Use Value: Eliminates need for discrete FET solutions or level-shifter ICs with direction pins, reducing BOM count and layout area by 40%. | Use Scenario: Connecting 1.2 V automotive-grade EEPROM to 5 V powertrain microcontroller via isolated I²C segment. IC Role / Device Role / Timing Role: Provides galvanically isolated voltage translation only when enabled, preventing back-powering of low-voltage subsystems. Use Value: EN-controlled isolation meets ASAM functional safety requirements for domain separation during sleep/wake transitions. |
| Wearable Health Monitor | Smart Home Hub |
Use Scenario: Bridging ultra-low-power 1.0 V PMIC telemetry interface to 2.5 V Bluetooth SoC I²C host. IC Role / Device Role / Timing Role: Bidirectional translator maintaining I²C timing integrity at sub-100 µA quiescent current during system idle. Use Value: Supports 1.0 V operation - lowest VREF1 rating in its class - extending battery life in always-on sensing applications. | Use Scenario: Integrating multiple 3.3 V environmental sensors (temp/humidity/pressure) with 5 V main application processor. IC Role / Device Role / Timing Role: Dual-channel translator handling concurrent SCL/SDA translation while supporting >2 MHz effective bus speed. Use Value: Enables simultaneous multi-sensor polling at Fast-mode Plus rates without bus arbitration delays or signal degradation. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar I²C voltage-level translation applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Texas Instruments PCA9306DCU | Identical electrical specs and pinout; same VSSOP8 package but standard green molding compound (not dark green) | No halogen/antimony-free material compliance; not qualified for RoHS-compliant dark-green-only procurement programs | Select PCA9306DCU only if dark-green packaging is not required and legacy TI sourcing is preferred. |
| NXP PCA9306DC1Z | Same VSSOP8 footprint and function; differs only in packing method (Static Shielding Bag vs. standard reel) | Designed for ESD-sensitive assembly environments; identical performance and thermal behavior | Choose PCA9306DC1Z when handling static-sensitive boards or automated placement requiring ESD-safe packaging. |
Compared with PCA9306DC1/DG,125, the PCA9306DCU lacks dark-green RoHS-compliant packaging, while PCA9306DC1Z offers identical functionality in ESD-protective packaging-making PCA9306DC1/DG,125 the optimal choice for customers mandating halogen/antimony-free materials in volume production.
Availability
PCA9306DC1/DG,125 is available at Aetrix Electronics and suitable for industrial sensor nodes, automotive body control modules, wearable health monitors, and smart home hubs requiring stable component supply across extended temperature ranges and strict environmental compliance.
Supply support for PCA9306DC1/DG,125 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor leader specializing in secure connectivity solutions for automotive, industrial, and IoT applications, with deep expertise in interface and power management ICs.
The PCA9306 product line was designed specifically to solve mixed-voltage I²C interoperability challenges in space-constrained, high-reliability embedded systems-emphasizing low propagation delay, robust ESD immunity, and simplified board-level integration.
FAQ
What is the minimum VREF2 voltage required for reliable operation of the PCA9306DC1/DG,125?
The PCA9306DC1/DG,125 requires VREF2 ≥ VREF1 + 1 V for stable level-shifting performance. For example, with VREF1 = 1.8 V, VREF2 must be at least 2.8 V. This ensures proper EN activation and prevents incomplete clamping, which could cause logic errors or increased propagation delay in the PCA9306DC1/DG,125.
Can the PCA9306DC1/DG,125 translate between 1.0 V and 5.0 V I²C buses?
Yes, the PCA9306DC1/DG,125 supports 1.0 V ↔ 5.0 V translation per its datasheet: VREF1 operates down to 1.0 V and VREF2 up to 5.5 V. However, ensure VREF2 ≥ VREF1 + 1 V (i.e., ≥2.0 V), use appropriate pull-up resistors (e.g., 1.82 kΩ on 5 V side per Table 11), and verify driver sink strength meets 15 mA requirement for reliable 5 V-side LOW assertion in the PCA9306DC1/DG,125.
Does the PCA9306DC1/DG,125 require external pull-up resistors on both sides of the I²C bus?
Yes, the PCA9306DC1/DG,125 requires external pull-up resistors on both SCL1/SDA1 (referenced to VREF1) and SCL2/SDA2 (referenced to VREF2). Each side must have its own set-no shared pull-ups. Values depend on bus speed and drive strength; for 400 kHz operation with 3 mA sink, typical values are 976 Ω on 1.8 V side and 1.18 kΩ on 3.3 V side, as specified in the PCA9306DC1/DG,125 datasheet.
How does the EN pin affect isolation behavior in the PCA9306DC1/DG,125?
When EN is LOW, the PCA9306DC1/DG,125 places SCL1, SDA1, SCL2, and SDA2 in high-impedance state-fully isolating both I²C segments electrically. This prevents back-powering and allows independent power cycling. EN must be pulled to VREF2 (not GND directly) to guarantee clean disable; floating EN is undefined. This isolation capability is integral to the PCA9306DC1/DG,125's role in domain-separated architectures.
Is the PCA9306DC1/DG,125 compatible with Fast-mode Plus (1 MHz) I²C systems?
Yes, the PCA9306DC1/DG,125 supports Fast-mode Plus I²C operation up to >2 MHz, contingent on bus capacitance and pull-up resistor selection. With CL ≤ 15 pF and VI(EN) = 3.3 V, propagation delay is ≤0.6 ns (tPLH/tPHL), well within timing budgets. System-level validation is required-but the PCA9306DC1/DG,125's 3.5 Ω Ron and low capacitance (<12.5 pF on-state) make it suitable for 1 MHz designs when layout and termination are optimized.
PCA9306DC1/DG,125 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Series:
- -
- Package/Case:
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Translator Type:
- Voltage Level
- Channel Type:
- Bidirectional
- Number of Circuits:
- 1
- Channels per Circuit:
- 2
- Voltage - VCCA:
- 1 V ~ 3.6 V
- Voltage - VCCB:
- 1.8 V ~ 5.5 V
- Input Signal:
- -
- Output Signal:
- -
- Output Type:
- Open Drain
- Data Rate:
- -
- Operating Temperature:
- -40°C ~ 105°C (TA)
- Grade:
- -
- Qualification:
- -
- Features:
- Auto-Direction Sensing
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-VFSOP (0.091", 2.30mm Width)
PCA9306DC1/DG,125 FAQ
1.How can I place an order for PCA9306DC1/DG,125 through Aetrix?
Please submit a Request for Quotation (RFQ) for PCA9306DC1/DG,125 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for PCA9306DC1/DG,125 reliable?
The price and inventory of PCA9306DC1/DG,125 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PCA9306DC1/DG,125 is usually 5 days.
3.What payment methods are accepted for PCA9306DC1/DG,125?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PCA9306DC1/DG,125 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for PCA9306DC1/DG,125?
PCA9306DC1/DG,125 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your PCA9306DC1/DG,125 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for PCA9306DC1/DG,125?
For technical support, including PCA9306DC1/DG,125 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PCA9306DC1/DG,125 requirements.
6.How does Aetrix verify that PCA9306DC1/DG,125 is sourced from the original manufacturer or authorized distributors?
All PCA9306DC1/DG,125 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PCA9306DC1/DG,125 meets industry standards.
7.What is the process for return or replacement of PCA9306DC1/DG,125?
All PCA9306DC1/DG,125 units undergo pre-shipment inspection (PSI). If there is an issue with PCA9306DC1/DG,125, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The PCA9306DC1/DG,125 part is unused and in its original packaging.
Return procedure for PCA9306DC1/DG,125:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
PCA9306DC1/DG,125 Tags

-
74LVC1T45GW,125
Nexperia USA Inc.
-
74LVCH2T45DC,125
Nexperia USA Inc.

-
SN74LVC1T45DBVR
Texas Instruments

-
SN74LVC1T45DRLR
Texas Instruments

-
SN74LVC1T45DPKR
Texas Instruments

-
SN74LVC2T45DCTR
Texas Instruments

-
74LVC2T45GT,115
Nexperia USA Inc.

-
SN74LVC1T45YZPR
Texas Instruments

-
LSF0102DCUR
Texas Instruments

-
SN74LVC1T45DCKR
Texas Instruments

-
TXS0102DCTR
Texas Instruments

-
FXLP34P5X
onsemi
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
