NXP Semiconductors PCA9535CD,112
- Part No.:
- PCA9535CD,112
- Manufacturer:
- NXP Semiconductors
- Category:
- I/O Expanders
- Package:
- 24-SOIC (0.295", 7.50mm Width)
- Datasheet:
-
PCA9535CD,112.pdf
- Description:
- IC XPNDR 400KHZ I2C SMBUS 24SO
- Quantity:
- Payment:

- Shipping:

Inventory:3,429
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Product details
Overview
PCA9535CD,112 from NXP Semiconductors is a 16-bit I²C-bus/SMBus GPIO expander in SO24 package, providing configurable parallel I/O for embedded control applications. It operates from 2.3 V to 5.5 V, supports 5 V-tolerant I/Os, features active-low open-drain interrupt output, and defaults all 16 pins to high-impedance inputs at power-on reset - enabling immediate use in ACPI power switches, LED/fan control, and sensor interface subsystems.
For engineers reviewing the PCA9535CD,112 datasheet, PCA9535CD,112 pinout, PCA9535CD,112 application, or PCA9535CD,112 equivalent, this device delivers deterministic I/O expansion with polarity inversion, noise-filtered SCL/SDA inputs, and hardware address selection (A0–A2) for multi-device I²C bus sharing - critical for space-constrained industrial and consumer control boards requiring low standby current and glitch-free power-up behavior.
Technical Context
The PCA9535CD,112 implements two independent 8-bit register banks (Port 0 and Port 1) for configuration, input, output, and polarity inversion - each accessible via I²C command byte addressing. Its I/O architecture uses open-drain outputs (unlike the totem-pole PCA9535), eliminating internal pull-ups to reduce quiescent current when pins are held LOW.
Interrupt generation is edge-triggered and asynchronous: INT asserts when any input pin state differs from its corresponding Input Port register value, and clears only upon reading that specific port's Input register - ensuring reliable change-of-state detection without spurious resets across port boundaries.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage | 2.3 V to 5.5 V - enables direct interfacing with 3.3 V and 5 V microcontrollers without level shifters. |
| I/O Voltage Tolerance | 5 V tolerant - allows safe connection to 5 V peripherals even when VDD = 3.3 V. |
| Max I²C Clock Frequency | 400 kHz - supports Fast-mode I²C for responsive host communication in real-time control loops. |
| Interrupt Output | Active-low open-drain - requires external pull-up; compatible with shared interrupt lines in multi-peripheral systems. |
| ESD Protection | 2000 V HBM - meets industrial-grade robustness requirements for board-level handling and field operation. |
| Operating Temperature | −40 °C to +85 °C - qualified for extended industrial environments including automotive cabin and factory automation. |
| Power-On Reset | Internal POR circuit holds registers in default state until VDD ≥ VPOR - guarantees known I/O configuration before firmware initialization. |
Pinout & Package
PCA9535CD,112 is housed in a plastic small outline package (SO24) with 24 leads and 7.5 mm body width (SOT137-1), featuring gull-wing leads suitable for standard reflow soldering and automated optical inspection.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| INT (Pin 1) | Interrupt output | Open-drain signal indicating I/O state change; must be pulled up externally to trigger host CPU interrupt. |
| A0–A2 (Pins 2, 3, 21) | Address inputs | Set 3 LSBs of 7-bit I²C slave address (100A2A1A0); enable up to eight devices on same bus. |
| IO0_0–IO0_7 (Pins 4–11) | Port 0 I/O terminals | Configurable as input or open-drain output; default high-impedance at power-on. |
| VSS (Pin 12) | Ground reference | Primary supply return path; must be connected to system ground plane for stable operation. |
| IO1_0–IO1_7 (Pins 13–20) | Port 1 I/O terminals | Independent 8-bit port with identical configuration logic and interrupt sensitivity as Port 0. |
| SCL / SDA (Pins 22, 23) | I²C bus interface | Noise-filtered serial clock/data lines; require external pull-up resistors per I²C specification. |
| VDD (Pin 24) | Power supply | Accepts 2.3–5.5 V; powers internal logic and I/O drivers; decoupling capacitor required near pin. |
Key Features
| Feature | Design Value |
|---|---|
| Polarity Inversion Register | Per-bit inversion of Input Port data - enables software-defined active-HIGH/active-LOW sensing without external logic. |
| Individual I/O Configuration | Each of 16 pins independently set as input or open-drain output via Configuration Registers - supports mixed-signal subsystems on single chip. |
| No Glitch on Power-Up | Internal power-on reset ensures all registers initialize to defined defaults - eliminates undefined I/O states during boot. |
| Low Standby Current | Removal of internal pull-up resistors reduces IDD when outputs held LOW - extends battery life in portable equipment. |
| Hardware Address Selection | Three address pins (A0–A2) allow eight unique I²C addresses - simplifies multi-expander designs without software address remapping. |
Applications
| ACPI Power Management | LED & Fan Control |
|---|---|
|
Use Scenario: System-level power sequencing in laptops and embedded PCs using ACPI-compliant firmware. IC Role / Device Role / Timing Role: GPIO expander managing push-button wake events, lid switch detection, and thermal shutdown signals. Use Value: Active-low INT pin directly connects to EC or PCH interrupt line; 5 V tolerance allows interfacing with legacy 5 V sensors without level translation. |
Use Scenario: Real-time status indication and cooling control in network routers and industrial gateways. IC Role / Device Role / Timing Role: Driving LEDs and PWM-controlled fans via open-drain outputs with external pull-ups to 3.3 V or 5 V rails. Use Value: Eliminates need for discrete transistors or driver ICs; polarity inversion register enables unified firmware logic for both active-HIGH and active-LOW indicators. |
| Sensor Interface Hub | Keypad & Button Matrix |
|
Use Scenario: Aggregating digital outputs from temperature, humidity, and motion sensors in smart building controllers. IC Role / Device Role / Timing Role: Reading asynchronous sensor alerts and latching status changes via interrupt-driven polling. Use Value: Per-port interrupt clearing prevents missed events; noise filtering on SCL/SDA ensures reliable I²C communication in electrically noisy HVAC environments. |
Use Scenario: Scanning 10-digit numeric keypads and mechanical push buttons in point-of-sale terminals and medical devices. IC Role / Device Role / Timing Role: Configuring rows as outputs and columns as inputs to detect keypresses with minimal MCU GPIO usage. Use Value: 16-bit width supports full matrix decoding; input port registers retain debounced states until read - reducing host CPU polling overhead. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar GPIO expander applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| PCA9535D,112 | Totem-pole I/O outputs with internal pull-ups; higher standby current when outputs driven LOW. | Better suited for driving LEDs directly with sink-only topology; less optimal for battery-powered systems. | Select PCA9535D,112 if internal pull-ups simplify BOM or if driving capacitive loads requiring stronger sourcing capability. |
| PCA9555D,112 | Includes internal 100 kΩ pull-up resistors on all I/Os; identical register map and pinout but higher IDD in LOW state. | Preferred where weak pull-ups suffice and firmware expects default HIGH logic on unconnected inputs. | Choose PCA9555D,112 only when legacy compatibility with existing PCA9555-based designs is required. |
Compared with PCA9535D,112 and PCA9555D,112, the PCA9535CD,112 provides lowest quiescent current in systems where I/Os are frequently held LOW, making it optimal for energy-sensitive applications - while retaining full register compatibility and interrupt functionality across the family.
Availability
PCA9535CD,112 is available at Aetrix Electronics and suitable for industrial control panels, smart home hubs, and embedded computing platforms requiring stable component supply, long-term lifecycle support, and RoHS-compliant packaging.
Supply support for PCA9535CD,112 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor leader focused on secure connectivity solutions for automotive, industrial, and IoT markets, with deep expertise in interface and mixed-signal IC design.
The PCA9535CD,112 belongs to NXP's I²C-bus I/O expander product line, engineered specifically to extend microcontroller GPIO resources in resource-constrained embedded systems while maintaining low power, high noise immunity, and seamless I²C protocol compliance.
FAQ
What is the I²C address range supported by PCA9535CD,112?
The PCA9535CD,112 uses a fixed 7-bit base address of 0x20 (100000b), with the three least-significant bits determined by A0, A1, and A2 pins. This allows eight unique addresses from 0x20 to 0x27. The PCA9535CD,112 does not support software-configurable addresses - hardware pin strapping is the sole method for address selection, ensuring deterministic bus arbitration in multi-device systems.
Does PCA9535CD,112 support hot insertion or live I²C bus connection?
No, the PCA9535CD,112 lacks built-in hot-swap protection. Its I/O pins are not designed to tolerate voltage transitions while VDD is unpowered or ramping. Connecting the PCA9535CD,112 to an active I²C bus before VDD stabilization may cause latch-up or excessive current draw. Always power VDD before applying signals to SCL, SDA, or I/O pins to ensure safe operation of the PCA9535CD,112.
How does the interrupt mechanism work in PCA9535CD,112?
The PCA9535CD,112 asserts its open-drain INT pin LOW when any input pin's logic level differs from its corresponding bit in the Input Port register. Reading that specific port's Input register clears the interrupt - reading Port 1 does not clear an interrupt triggered by Port 0. This per-port isolation ensures precise event tracking in multi-sensor applications using the PCA9535CD,112.
Can PCA9535CD,112 drive LEDs directly?
Yes - the PCA9535CD,112 can sink current through its open-drain I/Os to drive LEDs connected between VDD and the I/O pin. With typical 20 mA sink capability per pin (per datasheet limits), it supports common-anode LED configurations. Unlike the PCA9535D,112, the PCA9535CD,112 has no internal pull-up, so external pull-up resistors are required for HIGH-state signaling - making it ideal for low-power LED control where current consumption must be minimized.
Is PCA9535CD,112 pin-compatible with PCA9555?
Yes - the PCA9535CD,112 is pin-compatible and I²C-address compatible with the PCA9555 series, sharing identical SO24 pinout, register map, and address scheme. However, software changes are required due to removal of internal pull-up resistors and differences in I/O drive structure. Firmware written for PCA9555 must be updated to manage external pull-ups and account for missing totem-pole sourcing in the PCA9535CD,112.
PCA9535CD,112 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Series:
- -
- Package/Case:
- 24-SOIC (0.295", 7.50mm Width)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Number of I/O:
- 16
- Interface:
- I2C, SMBus
- Interrupt Output:
- Yes
- Features:
- POR
- Output Type:
- Push-Pull
- Current - Output Source/Sink:
- 10mA, 25mA
- Clock Frequency:
- 400 kHz
- Voltage - Supply:
- 2.3V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 24-SO
PCA9535CD,112 FAQ
1.How can I place an order for PCA9535CD,112 through Aetrix?
Please submit a Request for Quotation (RFQ) for PCA9535CD,112 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for PCA9535CD,112 reliable?
The price and inventory of PCA9535CD,112 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PCA9535CD,112 is usually 5 days.
3.What payment methods are accepted for PCA9535CD,112?
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PCA9535CD,112 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your PCA9535CD,112 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for PCA9535CD,112?
For technical support, including PCA9535CD,112 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PCA9535CD,112 requirements.
6.How does Aetrix verify that PCA9535CD,112 is sourced from the original manufacturer or authorized distributors?
All PCA9535CD,112 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PCA9535CD,112 meets industry standards.
7.What is the process for return or replacement of PCA9535CD,112?
All PCA9535CD,112 units undergo pre-shipment inspection (PSI). If there is an issue with PCA9535CD,112, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The PCA9535CD,112 part is unused and in its original packaging.
Return procedure for PCA9535CD,112:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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