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NXP Semiconductors PCA9535CPW,112
- Part No.:
- PCA9535CPW,112
- Manufacturer:
- NXP Semiconductors
- Category:
- I/O Expanders
- Package:
- 24-TSSOP (0.173", 4.40mm Width)
- Datasheet:
-
PCA9535CPW,112.pdf
- Description:
- IC XPND 400KHZ I2C SMBUS 24TSSOP
- Quantity:
- Payment:
- Shipping:
Inventory:2,743
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Product details
Overview
PCA9535CPW,112 from NXP Semiconductors is a 16-bit I²C-bus/SMBus GPIO expander with open-drain I/Os, 2.3 V to 5.5 V supply range, 5 V I/O tolerance, and active-low interrupt output - designed for low-power embedded control of sensors, push buttons, LEDs, and fans in space-constrained industrial and consumer systems.
For engineers reviewing the PCA9535CPW,112 datasheet, PCA9535CPW,112 pinout, PCA9535CPW,112 application, or PCA9535CPW,112 equivalent, this device delivers verified I²C address configurability (up to 8 devices), polarity inversion per port, noise-filtered SCL/SDA inputs, and power-on reset initialization - critical for reliable multi-device bus management and input state change detection.
Technical Context
The PCA9535CPW,112 implements two independent 8-bit I/O ports (Port 0 and Port 1), each with dedicated Configuration, Input, Output, and Polarity Inversion registers - enabling per-pin direction control and active-HIGH/LOW input inversion without software overhead. Its open-drain I/O architecture eliminates internal pull-up resistors, reducing standby current versus the PCA9555 and avoiding unintended current paths when driving external loads.
Interrupt generation is hardware-synchronized: the open-drain INT pin activates only when an input pin's logic level differs from its corresponding Input Port register value - and clears upon reading that specific port's Input register. The device supports standard-mode (up to 100 kHz) and fast-mode (up to 400 kHz) I²C operation with noise filtering on SCL/SDA to suppress transient-induced glitches.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage | 2.3 V to 5.5 V - enables direct interface with 3.3 V and 5 V host controllers without level shifters. |
| I/O Voltage Tolerance | 5 V tolerant - allows safe connection to 5 V peripherals even when VDD = 3.3 V. |
| I²C Clock Frequency | 0 Hz to 400 kHz - supports both standard- and fast-mode I²C buses for flexible system timing. |
| Interrupt Output | Active-low open-drain - requires external pull-up; asserts when any configured input changes state. |
| ESD Protection | 2000 V HBM, 200 V MM, 1000 V CDM - meets industrial-grade robustness requirements per JESD22. |
| Operating Temperature | −40 °C to +85 °C - qualified for extended industrial environments without derating. |
| Package | TSSOP24 (SOT355-1), 4.4 mm body width - surface-mount compatible with automated assembly and thermal vias. |
Pinout & Package
TSSOP24 package (SOT355-1), 24-pin plastic thin shrink small outline, 0.65 mm pitch, 4.4 mm body width, lead-free and RoHS compliant.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| INT (Pin 1) | Interrupt output | Open-drain active-low signal indicating input state change; requires external pull-up resistor. |
| A0–A2 (Pins 2, 3, 21) | Address inputs | Set LSBs of 7-bit I²C slave address (100A2A1A0); enable up to eight devices on same bus. |
| IO0_0–IO0_7 (Pins 4–11) | Port 0 I/Os | Open-drain bidirectional pins; direction set per-bit via Configuration Port 0 register. |
| VSS (Pin 12) | Ground | Primary supply return; must be connected to system ground for correct operation. |
| IO1_0–IO1_7 (Pins 13–20) | Port 1 I/Os | Open-drain bidirectional pins; direction set per-bit via Configuration Port 1 register. |
| SCL (Pin 22) | I²C clock input | Noise-filtered serial clock line; supports up to 400 kHz with glitch suppression. |
| SDA (Pin 23) | I²C data I/O | Noise-filtered bidirectional data line; requires external pull-up resistor. |
| VDD (Pin 24) | Power supply | 2.3 V–5.5 V core and I/O supply; powers internal logic and enables 5 V tolerant I/O operation. |
Key Features
| Feature | Design Value |
|---|---|
| Polarity Inversion Register | Per-port 8-bit register flips read-back logic levels - simplifies firmware handling of active-low sensors or switches without bit-manipulation. |
| Power-on Reset | Internal POR circuit initializes all registers to defaults (all I/Os as inputs, outputs high) - ensures deterministic startup without host intervention. |
| No Glitch on Power-up | Output states remain high-impedance until VDD stabilizes - prevents spurious actuation of connected LEDs, relays, or logic circuits during power ramp. |
| Individual I/O Configuration | Each of 16 pins independently configurable as input or output via dedicated Configuration registers - enables mixed-mode interfaces on single device. |
| Latch-up Immunity | Exceeds JEDEC JESD78 (≥100 mA) - guarantees robust operation under transient overvoltage or ESD stress in noisy industrial settings. |
Applications
| ACPI Power Switch Control | Sensor Interface Expansion |
|---|---|
|
Use Scenario: Managing multiple AC/DC power rails in embedded systems using discrete MOSFET gate control and status feedback. IC Role / Device Role / Timing Role: GPIO expander providing isolated, interrupt-driven monitoring and switching of power enable lines and fault signals. Use Value: Reduces host MCU pin count while enabling real-time power-event detection via INT pin - critical for energy-aware sleep/wake transitions. |
Use Scenario: Connecting temperature, humidity, and motion sensors to a microcontroller with limited GPIO resources. IC Role / Device Role / Timing Role: I²C-based digital I/O hub converting sensor status bits into interrupt-triggered reads over shared bus. Use Value: Enables scalable sensor node design with no additional MCU interrupts required - each sensor change triggers INT, not polling. |
| Keypad Scan Interface | Fan Speed Monitoring & Control |
|
Use Scenario: Scanning 10-digit numeric keypads in industrial HMIs or security panels where mechanical switch bounce must be filtered. IC Role / Device Role / Timing Role: Bidirectional port expander implementing matrix row/column scanning with polarity inversion for active-low keys. Use Value: Offloads debouncing and scan timing from host MCU; INT pin signals keypress/release events directly - improves responsiveness. |
Use Scenario: Monitoring tachometer signals and controlling PWM fan drivers in thermal management subsystems. IC Role / Device Role / Timing Role: Open-drain I/Os safely interface to 5 V fan tach outputs and drive external FET gates for PWM control. Use Value: 5 V tolerance allows direct connection to legacy fan modules; low standby current extends battery life in portable cooling systems. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar GPIO expander applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| PCA9535PW,112 | Totem-pole (push-pull) outputs instead of open-drain; includes internal weak pull-ups on I/Os. | Better suited for driving LEDs directly with sink/source capability; higher quiescent current when I/Os held LOW. | Select PCA9535PW,112 if driving LEDs or logic loads requiring active HIGH outputs; PCA9535CPW,112 preferred for 5 V level shifting or wired-OR interrupt sharing. |
| PCA9555PW,112 | Includes internal 100 kΩ pull-up resistors on all I/Os; identical register map and pinout. | Higher standby current in input mode; less suitable for battery-powered systems where I/Os float or connect to 5 V sources. | Choose PCA9555PW,112 only when internal pull-ups simplify BOM; PCA9535CPW,112 offers lower power and true 5 V tolerance without pull-up leakage. |
Compared with PCA9535PW,112 and PCA9555PW,112, the PCA9535CPW,112 provides lowest standby current and safest 5 V I/O interfacing due to open-drain architecture and absence of internal pull-ups - making it optimal for power-sensitive and mixed-voltage industrial designs.
Availability
PCA9535CPW,112 is available at Aetrix Electronics and suitable for industrial HMIs, thermal management subsystems, and ACPI-compliant power sequencers requiring stable component supply across long production lifecycles.
Supply support for PCA9535CPW,112 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor leader focused on secure connectivity solutions for automotive, industrial, and IoT applications - delivering high-reliability, standards-compliant ICs with extensive ecosystem support.
The PCA9535CPW,112 belongs to NXP's I²C-bus I/O expander family, engineered specifically to extend GPIO resources in resource-constrained embedded systems while maintaining robust bus communication and low-power operation.
FAQ
What is the I²C address range supported by PCA9535CPW,112?
The PCA9535CPW,112 uses a fixed 7-bit base address of 0x20 (1000000b), with three hardware address pins (A0–A2) allowing eight unique addresses from 0x20 to 0x27. This enables up to eight PCA9535CPW,112 devices on a single I²C bus without address conflict or software remapping.
Does PCA9535CPW,112 support hot insertion or live bus connection?
The PCA9535CPW,112 does not include built-in hot-swap protection. Its I²C pins (SCL/SDA) feature noise filters but lack bus contention detection or slew-rate control. For live insertion, external series resistors and careful power sequencing are recommended - the PCA9535CPW,112 itself will not latch up or damage under typical hot-plug transients within its absolute maximum ratings.
How does the interrupt (INT) pin behave when multiple inputs change simultaneously?
The PCA9535CPW,112 INT pin is a wired-OR open-drain output that asserts LOW whenever *any* configured input pin differs from its Input Port register value - regardless of how many pins change. It remains asserted until the corresponding Input Port register (Port 0 or Port 1) is read, clearing only that port's interrupt condition.
Can PCA9535CPW,112 drive LEDs directly, and what are the current limitations?
The PCA9535CPW,112 I/Os are open-drain and cannot source current - they can only sink. LED anodes must connect to VDD (or higher voltage up to 5.5 V) with cathodes tied to I/O pins. Sink current per pin is rated at 25 mA max (per datasheet DC characteristics), but total package current must stay within thermal limits - PCA9535CPW,112 is optimized for control signaling, not high-current LED driving.
Is PCA9535CPW,112 pin-compatible with PCA9535PW,112?
Yes - PCA9535CPW,112 and PCA9535PW,112 share identical TSSOP24 pinout, register map, and I²C protocol. The only functional difference is I/O structure: PCA9535CPW,112 has open-drain outputs only, while PCA9535PW,112 has totem-pole outputs. No PCB layout change is needed, but firmware must account for missing source capability in PCA9535CPW,112.
PCA9535CPW,112 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Series:
- -
- Package/Case:
- 24-TSSOP (0.173", 4.40mm Width)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Number of I/O:
- 16
- Interface:
- I2C, SMBus
- Interrupt Output:
- Yes
- Features:
- POR
- Output Type:
- Open Drain
- Current - Output Source/Sink:
- 10mA, 25mA
- Clock Frequency:
- 400 kHz
- Voltage - Supply:
- 2.3V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 24-TSSOP
PCA9535CPW,112 FAQ
1.How can I place an order for PCA9535CPW,112 through Aetrix?
Please submit a Request for Quotation (RFQ) for PCA9535CPW,112 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for PCA9535CPW,112 reliable?
The price and inventory of PCA9535CPW,112 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PCA9535CPW,112 is usually 5 days.
3.What payment methods are accepted for PCA9535CPW,112?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PCA9535CPW,112 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for PCA9535CPW,112?
PCA9535CPW,112 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your PCA9535CPW,112 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for PCA9535CPW,112?
For technical support, including PCA9535CPW,112 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PCA9535CPW,112 requirements.
6.How does Aetrix verify that PCA9535CPW,112 is sourced from the original manufacturer or authorized distributors?
All PCA9535CPW,112 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PCA9535CPW,112 meets industry standards.
7.What is the process for return or replacement of PCA9535CPW,112?
All PCA9535CPW,112 units undergo pre-shipment inspection (PSI). If there is an issue with PCA9535CPW,112, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The PCA9535CPW,112 part is unused and in its original packaging.
Return procedure for PCA9535CPW,112:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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