Texas Instruments PCA9543APW
- Part No.:
- PCA9543APW
- Manufacturer:
- Texas Instruments
- Category:
- Specialized
- Package:
- 14-TSSOP (0.173", 4.40mm Width)
- Datasheet:
-
PCA9543APW.pdf
- Description:
- IC INTERFACE SPECIALIZED 14TSSOP
- Quantity:
- Payment:

- Shipping:

Inventory:4,610
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Product details
Overview
PCA9543APW from Texas Instruments is a 2-channel bidirectional I²C bus switch with interrupt logic and active-low reset, designed to resolve I²C slave address conflicts in multi-sensor systems. It supports voltage-level translation between 1.8-V, 2.5-V, 3.3-V, and 5-V buses, operates from 2.3 V to 5.5 V, and handles I²C clock frequencies up to 400 kHz - enabling reliable communication in server backplanes and industrial sensor hubs.
For engineers reviewing the PCA9543APW datasheet, PCA9543APW pinout, PCA9543APW application, or PCA9543APW equivalent, key selection considerations include channel-selectable I²C routing, dual independent interrupt inputs (INT0/INT1), active-low reset recovery for stuck-bus conditions, and 5.5-V-tolerant I/O with no glitch on power-up.
Technical Context
The PCA9543APW implements two independent bidirectional pass-gate switches controlled via an 8-bit I²C-accessible register, where bits B0/B1 determine channel enable state (00 = both deselected, 01 = channel 0 only, 10 = channel 1 only, 11 = both enabled). Its interrupt logic performs a wired-AND of INT0 and INT1 onto the open-drain INT output, with status bits (D4/D5) readable in the control register.
Each channel features low RON (≤11 Ω at 3.3 V), supports hot insertion, and allows independent pull-up voltage domains (VDPU0/VDPU1) - enabling level-shifting without external translators. The RESET input forces deselection and resets the I²C state machine, while internal power-on reset ensures deterministic startup with all channels disabled.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Channels | 2 independent bidirectional I²C switch channels (SC0/SD0 and SC1/SD1) |
| I²C Speed Support | Up to 400 kHz Fast Mode - enables high-throughput sensor polling in real-time systems |
| Voltage Translation | 1.8-V to 5-V level shifting per channel - eliminates need for discrete level shifters in mixed-voltage designs |
| Interrupt Logic | Dual active-low interrupt inputs (INT0, INT1) with ANDed open-drain output (INT) - simplifies master-side interrupt aggregation |
| Reset Function | Active-low RESET pin recovers from stuck-bus faults by deselecting all channels and resetting internal state machine |
| Supply Range | 2.3 V to 5.5 V - compatible with wide range of host processor I/O domains and legacy 5-V systems |
| On-Resistance | ≤11 Ω at 3.3 V - minimizes signal degradation and timing skew on SDA/SCL lines |
| ESD Rating | 2000-V HBM, 1000-V CDM - meets industrial robustness requirements for factory automation equipment |
Pinout & Package
TSSOP-14 package (5.00 mm × 4.40 mm), 14-pin surface-mount, RoHS-compliant, with exposed pad option not specified.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A0, A1 | Hardware address inputs | Set I²C slave address (four possible addresses: 0x70–0x73); must be tied to VCC or GND - no floating connections |
| RESET | Active-low asynchronous reset | Pulls internal state machine to default (all channels deselected); requires external pull-up resistor if unused |
| INT0, INT1 | Active-low interrupt inputs | Monitor downstream slave interrupts per channel; each connects to its own VDPUx domain for level translation |
| SD0, SC0, SD1, SC1 | Downstream I²C data/clock pairs | Isolated channel interfaces - support independent pull-up voltages (VDPU0/VDPU1) for voltage translation |
| SDA, SCL | Upstream I²C interface | Connects to master processor; 5.5-V tolerant; requires pull-up to VDPUM (master domain voltage) |
| INT | Active-low interrupt output | Open-drain AND of INT0 and INT1 - signals master when any downstream device asserts interrupt |
| VCC, GND | Power supply and reference | VCC powers internal logic and defines switch voltage ceiling; all I/O pins tolerate up to 5.5 V regardless of VCC |
Key Features
| Feature | Design Value |
|---|---|
| Programmable channel selection | Single I²C write to 8-bit control register (B0/B1 bits) selects 0, 1, or both channels - enables dynamic bus reconfiguration without hardware changes |
| Independent interrupt monitoring | INT0 and INT1 track activity on separate downstream buses; status bits (D4/D5) allow master to identify source channel before switching |
| Robust bus recovery | RESET pin forces immediate channel deselection and state-machine reset - resolves SDA/SCL lockup caused by faulty slaves |
| Voltage-domain isolation | Each channel's SDn/SCn pair supports independent pull-up voltages (VDPU0/VDPU1), enabling 1.8-V sensors to coexist with 5-V masters |
| No power-up glitches | Internal POR ensures all channels remain deselected until first valid I²C command - prevents unintended slave access during boot |
Applications
| Server Backplane Management | Rack-Mount Sensor Hub |
|---|---|
Use Scenario: Multiple identical temperature sensors share same I²C address on a server motherboard, causing address collisions during thermal monitoring. IC Role / Device Role / Timing Role: PCA9543APW acts as an address-multiplexing switch, isolating each sensor on its own channel and enabling sequential polling via I²C register writes. Use Value: Eliminates need for custom sensor firmware or hardware address jumpers - reduces BOM cost and simplifies system-level calibration. | Use Scenario: Industrial rack controller reads humidity, pressure, and airflow sensors operating at 3.3 V, while host MCU runs at 5 V. IC Role / Device Role / Timing Role: PCA9543APW provides bidirectional level translation and channel isolation between 5-V master and 3.3-V sensor cluster. Use Value: Removes requirement for discrete level shifters and dedicated I²C buffers - cuts PCB area by >30% and improves signal integrity at 400-kHz operation. |
| Factory Automation PLC I/O Module | Telecom Router Baseboard |
Use Scenario: Programmable logic controller monitors multiple I²C-connected encoders and current sensors, some generating spurious interrupts during EMI events. IC Role / Device Role / Timing Role: PCA9543APW routes master commands to individual sensor channels and aggregates their interrupts onto single INT line with fault-isolation capability. Use Value: Enables interrupt-driven polling without false triggers - improves real-time response and reduces CPU polling overhead by 65%. | Use Scenario: Telecom router baseboard integrates redundant power monitors and fan controllers, all sharing limited I²C address space. IC Role / Device Role / Timing Role: PCA9543APW partitions I²C bus into isolated channels for power management ICs and thermal supervisors, preventing cross-talk during hot-swap events. Use Value: Supports hot insertion of daughter cards without bus reset - maintains system uptime during field maintenance. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar I²C bus switch applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TCA9544APWR | 4-channel I²C switch with identical interrupt logic and reset, but larger TSSOP-20 package and higher standby current (1.5 µA vs. 1 µA) | Supports up to four downstream buses instead of two - suitable when expanding sensor count beyond two groups | Select TCA9544APWR only when 4-channel routing is required; PCA9543APW offers lower footprint and better fit for dual-sensor architectures. |
| PCA9546APW | 4-channel switch without interrupt inputs or outputs; uses same control register format but lacks INT0/INT1/INT pins and interrupt status bits | Designed for pure bus expansion without interrupt aggregation - used where slave devices lack interrupt capability | Choose PCA9546APW when interrupt handling is unnecessary; PCA9543APW is mandatory when downstream sensors require interrupt-driven wake-up or fault reporting. |
Compared with TCA9544APWR and PCA9546APW, the PCA9543APW uniquely balances dual-channel routing, integrated interrupt arbitration, and minimal TSSOP-14 footprint - making it optimal for space-constrained, interrupt-sensitive I²C systems requiring exactly two isolated sensor domains.
Availability
PCA9543APW is available at Aetrix Electronics and suitable for server backplanes, telecom routers, factory automation PLCs, and rack-mounted sensor hubs requiring stable component supply across extended production lifecycles.
Supply support for PCA9543APW includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader delivering analog and embedded processing solutions, with over 50 years of innovation in interface, power management, and signal chain technologies.
The PCA9543APW belongs to TI's I²C switch and multiplexer product line, engineered specifically to solve I²C address collision, voltage-level mismatch, and interrupt aggregation challenges in dense multi-sensor embedded systems.
FAQ
What is the maximum I²C clock frequency supported by the PCA9543APW?
The PCA9543APW supports Standard Mode (100 kHz) and Fast Mode (400 kHz) I²C operation. Its switching characteristics are characterized up to 400 kHz with CL ≤100 pF, and timing parameters such as tpd (propagation delay) and tvdH/tvdL are validated under these conditions. This makes the PCA9543APW suitable for high-speed sensor polling in real-time industrial and telecom applications.
How does the PCA9543APW handle I²C slave address conflicts?
The PCA9543APW resolves I²C slave address conflicts by isolating identical-address devices onto separate downstream channels (SC0/SD0 and SC1/SD1). The master selects one channel at a time via the control register, ensuring only the targeted group responds - eliminating arbitration failures. This is widely applied in systems with multiple identical temperature sensors or power monitors.
Can the PCA9543APW perform voltage-level translation between different I²C domains?
Yes, the PCA9543APW enables voltage-level translation by allowing independent pull-up voltages on each channel: VDPUM for upstream (SDA/SCL), VDPU0 for channel 0 (SD0/SC0), and VDPU1 for channel 1 (SD1/SC1). This permits 1.8-V, 2.5-V, or 3.3-V slaves to communicate with a 5-V master without external level shifters - a core design feature confirmed in the datasheet's "Voltage-Level Translation" specification.
What happens to the PCA9543APW channels during power-up or reset?
During power-up, the PCA9543APW's internal power-on reset (POR) forces all channels to deselect (control register = 0x00). Asserting the active-low RESET pin produces identical behavior: both channels disable, the I²C state machine resets, and INT returns high-impedance. This ensures no unintended communication occurs before firmware initializes the device - critical for system reliability.
Does the PCA9543APW require external pull-up resistors, and where should they be placed?
Yes, external pull-up resistors are mandatory. One set pulls SDA/SCL to VDPUM (master domain voltage); separate sets pull SD0/SC0 to VDPU0 and SD1/SC1 to VDPU1 (slave domain voltages). INT, INT0, and INT1 also require pull-ups to their respective VDPUM/VDPUx rails. No internal pull-ups exist on address (A0/A1) or interrupt pins - leaving them unconnected risks undefined operation.
PCA9543APW Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 14-TSSOP (0.173", 4.40mm Width)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Applications:
- Translating Switch
- Interface:
- I2C
- Voltage - Supply:
- 2.3V ~ 5.5V
- Supplier Device Package:
- 14-TSSOP
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
PCA9543APW FAQ
1.How can I place an order for PCA9543APW through Aetrix?
Please submit a Request for Quotation (RFQ) for PCA9543APW on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for PCA9543APW reliable?
The price and inventory of PCA9543APW are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PCA9543APW is usually 5 days.
3.What payment methods are accepted for PCA9543APW?
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4.How is shipping managed for PCA9543APW?
PCA9543APW orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your PCA9543APW order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for PCA9543APW?
For technical support, including PCA9543APW datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PCA9543APW requirements.
6.How does Aetrix verify that PCA9543APW is sourced from the original manufacturer or authorized distributors?
All PCA9543APW products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PCA9543APW meets industry standards.
7.What is the process for return or replacement of PCA9543APW?
All PCA9543APW units undergo pre-shipment inspection (PSI). If there is an issue with PCA9543APW, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The PCA9543APW part is unused and in its original packaging.
Return procedure for PCA9543APW:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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