NXP Semiconductors PCA9555PW/DG,118
- Part No.:
- PCA9555PW/DG,118
- Manufacturer:
- NXP Semiconductors
- Category:
- I/O Expanders
- Package:
- 24-TSSOP (0.173", 4.40mm Width)
- Datasheet:
-
PCA9555PW/DG,118.pdf
- Description:
- IC XPND 400KHZ I2C SMBUS 24TSSOP
- Quantity:
- Payment:

- Shipping:

Inventory:2,920
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
PCA9555PW/DG,118 from NXP Semiconductors is a 16-bit I²C-bus/SMBus GPIO expander in TSSOP24 package, providing configurable parallel I/O for embedded control systems. It operates from 2.3 V to 5.5 V, supports 5 V-tolerant I/Os, delivers up to 20 mA per pin, and features an active-low open-drain interrupt output. It is used in industrial HMI panels to extend microcontroller I/O for keypad scanning and LED status indication.
For engineers reviewing the PCA9555PW/DG,118 datasheet, PCA9555PW/DG,118 pinout, PCA9555PW/DG,118 application, or PCA9555PW/DG,118 equivalent, key selection criteria include I²C address configurability (A0–A2), polarity inversion register support, input state change interrupt behavior, and 5 V I/O tolerance in mixed-voltage systems.
Technical Context
The PCA9555PW/DG,118 implements two independent 8-bit I/O ports (Port 0 and Port 1), each with dedicated configuration, input, output, and polarity inversion registers. Its I²C interface supports standard (100 kHz) and fast-mode (400 kHz) clock rates, and includes noise filtering on SCL/SDA inputs to improve bus robustness in noisy environments.
Interrupt generation is triggered only when an input pin's logic level differs from its corresponding Input Port register value - not by output changes - and is cleared upon reading the relevant port register. Power-on reset initializes all registers to default states, including 16 high-impedance inputs with internal weak pull-ups to VDD.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| I/O Count | 16 bidirectional pins, split across two 8-bit ports with independent configuration registers |
| Supply Voltage | 2.3 V to 5.5 V - enables direct interfacing with 3.3 V and 5 V logic domains without level shifters |
| I/O Voltage Tolerance | 5 V tolerant - allows safe connection to 5 V peripherals even when VDD = 3.3 V |
| Interrupt Output | Active-low open-drain - requires external pull-up; asserts when any configured input changes state |
| I²C Clock Rate | 0 Hz to 400 kHz - compatible with standard and fast-mode I²C buses; no external clock required |
| Standby Current | 0.25 µA typical at VDD = 5.5 V with all I/O as inputs - supports ultra-low-power sleep modes |
| ESD Rating | 2000 V HBM - meets industrial-grade ESD immunity requirements per JESD22-A114 |
Pinout & Package
TSSOP24 package (SOT355-1), 4.4 mm body width, 0.65 mm pitch, 24-lead plastic thin shrink small outline package.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| INT (Pin 1) | Interrupt output | Open-drain signal asserted low when input state changes; must be pulled up externally |
| A0–A2 (Pins 21, 2, 3) | I²C address inputs | Set 3 LSBs of 7-bit slave address (0x20–0x27); enable up to eight devices on same bus |
| IO0_0–IO0_7 (Pins 4–11) | Port 0 I/O | Eight programmable bidirectional pins; default to high-impedance inputs at power-on |
| VSS (Pin 12) | Ground | Primary supply ground reference; must be connected for proper operation |
| IO1_0–IO1_7 (Pins 13–20) | Port 1 I/O | Second set of eight I/Os with identical register mapping and behavior as Port 0 |
| SCL (Pin 22) | I²C clock | Input-only; includes internal noise filter for reliable timing in electrically noisy environments |
| SDA (Pin 23) | I²C data | Open-drain bidirectional line; requires external pull-up resistor |
| VDD (Pin 24) | Supply voltage | Accepts 2.3–5.5 V; powers internal logic and I/O drivers; decoupling capacitor recommended |
Key Features
| Feature | Design Value |
|---|---|
| Polarity Inversion Register | Per-pin inversion of input port read values - simplifies firmware handling of active-low sensors or switches |
| Configurable I/O Direction | Individual bit-level control via Configuration Registers 6 & 7 - enables dynamic reassignment of pins as inputs or outputs at runtime |
| No Glitch on Power-Up | Internal power-on reset ensures known initial state - prevents spurious outputs during system boot |
| 5 V Tolerant I/Os | Safe operation with 5 V signals while VDD = 3.3 V - eliminates need for external level translators in mixed-voltage designs |
| Low Standby Current | 0.25 µA typical - extends battery life in portable or energy-harvesting applications |
Applications
| Industrial Keypad Interface | LED Status Panel Control |
|---|---|
Use Scenario: Scanning a 10-digit numeric keypad in an industrial HMI panel where MCU GPIOs are constrained. IC Role / Device Role / Timing Role: GPIO expander providing 16 configurable I/Os; Port 0 scans rows (outputs), Port 1 reads columns (inputs) with interrupt-driven edge detection. Use Value: Reduces MCU firmware polling overhead and enables immediate response to keypresses via INT assertion. | Use Scenario: Driving 12 status LEDs (power, fault, comms, etc.) on a DIN-rail mounted PLC module. IC Role / Device Role / Timing Role: Parallel output driver with 5 V-tolerant outputs; configured as 12 outputs + 4 unused pins reserved for future expansion. Use Value: Eliminates discrete transistor buffers; supports direct 5 V LED drive from 3.3 V MCU-controlled PCA9555PW/DG,118. |
| ACPI Power Switch Monitoring | Multi-Sensor Signal Conditioning Hub |
Use Scenario: Monitoring mechanical power switches and thermal cut-offs in server rack power distribution units. IC Role / Device Role / Timing Role: Input monitor with interrupt capability; all 16 pins configured as inputs with pull-ups, INT tied to host controller's GPIO interrupt line. Use Value: Enables single-interrupt wake-up from deep sleep; avoids continuous I²C polling and reduces system power consumption. | Use Scenario: Aggregating digital outputs from temperature, humidity, and airflow sensors in HVAC control units. IC Role / Device Role / Timing Role: Signal conditioning hub; inputs conditioned via polarity inversion register to normalize active-low sensor outputs before forwarding to MCU. Use Value: Standardizes sensor interface logic in firmware; removes need for per-sensor software inversion logic. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar GPIO expander applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| PCA9554PW,118 | 8-bit I/O count; identical TSSOP24 package, same I²C address map, no polarity inversion register | Lower I/O density; insufficient for 16-signal monitoring or keypad matrix; suitable for simple 8-bit expansion | Select when only 8 I/Os are needed and polarity inversion is unnecessary to reduce cost and firmware complexity |
| TCA6424APWR | 16-bit, 3.3 V only (1.65–3.6 V), higher drive (25 mA), integrated reset pin, no 5 V tolerance | Not usable in 5 V signal environments; requires level translation for legacy peripherals; better for modern low-voltage systems | Prefer for new 3.3 V-only designs requiring higher sink current or hardware reset control; avoid if 5 V I/O tolerance is required |
Compared with PCA9554PW,118, the PCA9555PW/DG,118 doubles I/O capacity and adds polarity inversion - critical for heterogeneous sensor interfaces. Against TCA6424APWR, it trades 5 V tolerance and wider VDD range for lower maximum sink current and no hardware reset, making it more suitable for mixed-voltage industrial retrofits.
Availability
PCA9555PW/DG,118 is available at Aetrix Electronics and suitable for industrial HMIs, PLC I/O expansion, and sensor aggregation systems requiring stable component supply, long-term lifecycle support, and guaranteed traceable sourcing.
Supply support for PCA9555PW/DG,118 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor company headquartered in Eindhoven, Netherlands, specializing in secure connectivity solutions for automotive, industrial, and IoT applications.
The PCA9555 product line was designed to extend microcontroller I/O in resource-constrained embedded systems using standardized I²C infrastructure - targeting industrial control, building automation, and appliance interfaces where reliability and voltage flexibility are critical.
FAQ
What is the I²C slave address range supported by the PCA9555PW/DG,118?
The PCA9555PW/DG,118 supports seven user-configurable I²C slave addresses (0x20–0x26) via A0–A2 pins, plus one fixed address (0x27) when all address pins are high. This allows up to eight PCA9555PW/DG,118 devices on a single I²C bus without address conflict. The base address is 0x20, and each combination of A0/A1/A2 increments the address by 1.
Does the PCA9555PW/DG,118 require external pull-up resistors on SDA and SCL lines?
Yes, the PCA9555PW/DG,118 requires external pull-up resistors on both SDA and SCL lines because its I²C interface uses open-drain outputs. Typical values range from 1.8 kΩ to 10 kΩ depending on bus capacitance and speed - 4.7 kΩ is recommended for 400 kHz operation with moderate trace length. The PCA9555PW/DG,118 itself does not integrate pull-ups.
How does the interrupt output (INT) behave when multiple input pins change simultaneously on the PCA9555PW/DG,118?
The INT pin on the PCA9555PW/DG,118 is asserted low whenever *any* configured input pin changes state relative to its Input Port register value - regardless of how many pins change. It remains asserted until the corresponding Input Port register (Port 0 or Port 1) is read, which clears the interrupt condition for that port only. Simultaneous changes across both ports will keep INT active until both ports are read.
Can the PCA9555PW/DG,118 drive LEDs directly, and what current limits apply?
Yes, the PCA9555PW/DG,118 can drive LEDs directly in sink mode (common-anode configuration). Each I/O pin supports up to 20 mA sink current at VOL ≤ 0.5 V (VDD ≥ 2.3 V), with total device sink limit of 200 mA across all pins. For reliable operation, external current-limiting resistors must be used, and per-port current (8 pins) must not exceed 100 mA. The PCA9555PW/DG,118 does not support source-mode LED drive above 8 mA.
Is the PCA9555PW/DG,118 pin-compatible with the PCA9554 series?
Yes, the PCA9555PW/DG,118 is pin-compatible with the PCA9554PW,118 in the same TSSOP24 package and shares identical pin functions and I²C address mapping. However, software is not compatible due to added registers (polarity inversion, enhanced configuration) and different default register values - firmware must be updated to initialize and access the extended feature set of the PCA9555PW/DG,118.
PCA9555PW/DG,118 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Series:
- -
- Package/Case:
- 24-TSSOP (0.173", 4.40mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Number of I/O:
- 16
- Interface:
- I2C, SMBus
- Interrupt Output:
- Yes
- Features:
- POR
- Output Type:
- Push-Pull
- Current - Output Source/Sink:
- 10mA, 25mA
- Clock Frequency:
- 400 kHz
- Voltage - Supply:
- 2.3V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 24-TSSOP
PCA9555PW/DG,118 FAQ
1.How can I place an order for PCA9555PW/DG,118 through Aetrix?
Please submit a Request for Quotation (RFQ) for PCA9555PW/DG,118 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for PCA9555PW/DG,118 reliable?
The price and inventory of PCA9555PW/DG,118 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PCA9555PW/DG,118 is usually 5 days.
3.What payment methods are accepted for PCA9555PW/DG,118?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PCA9555PW/DG,118 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for PCA9555PW/DG,118?
PCA9555PW/DG,118 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your PCA9555PW/DG,118 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for PCA9555PW/DG,118?
For technical support, including PCA9555PW/DG,118 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PCA9555PW/DG,118 requirements.
6.How does Aetrix verify that PCA9555PW/DG,118 is sourced from the original manufacturer or authorized distributors?
All PCA9555PW/DG,118 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PCA9555PW/DG,118 meets industry standards.
7.What is the process for return or replacement of PCA9555PW/DG,118?
All PCA9555PW/DG,118 units undergo pre-shipment inspection (PSI). If there is an issue with PCA9555PW/DG,118, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The PCA9555PW/DG,118 part is unused and in its original packaging.
Return procedure for PCA9555PW/DG,118:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
PCA9555PW/DG,118 Tags

-
TCA6408ARSVR
Texas Instruments
-
TCA9535RTWR
Texas Instruments

-
FXL6408UMX
onsemi

-
PCF8574ADWR
Texas Instruments

-
PCF8574APWR
Texas Instruments

-
TCA9555PWR
Texas Instruments
-
TCA9554PWR
Texas Instruments
-
TCA9554APWR
Texas Instruments

-
TCA9539PWR
Texas Instruments
-
TCA9534PWR
Texas Instruments
-
TCA9555RTWR
Texas Instruments

-
TCA9535PWR
Texas Instruments
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

