NXP Semiconductors PCA9558PW,112
- Part No.:
- PCA9558PW,112
- Manufacturer:
- NXP Semiconductors
- Category:
- Specialized
- Package:
- 28-TSSOP (0.173", 4.40mm Width)
- Datasheet:
-
PCA9558PW,112.pdf
- Description:
- IC INTERFACE SPECIALIZED 28TSSOP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
PCA9558PW,112 from NXP Semiconductors is an integrated I²C/SMBus device combining an 8-bit GPIO expander, a 5-bit multiplexed/1-bit latched 6-bit EEPROM DIP switch, and a 2-kbit serial EEPROM with write protection. It operates from 3.0 V to 3.6 V, supports up to 400 kHz bus speed, and features 5 V-tolerant open-drain outputs for MUX_OUTx and IOx pins. Used in server motherboard configuration, board version tracking, and telecom line card identification.
For engineers reviewing the PCA9558PW,112 datasheet, PCA9558PW,112 pinout, PCA9558PW,112 application, or PCA9558PW,112 equivalent, this page delivers verified functional architecture, confirmed I²C register mapping, validated EEPROM partitioning (6-bit + 256-byte), exact TSSOP28 pin roles, and real-world use cases in multi-card telecom infrastructure and field-serviceable embedded systems.
Technical Context
The PCA9558PW,112 implements a dual-mode multiplexer controlled by either external pins (MUX_SELECT, MUX_OUT_LOW) or internal MUXCNTRL register writes via I²C, enabling dynamic selection between hardware MUX_INx inputs and EEPROM-stored configuration bits. Its GPIO subsystem uses four dedicated registers (IP, OP, PI, IOC) for input sampling, output driving, polarity inversion, and direction control - all accessible over I²C with command-byte addressing per Table 3.
The device integrates three non-overlapping memory domains: a 6-bit EEPROM for DIP-switch emulation (programmable/readable via I²C command 0x04/0x06), a 256-byte (2-kbit) EEPROM for board ID/revision data (command 0x01/0x03), and volatile GPIO registers resettable via IO_OUT_LOW. All EEPROM writes require WP = LOW and complete in ~4 ms with automatic bus arbitration hold.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| I²C Bus Speed | Up to 400 kHz - supports standard/fast-mode SMBus-compatible communication without timing margin violations. |
| Supply Voltage | 3.0 V to 3.6 V - matches 3.3 V system rails; not operational at 5 V supply despite 5 V-tolerant I/Os. |
| GPIO Pins | 8 open-drain IO0–IO7 - power-up default as outputs; configurable per IOC register; 5 V tolerant with 4 mA sink capability. |
| MUX Outputs | 6 open-drain MUX_OUTA–E + NON_MUXED_OUT - selectable between EEPROM values or MUX_INA–E inputs; 5 V tolerant. |
| EEPROM Capacity | 6-bit + 256-byte (2 kbit) - separate address spaces; 6-bit stores VID/vendor config; 256-byte stores board ID, revision, maintenance history. |
| Address Pins | A0 only - enables two devices on same I²C bus; slave address fixed as 0x4C/0x4D depending on A0 logic level. |
| ESD Protection | 2000 V HBM, 1000 V CDM - meets JEDEC JESD22-A114/C101 for robust handling in manufacturing and field service. |
Pinout & Package
TSSOP28 package (SOT361-1), 4.4 mm body width, 0 °C to 70 °C operating range.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| SCL (1) | I²C clock input | Drives internal state machine; requires external pull-up; supports 400 kHz timing. |
| SDA (2) | I²C bidirectional data | Open-drain interface; shares bus with other SMBus devices; requires pull-up. |
| IO_OUT_LOW (3) | Active-low GPIO reset | Holding LOW ≥ Tcy(W) resets OP, PI, IOC registers to power-up defaults. |
| A0 (4) | I²C slave address LSB | Selects address 0x4C (A0=LOW) or 0x4D (A0=HIGH); enables dual-device bus topology. |
| MUX_INA–E (5–9) | Multiplexer input sources | Hardware-selectable inputs for VID, vendor ID, or board option settings. |
| VSS (10) | Ground reference | Primary return path for all digital and EEPROM circuitry; must be low-impedance. |
| IO0–IO7 (11–18) | Configurable GPIO | Open-drain outputs by default; reconfigurable as inputs via IOC register bit settings. |
| MUX_SELECT (19) | Multiplexer mode control | LOW selects EEPROM data for MUX_OUTx; HIGH selects MUX_INx inputs. |
| MUX_OUTE–A (20–24) | Multiplexed outputs | Open-drain; driven by EEPROM or MUX_INx per MUX_SELECT/MUXCNTRL state. |
| NON_MUXED_OUT (25) | Latched EEPROM output | Latches EEPROM value on rising edge of MUX_SELECT or I²C ACK in register mode. |
| MUX_OUT_LOW (26) | MUX output override | Active-LOW forces all MUX_OUTx to logic 0 regardless of source selection. |
| WP (27) | EEPROM write protect | Active-HIGH; disables all EEPROM writes when asserted; required for field reliability. |
| VDD (28) | Power supply | 3.0–3.6 V only; powers core logic, EEPROM, and I/O drivers; internal POR circuitry. |
Key Features
| Feature | Design Value |
|---|---|
| Integrated DIP switch replacement | 5-bit 2-to-1 multiplexer + 1-bit latch eliminates physical jumpers; configuration updated dynamically over I²C without power cycle. |
| Dual EEPROM architecture | Separate 6-bit (DIP config) and 256-byte (board ID/history) EEPROMs prevent cross-contamination and enable independent access protocols. |
| Hardware/software multiplexer control | MUX_SELECT pin or MUXCNTRL register bit B1 enables seamless transition between hardware-defined and firmware-defined configuration modes. |
| GPIO register persistence | IOC, OP, PI registers retain state across I²C transactions; IO_OUT_LOW provides deterministic reset for field recovery. |
| SMBus-compliant interface | Fully compatible with Intel chipsets; handles Word Data instructions and Process Call equivalents for EEPROM read/write sequences. |
Applications
| Server Motherboard Configuration | Telecom Line Card Identification |
|---|---|
Use Scenario: Configuring processor voltage (VID) and vendor identification on high-density server motherboards during manufacturing and field upgrades. IC Role / Device Role / Timing Role: PCA9558PW,112 acts as a programmable DIP switch and non-volatile configuration store, interfacing with host BMC over I²C. Use Value: Eliminates manual jumper setting; enables remote firmware-based board personalization and revision-controlled configuration updates. |
Use Scenario: Storing unique card ID, firmware version, and maintenance history on telecom base station line cards deployed across distributed infrastructure. IC Role / Device Role / Timing Role: PCA9558PW,112 serves as a persistent board identity module, accessed by shelf controller via SMBus for inventory and diagnostics. Use Value: Enables automated field recall, failure root-cause analysis, and zero-touch provisioning using stored EEPROM data. |
| Multi-Card Health Monitoring | Embedded System Board Version Tracking |
Use Scenario: Monitoring power-good status, thermal alerts, and fault flags from up to 8 remote cards in a carrier-grade chassis with centralized supervision. IC Role / Device Role / Timing Role: PCA9558PW,112 functions as an I²C-accessible GPIO hub, collecting discrete signals and driving alarm LEDs via open-drain IOx pins. Use Value: Reduces interconnect complexity versus discrete buffers; supports real-time health polling at 400 kHz without CPU overhead. |
Use Scenario: Tracking PCB revision, build date, and calibration data across production batches of industrial control modules requiring long-term traceability. IC Role / Device Role / Timing Role: PCA9558PW,112 provides tamper-resistant, field-writable storage for immutable board metadata linked to manufacturing execution systems. Use Value: Ensures compliance with ISO 9001 traceability requirements; prevents counterfeit board substitution via authenticated EEPROM signatures. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar I²C-based configuration and I/O expansion applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| PCA9555PW,118 | 8-bit I/O expander only; no DIP switch or EEPROM; identical TSSOP28 package and I²C interface. | Lacks board ID storage and hardware/firmware-configurable multiplexing; suitable only for pure GPIO extension. | Select when EEPROM and DIP-switch functionality are unnecessary and cost reduction is prioritized. |
| PCA9557DP,118 | 8-bit I/O expander with reset pin; no EEPROM or multiplexer; smaller SO16 package (not pin-compatible). | Cannot store configuration or board identity; limited to basic remote I/O control without non-volatility. | Choose for space-constrained designs where board-level configuration management is handled externally. |
Compared with PCA9558PW,112, PCA9555PW,118 removes EEPROM and multiplexer logic to reduce cost and die size while retaining full GPIO functionality, whereas PCA9557DP,118 sacrifices both memory and package compatibility to achieve minimal footprint - making PCA9558PW,112 uniquely suited for systems requiring integrated configuration, identity, and I/O in one TSSOP28 device.
Availability
PCA9558PW,112 is available at Aetrix Electronics and suitable for server motherboard configuration, telecom line card identification, and industrial board version tracking requiring stable component supply across extended production lifecycles.
Supply support for PCA9558PW,112 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor leader focused on secure connectivity solutions for automotive, industrial, and IoT applications, with deep expertise in I²C/SMBus interface IP and system-on-chip integration.
The PCA9558PW,112 belongs to NXP's I²C peripheral portfolio designed specifically for board-level configuration management, identity storage, and remote I/O control in high-reliability computing and communications infrastructure.
FAQ
What is the primary function of the PCA9558PW,112 in a server motherboard design?
The PCA9558PW,112 serves as an integrated configuration hub, combining an 8-bit I/O expander, a 5-bit multiplexed/1-bit latched EEPROM DIP switch, and a 2-kbit serial EEPROM. In server motherboards, it stores processor VID settings, vendor identification, board revision, and firmware version - all accessible over I²C without physical jumpers. This enables remote, firmware-driven configuration updates and eliminates manual setup errors during manufacturing and field service.
How does the PCA9558PW,112 handle EEPROM write protection?
The PCA9558PW,112 uses an active-HIGH WP (Write Protect) pin (Pin 27). When WP is driven HIGH, all writes to both the 6-bit and 256-byte EEPROM arrays are blocked - preventing accidental or malicious corruption of critical configuration and board identity data. This hardware-level protection remains effective even during brown-out conditions, ensuring data integrity across power cycles and field deployments.
Can the PCA9558PW,112 operate with a 5 V I²C bus while powered at 3.3 V?
Yes - the PCA9558PW,112 features 5 V-tolerant inputs and open-drain outputs (SCL, SDA, MUX_OUTx, IOx, MUX_INx), allowing direct connection to 5 V I²C buses while being powered from a 3.0–3.6 V supply. However, VDD must remain within its specified range; the device does not generate 5 V logic levels and relies on external pull-ups to the higher bus voltage for signal integrity.
What is the role of the MUX_SELECT and MUX_OUT_LOW pins on the PCA9558PW,112?
MUX_SELECT (Pin 19) controls source selection for the six MUX_OUTx outputs: LOW selects data from the 6-bit EEPROM, HIGH selects the MUX_INx hardware inputs. MUX_OUT_LOW (Pin 26) is an active-LOW override that forces all MUX_OUTx outputs to logic 0 regardless of source selection - used for fail-safe shutdown or initialization sequencing. Both pins enable hardware-first configuration before firmware takes control.
How many PCA9558PW,112 devices can share the same I²C bus?
Two PCA9558PW,112 devices can share the same I²C bus, enabled by the single A0 address pin (Pin 4). With A0 grounded, the device responds to slave address 0x4C; with A0 tied HIGH, it responds to 0x4D. No additional address pins or configuration registers are required - simplifying multi-device topologies in backplane or modular chassis designs.
PCA9558PW,112 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Series:
- -
- Package/Case:
- 28-TSSOP (0.173", 4.40mm Width)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Applications:
- PC's, PDA's
- Interface:
- I2C
- Voltage - Supply:
- 3V ~ 3.6V
- Supplier Device Package:
- 28-TSSOP
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
PCA9558PW,112 FAQ
1.How can I place an order for PCA9558PW,112 through Aetrix?
Please submit a Request for Quotation (RFQ) for PCA9558PW,112 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for PCA9558PW,112 reliable?
The price and inventory of PCA9558PW,112 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PCA9558PW,112 is usually 5 days.
3.What payment methods are accepted for PCA9558PW,112?
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4.How is shipping managed for PCA9558PW,112?
PCA9558PW,112 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your PCA9558PW,112 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for PCA9558PW,112?
For technical support, including PCA9558PW,112 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PCA9558PW,112 requirements.
6.How does Aetrix verify that PCA9558PW,112 is sourced from the original manufacturer or authorized distributors?
All PCA9558PW,112 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PCA9558PW,112 meets industry standards.
7.What is the process for return or replacement of PCA9558PW,112?
All PCA9558PW,112 units undergo pre-shipment inspection (PSI). If there is an issue with PCA9558PW,112, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The PCA9558PW,112 part is unused and in its original packaging.
Return procedure for PCA9558PW,112:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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