NXP Semiconductors PCA9560D,112

Overview

PCA9560D,112 from NXP Semiconductors is a 20-pin TSSOP I²C/SMBus EEPROM-based DIP switch replacement IC with dual 6-bit non-volatile registers, 5-bit multiplexed open-drain outputs, and latched NON-MUXED_OUT output. It enables dynamic CPU VID configuration in performance/deep-sleep modes, supports mobile/desktop voltage ID programming, and replaces mechanical DIP switches in server VRM interfaces without power-down.

For engineers reviewing the PCA9560D,112 datasheet, PCA9560D,112 pinout, PCA9560D,112 application, or PCA9560D,112 equivalent, key selection criteria include its dual-register VID selection capability, I²C address configurability (A0/A1), active-high write protection (WP), 3.0–3.6 V operation, and drop-in compatibility with PCA9559 in CPU voltage control circuits.

Technical Context

The PCA9560D,112 implements a 5-bit 3-to-1 multiplexer architecture selecting between two internal 6-bit EEPROM registers or five external hardware inputs (MUX_IN_A–E), with MUX_SELECT_0/1 pins controlling source selection and override capability via I²C command register. Its NON-MUXED_OUT provides latched 6th-bit output from selected EEPROM register.

It integrates I²C-bus logic with internal pull-ups on WP, MUX_SELECT, and MUX_IN pins; supports Standard- and Fast-mode I²C (up to 400 kHz); features 3.6 ms internal EEPROM write cycle time; and retains settings across power cycles with 10-year data retention and 100,000 write cycles.

Key Specifications

Pinout & Package

TSSOP20 package (SOT360-1), 4.4 mm body width, 0.65 mm lead pitch, 1.1 mm max height - surface-mount compatible with standard reflow profiles and high-density PCB layouts.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar I²C-configurable VID switch applications.

Compared with PCA9559PW,118, PCA9560D,112 adds a second EEPROM register and MUX_IN visibility for richer configuration management; compared with PCA9555PW,118, it delivers purpose-built VID translation with guaranteed power-cycle persistence and hardware fallback - eliminating software overhead and external storage.

Availability

PCA9560D,112 is available at Aetrix Electronics and suitable for CPU voltage ID configuration, server VRM control, desktop power management, and embedded boot configuration requiring stable component supply and long-term obsolescence support.

Supply support for PCA9560D,112 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

NXP Semiconductors is a global semiconductor company headquartered in Eindhoven, Netherlands, specializing in secure connectivity solutions for automotive, industrial, and consumer applications.

The PCA9560D,112 belongs to NXP's I²C peripheral portfolio designed specifically for replacing mechanical DIP switches and jumpers in power management subsystems, with emphasis on CPU VID control, system configuration, and field-upgradable hardware settings.

FAQ

What is the primary function of the PCA9560D,112 in CPU voltage control systems?

The PCA9560D,112 serves as an I²C-programmable VID translator that selects between two 6-bit non-volatile EEPROM registers or five external hardware inputs to generate a 6-bit voltage identification code for the VRM. It enables dynamic CPU voltage switching - including performance, deep sleep, and deeper sleep modes - without requiring mechanical DIP switches or system power-down. The PCA9560D,112 integrates this functionality into a single TSSOP20 device with hardware write protection and I²C override capability.

How does the PCA9560D,112 differ from the PCA9559 in terms of register architecture and use cases?

The PCA9560D,112 contains two independent 6-bit EEPROM registers, enabling three distinct CPU voltage states, whereas the PCA9559 has only one register supporting just two states. This allows the PCA9560D,112 to implement deeper power-saving modes without external logic. Additionally, the PCA9560D,112 supports reading MUX_IN pin states via I²C - a feature absent in the PCA9559 - and offers MUX_SELECT pin override via I²C commands. The PCA9560D,112 maintains pin-to-pin and firmware compatibility with the PCA9559, making it a true drop-in upgrade.

Can the PCA9560D,112 be used with 5 V or 2.5 V VRMs despite its 3.0–3.6 V supply requirement?

Yes, the PCA9560D,112 features 5 V and 2.5 V tolerant inputs and outputs, meaning its MUX_OUT_A–E and NON-MUXED_OUT pins can safely interface with VRMs operating at those voltages when pulled up to the respective rail. Its VDD supply remains strictly 3.0–3.6 V, but the I/O tolerance eliminates the need for external level shifters. This capability is explicitly confirmed in the datasheet's "Recommended operating conditions" table and supports interoperability with legacy and mixed-voltage power systems.

What happens to the MUX_OUT outputs during power-on reset, and how is initial state determined?

At power-on, the PCA9560D,112 enters a reset state until VDD reaches VPOR (2.3–2.7 V). Upon release, MUX_OUT outputs default to high-impedance (open-drain) and assume values based on MUX_SELECT_0/1 pin levels and stored EEPROM contents per the function table. If MUX_SELECT_0 = 0 and MUX_SELECT_1 = 1, outputs reflect EEPROM register 0; if both are 0, they reflect register 1; if MUX_SELECT_0 = 1, NON-MUXED_OUT latches and MUX_OUT reflects MUX_IN pins. Factory EEPROM defaults are all zeros, ensuring known startup behavior. The PCA9560D,112 guarantees deterministic initialization without external intervention.

Is the PCA9560D,112 suitable for hot-swap or live-reconfiguration scenarios in server backplanes?

Yes, the PCA9560D,112 supports live reconfiguration via I²C without power cycling. Its MUX_SELECT pins can be overridden by I²C commands, allowing firmware to change VID source (EEPROM 0/1 or MUX_IN) and update EEPROM contents on-the-fly. Write operations complete within 3.6 ms, and the device remains responsive to I²C traffic during this window (though writes are not acknowledged until complete). Combined with 5 V/2.5 V I/O tolerance and robust ESD protection (2000 V HBM), the PCA9560D,112 meets requirements for hot-swap-capable server VRM control where uninterrupted operation is critical.