NXP Semiconductors PCA9560D,118

Overview

PCA9560D,118 from NXP Semiconductors is a 20-pin TSSOP I²C/SMBus EEPROM-based DIP switch replacement IC used for CPU VID configuration between processor and VRM. It integrates two 6-bit non-volatile registers, five hardware input pins, and a 5-bit multiplexed open-drain output with latched non-multiplexed output. It enables dynamic voltage selection for performance, deep sleep, and deeper sleep modes in desktop/mobile CPUs without power-down.

For engineers reviewing the PCA9560D,118 datasheet, PCA9560D,118 pinout, PCA9560D,118 application, or PCA9560D,118 equivalent, key selection considerations include I²C address configurability (A0/A1), write-protect control (WP), MUX_SELECT override capability, dual-register selection logic, and 3.0–3.6 V supply compatibility with 5 V-tolerant I/O.

Technical Context

The PCA9560D,118 implements a dual-register 5-bit multiplexer architecture where MUX_SELECT_0 and MUX_SELECT_1 jointly determine whether outputs reflect external MUX_IN pins, EEPROM register 0, or EEPROM register 1. Its internal 6-bit non-volatile registers are independently readable/writable via I²C command codes 00H (EEPROM_0), 01H (EEPROM_1), and FFH (MUX_IN).

I²C communication supports standard-mode (up to 100 kHz) and fast-mode (up to 400 kHz) operation with built-in pull-up resistors on WP, MUX_SELECT, and MUX_IN pins. Write protection is active-high on WP; EEPROM writes require WP = LOW and complete within 3.6 ms after STOP condition, during which the device does not acknowledge I²C addresses.

Key Specifications

Pinout & Package

TSSOP20 package (SOT360-1), 4.4 mm body width, 0.65 mm lead pitch, 20-lead plastic thin shrink small outline package.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar DIP-switch-replacement applications.

Compared with PCA9559PW,118, PCA9560D,118 adds a second EEPROM register and MUX_IN visibility for richer VID state management; compared with PCA9555PW,112, it delivers autonomous, persistent configuration without host CPU intervention-critical for boot-time voltage setup.

Availability

PCA9560D,118 is available at Aetrix Electronics and suitable for CPU voltage ID configuration, server platform management, and telecom baseband power control requiring stable component supply, long-term data retention, and I²C-based remote reprogramming.

Supply support for PCA9560D,118 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

NXP Semiconductors is a global semiconductor company headquartered in Eindhoven, Netherlands, specializing in secure connectivity solutions for automotive, industrial, and IoT applications.

The PCA9560D,118 belongs to NXP's I²C interface and system configuration IC portfolio, designed specifically to replace mechanical DIP switches and jumpers in high-reliability computing platforms where dynamic, non-volatile, and remotely configurable voltage identification is required.

FAQ

What is the primary function of the PCA9560D,118 in CPU voltage configuration?

The PCA9560D,118 serves as an I²C-programmable VID translator between CPU and VRM, using two 6-bit non-volatile EEPROM registers to deliver three distinct voltage states (performance, deep sleep, deeper sleep). It bypasses CPU-defined VID codes to provide alternate voltage settings-enabling up to 7.5% performance gain or reduced power consumption without hardware modification. The PCA9560D,118 retains its last-selected configuration through power cycles, ensuring consistent boot behavior.

How does the PCA9560D,118 handle write protection and EEPROM durability?

The PCA9560D,118 uses an active-high WP pin to disable EEPROM writes when asserted-preventing accidental configuration changes during system operation. When WP = LOW, writes to either 6-bit register complete within 3.6 ms after the I²C STOP condition, during which the device ignores further I²C traffic. Each register supports ≥100,000 write cycles and guarantees ≥10 years of data retention at +85 °C, validated per JEDEC JESD22-A117. The PCA9560D,118 also features internal power-on reset to ensure deterministic initialization.

Can the PCA9560D,118 be used alongside other I²C devices on the same bus?

Yes-the PCA9560D,118 supports up to four devices on a single I²C bus using hardware-configurable A0 and A1 pins, yielding addresses 0x48–0x4B. Its I²C interface complies with standard- and fast-mode specifications (0–400 kHz), includes internal pull-up resistors on control inputs, and tolerates 5 V and 2.5 V signals-enabling interoperability with mixed-voltage controllers. The PCA9560D,118 acknowledges only its assigned address and ignores traffic directed to other devices, ensuring reliable multi-drop operation.

What is the role of MUX_SELECT_0 and MUX_SELECT_1 in PCA9560D,118 operation?

MUX_SELECT_0 and MUX_SELECT_1 jointly determine the source of MUX_OUT and NON-MUXED_OUT signals: MUX_SELECT_0 = 0 selects EEPROM content (register 0 or 1), while MUX_SELECT_0 = 1 latches NON-MUXED_OUT. MUX_SELECT_1 chooses between EEPROM register 0 (LOW) or register 1 (HIGH). These pins can be overridden by I²C commands (e.g., 11111100b forces MUX_OUT from EEPROM_1), allowing software control to supersede hardware settings. This dual-control scheme makes the PCA9560D,118 adaptable to both fixed and dynamic configuration needs.

Is the PCA9560D,118 pin-compatible with earlier NXP DIP switch ICs?

Yes-the PCA9560D,118 is a drop-in replacement for the PCA9559PW,118 in TSSOP20 package, sharing identical pinout, footprint (SOT360-1), and electrical interface. No PCB layout changes or firmware modifications are required. Key enhancements include a second EEPROM register, MUX_IN visibility via I²C (command FFH), and MUX_SELECT override capability. When PCA9559's single register is left at default (all zeros), MUX_SELECT_1 on the PCA9560D,118 emulates the PCA9559's OVERRIDE# pin-ensuring backward compatibility while enabling new functionality.