NXP Semiconductors PCA9560PW,112

Overview

PCA9560PW,112 from NXP Semiconductors is a 20-pin TSSOP I²C/SMBus EEPROM-based DIP switch replacement IC used for CPU VID configuration between processor and VRM. It integrates two 6-bit non-volatile registers, five hardware input pins, five open-drain multiplexed outputs, and one latched non-multiplexed output. It enables dynamic voltage selection across performance, deep sleep, and deeper sleep modes without power-down.

For engineers reviewing the PCA9560PW,112 datasheet, PCA9560PW,112 pinout, PCA9560PW,112 application, or PCA9560PW,112 equivalent, this device supports real-time VID reconfiguration in server, telecom, and desktop platforms - with critical attention to write-protect control, MUX_SELECT logic states, EEPROM register addressing (00H/01H/FFH), and I²C clock frequency up to 400 kHz.

Technical Context

The PCA9560PW,112 implements a dual-register 5-bit multiplexer architecture where MUX_SELECT_0 and MUX_SELECT_1 jointly determine whether MUX_OUT signals originate from external MUX_IN pins, EEPROM register 0, or EEPROM register 1. Its internal 6-bit non-volatile registers are fully readable/writable via I²C using command codes 00H, 01H, and FFH - enabling software-controlled VID updates without physical jumper changes.

It features active-high write protection (WP), internal pull-up resistors on WP, MUX_SELECT, and MUX_IN pins, and supports 3.0 V–3.6 V operation with 5 V-tolerant I/O. The NON-MUXED_OUT pin latches its value when MUX_SELECT_0 = 1 and reflects the MSB of the selected EEPROM register, providing stable voltage ID signaling during mode transitions.

Key Specifications

Pinout & Package

TSSOP20 package (SOT360-1), 4.4 mm body width, 0.65 mm lead pitch, 20-lead plastic thin shrink small outline.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar DIP switch replacement applications.

Compared with PCA9559PW,118 and PCA9555PW,118, the PCA9560PW,112 uniquely delivers three-state VID support with hardware/software coexistence, MUX_IN visibility, and drop-in upgrade path - making it optimal for next-generation power-managed systems requiring field-reprogrammable voltage configuration.

Availability

PCA9560PW,112 is available at Aetrix Electronics and suitable for server platform configuration, desktop CPU VID tuning, and telecom baseband power management requiring stable component supply, long-term lifecycle assurance, and guaranteed traceable sourcing.

Supply support for PCA9560PW,112 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

NXP Semiconductors is a global semiconductor company headquartered in Eindhoven, Netherlands, specializing in secure connectivity solutions for automotive, industrial, and communication markets.

The PCA9560PW,112 belongs to NXP's I²C interface and system configuration IC product line, designed specifically to replace mechanical DIP switches and jumpers in high-reliability computing and infrastructure applications.

FAQ

What is the primary function of the PCA9560PW,112 in CPU voltage regulation?

The PCA9560PW,112 serves as an I²C-programmable VID translator between CPU and VRM, selecting from three voltage configurations (performance, deep sleep, deeper sleep) using two internal 6-bit EEPROM registers or external hardware inputs. It enables dynamic, software-controlled voltage adjustment without power cycling - a key capability implemented directly in the PCA9560PW,112's multiplexer logic and register architecture.

How does the PCA9560PW,112 differ from the PCA9559 in terms of register structure and functionality?

The PCA9560PW,112 contains two independent 6-bit non-volatile EEPROM registers, enabling three distinct VID states, whereas the PCA9559 has only one register supporting two states. Additionally, the PCA9560PW,112 allows reading MUX_IN pin values via I²C and supports I²C override of MUX_SELECT logic - capabilities absent in the PCA9559. These differences are explicitly documented in the PCA9560PW,112 datasheet Section 6.4.

Can the PCA9560PW,112 be used with 5 V I²C buses despite its 3.0–3.6 V supply?

Yes - the PCA9560PW,112 features 5 V-tolerant SCL and SDA pins, allowing direct connection to 5 V I²C buses while operating from a 3.3 V supply. Input thresholds meet VIH ≥ 2.7 V and VIL ≤ 0.9 V under 3.3 V VDD, and absolute maximum ratings permit 5.5 V inputs. This dual-voltage interoperability is confirmed in PCA9560PW,112 datasheet Tables 10 and 11.

What happens to the MUX_OUT outputs during power-up, and how is reset behavior managed?

At power-on, the PCA9560PW,112 asserts internal Power-On Reset (POR) until VDD reaches VPOR (2.3–2.7 V), holding outputs in high-impedance state. After reset release, MUX_OUT states depend on MUX_SELECT_0/1 levels and EEPROM contents per Table 9. Default EEPROM values are all zeros, and NON-MUXED_OUT reflects the MSB of the selected register - behavior defined in PCA9560PW,112 Section 6.6.

Is the PCA9560PW,112 pin-compatible with the PCA9559, and what conditions ensure seamless replacement?

Yes - the PCA9560PW,112 is pin-to-pin and footprint compatible with the PCA9559. Seamless replacement requires leaving EEPROM register 1 at its factory-default 0x00 value, so MUX_SELECT_1 functions identically to the PCA9559's OVERRIDE# pin. No software changes are needed, and the PCA9560PW,112 maintains identical MUX_OUT and NON-MUXED_OUT behavior under these conditions per Section 6.4.