NXP Semiconductors PCA9561D,112
- Part No.:
- PCA9561D,112
- Manufacturer:
- NXP Semiconductors
- Category:
- Specialized
- Package:
- 20-SOIC (0.295", 7.50mm Width)
- Datasheet:
-
PCA9561D,112.pdf
- Description:
- IC INTERFACE SPECIALIZED 20SO
- Quantity:
- Payment:

- Shipping:

Inventory:3,597
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Product details
Overview
PCA9561D,112 from NXP Semiconductors is a 20-pin TSSOP I²C-bus EEPROM DIP switch IC used for jumperless CPU VID configuration between processor and VRM. It integrates four 6-bit non-volatile EEPROM registers, six hardware input pins (MUX_IN_A–F), and six open-drain multiplexed outputs (MUX_OUT_A–F), supporting dynamic voltage tuning across five independent settings (four EEPROM + one hardware) in mobile/desktop SpeedStep and server applications.
For engineers reviewing the PCA9561D,112 datasheet, PCA9561D,112 pinout, PCA9561D,112 application, or PCA9561D,112 equivalent, this device enables precise, field-updatable CPU voltage selection without power-down-critical for performance boosting (up to 7.5% frequency gain), battery conservation, and DIP-switch replacement in telecom/networking infrastructure.
Technical Context
The PCA9561D,112 implements a dual-source 6-bit multiplexer controlled by MUX_SELECT: when low, outputs reflect EEPROM register 0–3 contents selected via I²C; when high, outputs mirror MUX_IN_A–F inputs directly. Its I²C interface supports up to 400 kHz Fast-mode operation, with address pins A0/A1 enabling four devices on one bus.
Non-volatile storage uses EEPROM cells rated for ≥100,000 write cycles and 10-year data retention. Write protection is managed by the WP pin, and internal Power-On Reset ensures deterministic initialization at VDD ≥ 2.3 V. All I/O pins are 5 V tolerant with hysteresis and spike suppression per JESD22-A114/C101.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage | 3.0 V to 3.6 V - defines operating window for stable EEPROM programming and I²C communication |
| I²C Clock Frequency | Up to 400 kHz - enables fast configuration updates without requiring system reset |
| EEPROM Registers | Four 6-bit non-volatile registers - provides five independent VID configurations (4 EEPROM + 1 hardware) |
| Output Type | Six open-drain MUX_OUT pins - allows wired-OR logic and level translation in VRM interface |
| Input Tolerance | 5 V and 2.5 V tolerant I/O - simplifies integration with mixed-voltage host systems |
| Write Endurance | ≥100,000 cycles - supports repeated field reconfiguration during system validation and tuning |
| Data Retention | ≥10 years - ensures persistent VID settings across equipment lifecycle without refresh |
Pinout & Package
TSSOP20 package (SOT360-1), 4.4 mm body width, 0.65 mm pitch, 1.1 mm max height - optimized for high-density PCB layouts in laptops and servers.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| SCL | I²C clock input | Controls timing of all register reads/writes; requires external pull-up resistor |
| SDA | I²C bidirectional data line | Carries command bytes, EEPROM data, and MUX_IN register reads |
| A0, A1 | Hardware address inputs | Set slave address bits; enable up to four PCA9561D,112 devices on same I²C bus |
| MUX_IN_A–F | External 6-bit input bank | Provides hardware-selectable VID source when MUX_SELECT = 1 |
| MUX_SELECT | Multiplexer mode control | Selects EEPROM (low) or MUX_IN (high); overrides I²C register selection |
| MUX_OUT_A–F | Open-drain 6-bit output bank | Drives VRM VID lines; requires external pull-ups to VDD or higher rail |
| WP | Write-protect enable | Blocks EEPROM writes when high; prevents accidental VID corruption during operation |
| VDD, VSS | Power supply and ground | 3.0–3.6 V supply with internal POR; decoupling capacitor required near VDD pin |
Key Features
| Feature | Design Value |
|---|---|
| Quad EEPROM register architecture | Enables five distinct VID configurations - critical for multi-mode CPU operation (performance/sleep/battery) |
| I²C override of MUX_SELECT | Allows software to force EEPROM output even when MUX_SELECT pin is high - improves system flexibility |
| 6-bit 5-to-1 multiplexer function | Replaces physical DIP switches/jumpers with programmable logic - eliminates manual configuration errors |
| 5 V/2.5 V tolerant I/O | Interoperates with legacy 5 V logic and modern 2.5 V interfaces without level shifters |
| ESD robustness | ≥200 V HBM / ≥1000 V CDM - ensures reliability in handling and board assembly environments |
Applications
| Laptop SpeedStep Configuration | Server CPU Voltage Tuning |
|---|---|
Use Scenario: Dynamic adjustment of CPU core voltage during OS-managed P-states in thin-and-light notebooks. IC Role / Device Role / Timing Role: VID configuration interface between Intel SpeedStep controller and VRM, delivering updated voltage codes via I²C. Use Value: Enables real-time voltage scaling without reboot, reducing power consumption by up to 30% in idle states while maintaining responsiveness. |
Use Scenario: Remote firmware update of CPU VID settings in rack-mounted servers without powering down chassis. IC Role / Device Role / Timing Role: Non-volatile VID translator placed between BMC and VRM, accepting SMBus commands to reprogram voltage tables. Use Value: Eliminates need for physical access to server internals, cutting maintenance downtime and enabling fleet-wide voltage optimization. |
| Telecom Baseband Processor Setup | Desktop Overclocking Platform |
Use Scenario: Field calibration of DSP voltage rails in 5G baseband units subject to thermal derating. IC Role / Device Role / Timing Role: Hardware-configurable VID selector feeding multiple VRMs for RF and baseband subsystems. Use Value: Supports adaptive voltage scaling based on ambient temperature readings, improving signal integrity under load. |
Use Scenario: User-adjustable CPU voltage presets in enthusiast desktop motherboards using BIOS-controlled I²C writes. IC Role / Device Role / Timing Role: EEPROM-based DIP switch replacement allowing BIOS to store and recall up to four overclocking profiles. Use Value: Delivers 7.5% CPU frequency boost at safe voltage margins, verified by factory-default EEPROM register values. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar VID configuration applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| PCA9559PW,118 | Single 6-bit EEPROM register; no MUX_SELECT override; 100 kHz I²C max | Limited to one fixed VID setting unless externally latched; unsuitable for multi-mode systems | Choose only for cost-sensitive, static-configuration designs where EEPROM update frequency is negligible |
| PCA9560PW,118 | Two 6-bit EEPROM registers; no hardware MUX_IN bank; lacks WP pin | Supports only two VID modes; no hardware fallback path or write protection against firmware faults | Select when dual-mode operation suffices and system-level write protection is handled elsewhere |
Compared with PCA9559PW,118 and PCA9560PW,118, the PCA9561D,112 uniquely delivers five independent VID sources (4 EEPROM + 1 hardware), I²C-override capability, and dedicated write protection-making it the only option for robust, field-updatable, multi-mode CPU voltage control in production systems.
Availability
PCA9561D,112 is available at Aetrix Electronics and suitable for laptop SpeedStep implementation, server BMC-integrated VID tuning, and telecom baseband processor configuration requiring stable component supply and long-term obsolescence management.
Supply support for PCA9561D,112 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor leader focused on secure connectivity solutions for automotive, industrial, and IoT applications, with deep expertise in I²C interface and power management ICs.
The PCA9561D,112 belongs to NXP's I²C EEPROM DIP switch product line, designed specifically to replace mechanical configuration elements in high-reliability computing platforms where remote, non-invasive voltage tuning is essential.
FAQ
What is the primary function of the PCA9561D,112 in a CPU voltage regulation system?
The PCA9561D,112 serves as a programmable VID translator between the CPU and Voltage Regulator Module (VRM). It selects from five independent voltage identification codes-four stored in non-volatile EEPROM registers and one derived from hardware inputs-and drives them onto six open-drain MUX_OUT pins. This enables dynamic, software-controlled CPU voltage adjustment without physical jumpers, supporting performance boosts up to 7.5% or battery-saving sleep modes. The PCA9561D,112 is explicitly designed for this role in mobile, desktop, and server platforms.
How does the MUX_SELECT pin interact with I²C-bus control in the PCA9561D,112?
The MUX_SELECT pin determines the source of the MUX_OUT signals: when low, outputs reflect the EEPROM register selected via I²C command byte; when high, outputs mirror the MUX_IN_A–F hardware inputs. Crucially, the I²C interface can override MUX_SELECT-writing a valid EEPROM address forces EEPROM output regardless of MUX_SELECT logic level. This dual-control mechanism ensures both hardware fail-safe and software flexibility. The PCA9561D,112 datasheet confirms this behavior in Table 5 and Section 6.3.
What are the voltage tolerance and supply requirements for the PCA9561D,112?
The PCA9561D,112 operates from a 3.0 V to 3.6 V VDD supply, with Power-On Reset activating above 2.3 V. All digital I/O pins-including SCL, SDA, A0, A1, MUX_IN_X, MUX_SELECT, and MUX_OUT_X-are 5 V and 2.5 V tolerant, meaning they safely accept input voltages up to 5.5 V (or VDD + 4.0 V, whichever is lower). This tolerance eliminates external level shifters when interfacing with mixed-voltage systems. These specifications are confirmed in Tables 10, 13, and 15 of the PCA9561D,112 datasheet.
Can the PCA9561D,112 be used in systems requiring frequent VID updates during operation?
Yes-the PCA9561D,112 supports field-updatable VID settings via its I²C interface without requiring power cycling. Each EEPROM write completes in ≤3.6 ms, after which the device resumes normal addressing. With ≥100,000 guaranteed write cycles and 10-year data retention, it withstands repeated reconfiguration during system validation, thermal tuning, or firmware updates. The WP pin provides hardware-level write protection to prevent accidental changes. This capability is central to the PCA9561D,112's design for SpeedStep and server BMC applications.
What package and pin count does the PCA9561D,112 use, and how is it mounted?
The PCA9561D,112 is supplied in a TSSOP20 package (SOT360-1): 20-pin, plastic thin shrink small outline, 4.4 mm body width, 0.65 mm lead pitch. It is a surface-mount device intended for reflow soldering per JEDEC J-STD-020 guidelines. The package outline and soldering recommendations-including moisture sensitivity level and peak temperature limits-are detailed in Sections 15 and 16 of the PCA9561D,112 datasheet. No through-hole or socket variants exist for this part number.
PCA9561D,112 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Series:
- -
- Package/Case:
- 20-SOIC (0.295", 7.50mm Width)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Applications:
- Network, Telecom
- Interface:
- I2C, SMBus
- Voltage - Supply:
- 3V ~ 3.6V
- Supplier Device Package:
- 20-SO
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
PCA9561D,112 FAQ
1.How can I place an order for PCA9561D,112 through Aetrix?
Please submit a Request for Quotation (RFQ) for PCA9561D,112 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for PCA9561D,112 reliable?
The price and inventory of PCA9561D,112 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PCA9561D,112 is usually 5 days.
3.What payment methods are accepted for PCA9561D,112?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PCA9561D,112 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for PCA9561D,112?
PCA9561D,112 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your PCA9561D,112 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for PCA9561D,112?
For technical support, including PCA9561D,112 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PCA9561D,112 requirements.
6.How does Aetrix verify that PCA9561D,112 is sourced from the original manufacturer or authorized distributors?
All PCA9561D,112 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PCA9561D,112 meets industry standards.
7.What is the process for return or replacement of PCA9561D,112?
All PCA9561D,112 units undergo pre-shipment inspection (PSI). If there is an issue with PCA9561D,112, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The PCA9561D,112 part is unused and in its original packaging.
Return procedure for PCA9561D,112:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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