NXP Semiconductors PCA9561PW,118

Overview

PCA9561PW,118 from NXP Semiconductors is a 20-pin I²C-bus EEPROM-based DIP switch replacement IC used for VID configuration between CPU and VRM. It integrates four 6-bit non-volatile EEPROM registers, six hardware input pins (MUX_IN_A–F), and six open-drain multiplexed outputs (MUX_OUT_A–F), operating at 3.0–3.6 V with 400 kHz I²C-bus support. It enables dynamic voltage tuning in laptop SpeedStep and server power management systems.

For engineers reviewing the PCA9561PW,118 datasheet, PCA9561PW,118 pinout, PCA9561PW,118 application, or PCA9561PW,118 equivalent, this device serves as a programmable, non-volatile VID selector supporting five independent voltage configurations-four EEPROM-based and one hardware-selected-without requiring system power-down or physical jumper changes.

Technical Context

The PCA9561PW,118 implements a 6-bit 5-to-1 multiplexer architecture where MUX_SELECT pin or I²C-bus command selects source: either one of four internal EEPROM registers (each 6-bit) or the six external MUX_IN inputs. Its I²C interface supports standard- and fast-mode (up to 400 kHz), with address pins A0/A1 enabling up to four devices on the same bus.

Non-volatile register writes are controlled by WP pin and require 3.6 ms internal write cycle time; factory defaults are all zeros. Output propagation delays range from 8–43 ns depending on signal path (MUX_IN→MUX_OUT or MUX_SELECT→MUX_OUT), and all I/O pins tolerate 2.5 V/5 V logic levels despite 3.3 V supply.

Key Specifications

Pinout & Package

TSSOP20 package (SOT360-1), 4.4 mm body width, 0.65 mm lead pitch, 1.1 mm max height - surface-mount compatible with standard reflow profiles and high-density PCB layouts.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar VID configuration applications.

Compared with PCA9559PW,118 and PCA9560PW,118, the PCA9561PW,118 delivers expanded non-volatile storage (4× registers), hardware input visibility (MUX_IN readback), and software-controllable multiplexer routing-making it uniquely suited for adaptive, multi-profile power management in modern computing platforms.

Availability

PCA9561PW,118 is available at Aetrix Electronics and suitable for laptop SpeedStep implementation, server BMC-driven voltage tuning, and telecom equipment power calibration requiring stable component supply, long-term EEPROM reliability, and I²C-bus programmability.

Supply support for PCA9561PW,118 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

NXP Semiconductors is a global semiconductor company specializing in secure connectivity solutions for automotive, industrial, and consumer applications, with leadership in I²C-bus interface and power management ICs.

The PCA9561PW,118 belongs to NXP's I²C-bus configurable logic and EEPROM family, designed specifically for replacing mechanical DIP switches in voltage identification and system configuration circuits across computing and infrastructure platforms.

FAQ

What is the primary function of the PCA9561PW,118 in CPU voltage regulation?

The PCA9561PW,118 acts as an I²C-programmable VID selector between the CPU and VRM. It replaces mechanical DIP switches by providing up to five distinct 6-bit voltage ID codes-four stored in non-volatile EEPROM and one sourced from hardware inputs-enabling dynamic, software-controlled CPU voltage adjustments without power cycling. This functionality is central to its use in SpeedStep and server power management.

How does the PCA9561PW,118 handle write protection for its EEPROM registers?

The PCA9561PW,118 uses the WP (Write Protect) pin to control EEPROM write access: when WP is logic 0, I²C-bus writes to non-volatile registers are enabled; when WP is logic 1, writes are blocked-even if valid commands are sent-and only the slave address and command byte receive acknowledgment. This prevents accidental or unauthorized VID changes during system operation.

Can the PCA9561PW,118 operate with 5 V logic signals while powered at 3.3 V?

Yes, the PCA9561PW,118 features 5 V and 2.5 V tolerant inputs and outputs-including SCL, SDA, A0, A1, MUX_IN_X, MUX_SELECT, and MUX_OUT_X-despite its 3.0–3.6 V VDD supply. This allows direct interfacing with legacy 5 V controllers or mixed-voltage systems without external level-shifting circuitry, simplifying design integration.

What is the maximum number of PCA9561PW,118 devices supported on a single I²C bus?

The PCA9561PW,118 has two hardware address pins (A0 and A1), allowing four unique slave addresses (00, 01, 10, 11). Therefore, up to four PCA9561PW,118 devices can coexist on the same I²C-bus or SMBus segment, enabling coordinated VID configuration across multiple voltage domains or processors within a single system.

Does the PCA9561PW,118 support reading back the current state of its hardware input pins?

Yes, the PCA9561PW,118 provides a dedicated MUX_IN register (command code 0xFF) that returns the real-time logic states of all six MUX_IN pins (A–F) via I²C-bus read transaction. This allows the host controller to monitor external hardware configuration status-such as jumper positions or switch states-without additional GPIO resources or discrete sensing components.