NXP Semiconductors PCA9564BS,118
- Part No.:
- PCA9564BS,118
- Manufacturer:
- NXP Semiconductors
- Category:
- Controllers
- Package:
- 20-VQFN Exposed Pad
- Datasheet:
-
PCA9564BS,118.pdf
- Description:
- IC CTRL PARALLEL/I2C BUS 20HVQFN
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
PCA9564BS,118 from NXP Semiconductors (formerly Philips Semiconductors) is a parallel-bus-to-I²C-bus protocol converter IC that enables standard 8-bit parallel microcontrollers (e.g., 80C51-compatible) to interface with I²C-bus peripherals. It operates as both master and slave, supports 2.3–3.6 V supply, features an internal 9 MHz oscillator, and delivers up to 360 kHz master-mode I²C clock rate. It is used in embedded systems requiring low-voltage I²C expansion without external timing components.
For engineers reviewing the PCA9564BS,118 datasheet, PCA9564BS,118 pinout, PCA9564BS,118 application, or PCA9564BS,118 equivalent, this device serves as a drop-in upgrade path from PCF8584 for 2.3–3.6 V systems, provides 5 V-tolerant parallel I/Os, supports interrupt- or polled-mode host control, and implements full I²C arbitration, START/STOP generation, and timeout protection - critical for robust multi-master bus designs.
Technical Context
The PCA9564BS,118 integrates a complete I²C serial interface engine with parallel-bus register mapping, eliminating need for external clock sources via its internal 9 MHz oscillator. It implements all I²C protocol sequences - including arbitration, START/STOP, ACK/NACK, and clock stretching - in hardware, with status-driven interrupt signaling via the INT pin.
It supports four operational modes (Master Transmitter, Master Receiver, Slave Receiver, Slave Transmitter) controlled through five memory-mapped registers (I2CSTA, I2CTO, I2CDAT, I2CADR, I2CCON), selected by A0/A1 address lines. The time-out register (I2CTO) enables configurable SCL-low detection (up to ~12.8 ms), preventing bus lock-up during contention or fault conditions.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage | 2.3 V to 3.6 V - Enables direct integration into modern low-voltage microcontroller systems; 5 V tolerant parallel I/Os allow interfacing with legacy 5 V logic without level shifters. |
| Max I²C Master Clock | 360 kHz - Supports fast-mode I²C communication; higher than PCF8584's 90 kHz, enabling faster peripheral data exchange. |
| Max I²C Slave Clock | 400 kHz - Fully compatible with standard I²C fast-mode slaves; no clock-rate negotiation required when acting as slave. |
| Internal Oscillator | 9 MHz - Eliminates external crystal/capacitor; reduces BOM count and PCB area; startup time ≤ 500 µs after ENSIO enable. |
| I²C Bus Protection | Time-out register with programmable 7-bit counter - Prevents indefinite SCL hold conditions; resets state machine automatically on timeout, improving system reliability. |
| ESD Rating | 2000 V HBM / 200 V MM / 1000 V CDM - Meets industrial-grade robustness requirements for board-level handling and field operation. |
| Latch-up Immunity | >100 mA per JEDEC JESD78 - Ensures resilience against transient overcurrent events on I/O pins. |
Pinout & Package
PCA9564BS,118 is housed in a 20-pin HVQFN package (SOT662-1) with exposed thermal pad. Pin functions are identical across DIP/SO/TSSOP/HVQFN variants per datasheet Figure 1 and PIN DESCRIPTION table. All pins except DNU are electrically active; VSS must be connected to ground, and the exposed pad requires soldering to a thermal PCB pad with vias for proper thermal and electrical performance.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| D0–D7 | Bi-directional parallel data bus | 8-bit interface to host CPU; 3-state outputs; LSB-aligned (D0 = bit 0); supports 50 MHz parallel timing. |
| CE | Chip Enable (active-low) | Enables read/write transfers on D0–D7 only when asserted; places D-bus in high-impedance state when deasserted. |
| WR / RD | Write/Read strobes (active-low) | Edge-triggered control: WR rising edge latches data; RD falling edge initiates read; both require CE = LOW. |
| A0 / A1 | Register address select | Selects one of five internal registers (I2CSTA, I2CTO, I2CDAT, I2CADR, I2CCON) for access via parallel bus. |
| INT | Interrupt request (open-drain) | Active-low signal indicating status change or serial event; requires external pull-up; asserts on SI flag set. |
| RESET | Asynchronous reset (active-low) | Clears all internal registers and resets I²C state machine; does not affect parallel bus state until next access. |
| SCL / SDA | I²C serial clock/data (open-drain) | Standard I²C bidirectional signals; require external pull-ups; support multi-master arbitration and clock stretching. |
| VDD / VSS | Power supply / ground | VDD = 2.3–3.6 V; VSS = reference ground; exposed thermal pad must connect to ground plane for thermal stability. |
Key Features
| Feature | Design Value |
|---|---|
| Integrated I²C protocol engine | Hardware-managed START/STOP, ACK/NACK, arbitration, and clock synchronization - offloads timing-critical firmware tasks from host MCU. |
| Multi-master capability | Full arbitration resolution per I²C specification - enables coexistence with other masters (e.g., sensors, PMICs) on same bus without software coordination. |
| Configurable time-out protection | Programmable 7-bit timeout counter (I2CTO) with enable bit - prevents bus hang during SCL contention or slave failure; auto-resets state machine. |
| 5 V tolerant parallel I/Os | All D0–D7, RD, WR, CE, A0, A1, RESET accept 0–5.5 V inputs - allows seamless interface to 5 V microcontrollers without external level translators. |
| Master/slave dual-role operation | Single device can act as I²C master (initiating transactions) or slave (responding to addresses) - simplifies system architecture in mixed-role applications. |
Applications
| Industrial PLC I/O Expansion | Automotive Body Control Module |
|---|---|
Use Scenario: Adding I²C sensor nodes (temperature, humidity, position) to a legacy 8051-based PLC controller lacking native I²C hardware. IC Role / Device Role / Timing Role: Parallel-to-I²C bridge; translates 8-bit parallel commands into I²C START/STOP/data sequences; manages bus arbitration and timeout recovery autonomously. Use Value: Enables retrofitting of modern I²C sensors without MCU replacement; eliminates need for external oscillator or glue logic; supports 360 kHz data rates for responsive feedback loops. |
Use Scenario: Integrating multiple I²C door-lock actuators, window controllers, and mirror-position sensors into a centralized body control unit using a 3.3 V ARM Cortex-M0+ MCU. IC Role / Device Role / Timing Role: I²C bus extender and protocol accelerator; handles I²C timing, ACK/NACK, and collision detection while freeing MCU cycles for safety-critical tasks. Use Value: Provides 5 V tolerant parallel interface to legacy 5 V CAN transceivers or discrete drivers; ensures bus reliability via programmable timeout and 400 kHz slave compatibility. |
| Medical Patient Monitor Interface | Smart Energy Meter Communication Hub |
Use Scenario: Connecting I²C-based ECG front-end ADCs, SpO₂ sensors, and display drivers to a low-power 8-bit microcontroller in a portable monitor. IC Role / Device Role / Timing Role: Low-voltage I²C gateway; operates from 2.3 V supply to extend battery life; manages interrupt-driven data flow between parallel host and serial peripherals. Use Value: Reduces system power vs. PCF8584 due to lower VDD range; internal oscillator cuts component count; ESD ratings meet IEC 61000-4-2 Level 4 for clinical environments. |
Use Scenario: Aggregating I²C metrology ICs (energy, voltage, current), RTCs, and secure EEPROMs in a DIN-rail energy meter with isolated RS-485 backhaul. IC Role / Device Role / Timing Role: Robust I²C master controller; implements bus monitoring, timeout recovery, and multi-slave addressing under noisy industrial EMI conditions. Use Value: Latch-up immunity >100 mA protects against power-line transients; 400 kHz slave mode supports high-speed calibration data reads; open-drain SCL/SDA ensure noise margin. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar parallel-to-I²C interface applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| PCF8584T | Requires external 3.6864 MHz crystal; 4.5–5.5 V only; max 90 kHz master clock; no internal timeout logic. | Legacy 5 V systems only; lacks low-voltage operation and bus fault recovery; footprint incompatible. | Only suitable if existing 5 V design uses PCF8584 and cannot modify supply or add timeout protection. |
| TCA9564APWR | TI rebranded variant; identical pinout, register map, and electrical specs; same HVQFN-20 package; qualified for automotive AEC-Q100 Grade 2. | Same functional behavior; enhanced temperature range (–40 °C to +105 °C) and qualification for automotive use cases. | Preferred for new automotive designs requiring extended temperature operation and AEC-Q100 compliance. |
Compared with PCF8584T, PCA9564BS,118 enables lower-voltage, higher-speed, and more robust I²C interfacing; compared with TCA9564APWR, it shares core functionality but lacks AEC-Q100 qualification - making PCA9564BS,118 optimal for industrial and medical applications where extended temp rating is not required.
Availability
PCA9564BS,118 is available at Aetrix Electronics and suitable for industrial PLC I/O expansion, automotive body control modules, and medical patient monitor interfaces requiring stable component supply, long-term lifecycle support, and guaranteed traceable sourcing.
Supply support for PCA9564BS,118 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor leader focused on secure connectivity solutions for automotive, industrial, and IoT applications, with deep heritage in I²C and system-bus interface IP.
The PCA9564 product line was developed by Philips Semiconductors (now NXP) to replace the PCF8584 with enhanced low-voltage operation, integrated timing, and improved bus reliability - targeting embedded systems needing cost-effective, robust parallel-to-I²C bridging.
FAQ
What is the primary function of the PCA9564BS,118?
The PCA9564BS,118 is a parallel-bus-to-I²C-bus controller IC that enables 8-bit microcontrollers without native I²C hardware to communicate with I²C peripherals. It operates as both master and slave, handles all I²C protocol details in hardware, and uses an internal oscillator - eliminating external timing components. Its role is to translate parallel read/write operations into compliant I²C transactions.
Does the PCA9564BS,118 require an external crystal or oscillator?
No, the PCA9564BS,118 contains an internal 9 MHz oscillator used for all I²C timing generation. This eliminates the need for external crystals, capacitors, or clock sources. After setting the ENSIO bit, the oscillator requires up to 500 µs to stabilize before I²C operations begin - a key timing parameter for initialization routines in the host firmware.
How does the PCA9564BS,118 handle I²C bus contention or lock-up conditions?
The PCA9564BS,118 implements hardware-based time-out protection via its I2CTO register. When enabled, it monitors SCL low-time and resets the I²C state machine if SCL remains low longer than (I2CTO[6:0] + 1) × 113.7 µs. This prevents permanent bus hang during slave faults or arbitration loss - a critical reliability feature absent in earlier devices like the PCF8584.
Is the PCA9564BS,118 pin-compatible with the PCF8584?
No, the PCA9564BS,118 is not footprint-compatible with the PCF8584. Although functionally similar, it uses different pin assignments (e.g., dedicated INT output, relocated A0/A1), operates at lower voltage (2.3–3.6 V vs. 4.5–5.5 V), and lacks "Snoop" and long-distance modes. Migration requires PCB layout revision and firmware adaptation to the updated register map and timing behavior.
What are the key differences between PCA9564BS,118 and TCA9564APWR?
The PCA9564BS,118 and TCA9564APWR share identical pinout, register structure, electrical specifications, and functional behavior. The main difference is qualification: TCA9564APWR is AEC-Q100 Grade 2 qualified (–40 °C to +105 °C) for automotive use, while PCA9564BS,118 is rated for –40 °C to +85 °C and targets industrial/medical applications. Both are manufactured by NXP and TI respectively under cross-licensed IP.
PCA9564BS,118 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Package/Case:
- 20-VQFN Exposed Pad
- Programmable:
- Not Verified
- Protocol:
- I2C
- Function:
- Controller
- Interface:
- Parallel
- Standards:
- -
- Voltage - Supply:
- 2.3V ~ 3.6V
- Current - Supply:
- 6mA
- Operating Temperature:
- -40°C ~ 85°C
- Supplier Device Package:
- 20-HVQFN (5x5)
- Grade:
- -
- Qualification:
- -
PCA9564BS,118 FAQ
1.How can I place an order for PCA9564BS,118 through Aetrix?
Please submit a Request for Quotation (RFQ) for PCA9564BS,118 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for PCA9564BS,118 reliable?
The price and inventory of PCA9564BS,118 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PCA9564BS,118 is usually 5 days.
3.What payment methods are accepted for PCA9564BS,118?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PCA9564BS,118 transactions.
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4.How is shipping managed for PCA9564BS,118?
PCA9564BS,118 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your PCA9564BS,118 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for PCA9564BS,118?
For technical support, including PCA9564BS,118 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PCA9564BS,118 requirements.
6.How does Aetrix verify that PCA9564BS,118 is sourced from the original manufacturer or authorized distributors?
All PCA9564BS,118 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PCA9564BS,118 meets industry standards.
7.What is the process for return or replacement of PCA9564BS,118?
All PCA9564BS,118 units undergo pre-shipment inspection (PSI). If there is an issue with PCA9564BS,118, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The PCA9564BS,118 part is unused and in its original packaging.
Return procedure for PCA9564BS,118:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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