NXP Semiconductors PCA9672PW,112

Overview

PCA9672PW,112 from NXP Semiconductors is an 8-bit remote I/O expander IC for Fast-mode Plus (Fm+) I²C-bus systems, providing quasi-bidirectional I/O ports with interrupt and hardware reset functionality. It operates from 2.3 V to 5.5 V, supports 1 MHz I²C-bus communication, delivers 25 mA sink per port, and features active LOW open-drain INT and RESET pins - enabling LED driving, keypad monitoring, and microcontroller offload in space-constrained industrial and mobile designs.

For engineers reviewing the PCA9672PW,112 datasheet, PCA9672PW,112 pinout, PCA9672PW,112 application, or PCA9672PW,112 equivalent, this page delivers verified electrical parameters, TSSOP16 package mapping, I²C slave address configuration logic, interrupt behavior timing, and real-world design implications - all grounded in NXP's Rev. 3 (2013) product data sheet.

Technical Context

The PCA9672PW,112 implements a single-register quasi-bidirectional I/O architecture: each of its eight ports (P0–P7) functions as input or output without direction registers, relying on weak 100 µA internal pull-ups and strong n-channel sinks. Its Fast-mode Plus I²C interface sustains 1 MHz operation with 30 mA bus drive capability, eliminating need for external buffers when cascading up to 16 devices (128 total I/Os) on one bus.

Interrupt generation is edge-triggered on any I/O state change relative to the input port register; the active LOW open-drain INT signal resets upon read/write access or return to prior state. Internal Power-On Reset and dedicated RESET pin initialize all ports as inputs with pull-up, while software reset via General Call address 00h + data byte 06h provides bus-level recovery without hardware intervention.

Key Specifications

Pinout & Package

TSSOP16 package (SOT403-1), 4.4 mm body width, 0.65 mm lead pitch, surface-mount, moisture-sensitive level 1 - optimized for compact PCB layouts and automated assembly.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar I/O expander applications.

Compared with PCA9555D,112 and TCA6408APWR, the PCA9672PW,112 uniquely combines 1 MHz Fm+ speed, hardware RESET, edge-triggered INT, software reset, and device ID in a TSSOP16 package - making it optimal for responsive, maintainable, and compact I/O expansion where robustness and debuggability matter.

Availability

PCA9672PW,112 is available at Aetrix Electronics and suitable for industrial control, medical instrumentation, and server management applications requiring stable component supply, long-term lifecycle support, and RoHS-compliant packaging.

Supply support for PCA9672PW,112 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

NXP Semiconductors is a global semiconductor leader specializing in secure connectivity solutions for automotive, industrial, and IoT markets, with deep expertise in I²C peripherals and mixed-signal interface ICs.

The PCA9672PW,112 belongs to NXP's remote I/O expander product line, designed specifically to reduce MCU GPIO burden in resource-constrained embedded systems while delivering industrial-grade reliability, interrupt-driven responsiveness, and seamless I²C bus scalability.

FAQ

What is the maximum I²C clock frequency supported by the PCA9672PW,112?

The PCA9672PW,112 supports Fast-mode Plus (Fm+) I²C operation up to 1 MHz - double the speed of standard Fast-mode I²C. This enables faster LED PWM updates and reduced I/O polling latency. The 30 mA I²C bus drive capability ensures signal integrity across longer traces or with multiple devices on the same bus without requiring external bus buffers.

How does the quasi-bidirectional I/O architecture of the PCA9672PW,112 differ from standard totem-pole I/O?

Unlike totem-pole I/O requiring separate direction registers, the PCA9672PW,112 uses quasi-bidirectional ports with internal 100 µA pull-ups and strong n-channel sinks. Writing '1' configures the port as input (with pull-up), writing '0' activates the sink for output LOW. This eliminates direction register overhead and simplifies firmware - especially valuable in memory-constrained microcontrollers interfacing with the PCA9672PW,112.

Can the PCA9672PW,112 directly drive standard 20 mA LEDs?

Yes - each of the eight I/O ports on the PCA9672PW,112 provides 25 mA sink current, exceeding the 20 mA requirement of most indicator LEDs. When configured as outputs, ports can drive LEDs connected between VDD and the port pin using only a series current-limiting resistor. No external transistors or driver ICs are needed, reducing component count and PCB area in LED signage and status panel designs.

What happens to the PCA9672PW,112 I/O states during power-up or hardware reset?

Upon power-on or assertion of the active LOW RESET pin, the PCA9672PW,112 initializes all eight I/O ports as inputs with weak 100 µA internal pull-ups to VDD. This default safe state prevents bus contention or unintended output activation. The INT pin remains HIGH (inactive) until an I/O state change occurs relative to the input port register - ensuring predictable startup behavior in systems using the PCA9672PW,112.

How is the interrupt output (INT) of the PCA9672PW,112 triggered and cleared?

The PCA9672PW,112 generates an active LOW interrupt on the INT pin whenever any input port state differs from its corresponding input port register value - detecting both rising and falling edges. The interrupt is automatically cleared (returns HIGH) upon reading the input port register or writing to any port, or when the port state reverts to its previously latched value. This edge-triggered, self-clearing behavior minimizes MCU polling and supports efficient event-driven firmware.