NXP Semiconductors PCA9673BS,118
- Part No.:
- PCA9673BS,118
- Manufacturer:
- NXP Semiconductors
- Category:
- I/O Expanders
- Package:
- 24-VFQFN Exposed Pad
- Datasheet:
-
PCA9673BS,118.pdf
- Description:
- IC XPNDR 1MHZ I2C 24HVQFN
- Quantity:
- Payment:

- Shipping:

Inventory:1,141
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
PCA9673BS,118 from NXP Semiconductors is a 16-bit remote I/O expander with Fast-mode Plus (Fm+) I²C-bus interface (1 MHz), active-low open-drain interrupt (INT), hardware RESET input, and 25 mA per-pin sink capability for direct LED driving. It operates from 2.3 V to 5.5 V with 5.5 V tolerant I/Os and supports 16 programmable slave addresses via AD0/AD1 pins.
For engineers reviewing the PCA9673BS,118 datasheet, PCA9673BS,118 pinout, PCA9673BS,118 application, or PCA9673BS,118 equivalent, key selection considerations include its 400 mA total package sink capacity, quasi-bidirectional port architecture, Power-On Reset (POR) and software reset support, and HVQFN24 thermal-enhanced packaging for space-constrained industrial and embedded designs.
Technical Context
The PCA9673BS,118 implements a 16-bit quasi-bidirectional I/O port (P00–P07 and P10–P17), where each pin defaults to HIGH at power-up and functions as either input or output without direction control signals. Its Fm+ I²C interface supports 1 MHz operation with 30 mA SDA sink drive, enabling robust bus loading up to 4000 pF without buffers.
Interrupt generation is edge-triggered on any I/O state change, latched until cleared by read/write access or hardware RESET. The device integrates internal POR, external active-low RESET pin (pin 24 in HVQFN24), and software reset via General Call address (00h) + data byte 06h - all initializing I/Os to high-impedance inputs.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| I²C Bus Speed | 1 MHz Fast-mode Plus (Fm+) - enables real-time LED PWM dimming and faster host polling vs. legacy 400 kHz expanders. |
| Supply Voltage Range | 2.3 V to 5.5 V - interoperable with 3.3 V and 5 V microcontrollers; I/Os tolerate up to 5.5 V regardless of VDD. |
| Port Sink Current | 25 mA per pin - sufficient for direct driving of standard LEDs without external drivers. |
| Total Package Sink | 400 mA - allows simultaneous activation of all 16 outputs at 25 mA each, supporting dense LED arrays. |
| Slave Addresses | 16 programmable addresses (via AD0/AD1) - reduces I²C address conflicts in multi-device systems like server backplanes. |
| Interrupt Output | Active-low open-drain INT - connects directly to MCU interrupt pins; asserts on any rising/falling edge at I/O ports. |
| Reset Mechanism | Dual reset: hardware RESET pin (active-low, min. tw(rst)) and software reset via I²C General Call (00h) + 06h - ensures deterministic recovery without power cycle. |
Pinout & Package
HVQFN24 package (SOT616-1): 4 mm × 4 mm × 0.85 mm body, 24-terminal no-lead thermal-enhanced quad flat package with exposed thermal pad requiring PCB soldering for optimal thermal performance.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1–8, 10–17 | P00–P07, P10–P17 | 16 quasi-bidirectional I/Os - default HIGH at power-up; sink up to 25 mA each; latch outputs for stable LED control. |
| 9 | VSS | Supply ground - must be connected; die ground also tied to exposed thermal pad for electrical integrity. |
| 18 | AD0 | Address input 0 - selects 1 of 16 I²C slave addresses; no internal pull-up; requires external bias. |
| 19 | SCL | I²C serial clock input - accepts 1 MHz Fm+ timing; Schmitt-triggered for noise immunity. |
| 20 | SDA | I²C bidirectional data line - 30 mA sink capability supports heavy bus capacitance (up to 4000 pF). |
| 21 | VDD | Supply voltage input - powers logic and I/O; range 2.3 V–5.5 V; decoupling capacitor required near pin. |
| 22 | INT | Active-low open-drain interrupt - signals I/O state changes to host MCU without polling; requires external pull-up. |
| 23 | AD1 | Address input 1 - pairs with AD0 for full 16-address selection; no internal pull-up. |
| 24 | RESET | Active-low hardware reset - forces I/Os and registers to power-up state; replaces PCF8575's A2 pin. |
Key Features
| Feature | Design Value |
|---|---|
| 1 MHz Fast-mode Plus I²C | Enables high-speed LED dimming control and reduces host polling latency in real-time systems. |
| 25 mA per-pin sink + 400 mA total | Eliminates need for external MOSFET drivers in LED signage and indicator applications. |
| Active-low open-drain INT | Reduces MCU wake-up overhead by signaling port changes asynchronously - critical for low-power embedded nodes. |
| 16 programmable I²C addresses | Supports up to 16 PCA9673BS,118 devices on one bus - ideal for modular PLC I/O expansion. |
| Hardware RESET + software reset | Provides dual-recovery paths: immediate hardware reset for fault recovery and non-intrusive I²C-based reset during firmware updates. |
| Readable Device ID | Manufacturer (NXP), part ID (PCA9673), and revision bits accessible via reserved I²C address - enables automated BOM validation and field diagnostics. |
Applications
| LED Signage & Displays | Servers & Data Centers |
|---|---|
|
Use Scenario: Driving 16-channel LED matrix panels in outdoor digital signage with brightness control. IC Role / Device Role / Timing Role: Remote I/O expander providing parallel GPIO extension over compact I²C bus; handles PWM dimming timing via host-synchronized writes. Use Value: 25 mA per channel and 400 mA total sink capacity enable direct LED drive without discrete transistors, reducing BOM count and board area. |
Use Scenario: Monitoring and controlling hot-swap power modules, fan speed, and status LEDs in 1U rack servers. IC Role / Device Role / Timing Role: System management I/O hub interfacing with baseboard management controller (BMC) via I²C; INT pin alerts BMC to PSU fault events. Use Value: 1 MHz I²C speed and 16 configurable addresses allow dense integration across multiple server blades without bus contention. |
| Industrial PLCs | Medical Equipment Panels |
|
Use Scenario: Adding isolated digital input/output points to compact programmable logic controllers for factory automation. IC Role / Device Role / Timing Role: Distributed I/O node converting I²C commands into 16-bit parallel control signals for solenoids, relays, and sensors. Use Value: Hardware RESET and Power-On Reset ensure deterministic startup after brownouts; ESD rating (>2000 V HBM) meets industrial immunity requirements. |
Use Scenario: Managing front-panel buttons, status indicators, and alarm LEDs in portable diagnostic devices. IC Role / Device Role / Timing Role: Low-power I/O extender interfacing with ARM Cortex-M host MCU; INT pin wakes MCU only on user interaction. Use Value: 2.3 V minimum supply enables operation from single-cell Li-ion batteries; HVQFN24 footprint saves space in handheld enclosures. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar remote I/O expander applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| PCA9672BS,118 | Lacks RESET pin; uses A2 address pin instead; 400 kHz max I²C speed; 100 mA total sink. | Not suitable for systems requiring hardware reset or >400 kHz update rates; lower drive limits LED count per device. | Select PCA9673BS,118 when hardware RESET, 1 MHz bus speed, or >100 mA aggregate load is required. |
| TCA6408APWR | TI device; 8-bit I/O; 1 MHz I²C; 25 mA per pin; no hardware RESET; 2.3–5.5 V; TSSOP-16 package. | Half the I/O count; no RESET or Device ID; smaller footprint but no thermal pad - limited to lower ambient temperatures. | Choose PCA9673BS,118 for 16-bit expansion, thermal reliability in enclosed enclosures, or RESET-critical systems. |
Compared with PCA9672BS,118 and TCA6408APWR, the PCA9673BS,118 uniquely combines 16-bit I/O, hardware RESET, 1 MHz Fm+, and 400 mA sink in an HVQFN24 package - making it the only option meeting concurrent requirements for high-density LED control, industrial reset robustness, and thermal-constrained layouts.
Availability
PCA9673BS,118 is available at Aetrix Electronics and suitable for LED signage, industrial PLCs, and medical equipment requiring stable component supply, long-term lifecycle assurance, and RoHS-compliant sourcing.
Supply support for PCA9673BS,118 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor leader specializing in secure connectivity solutions for automotive, industrial, and IoT applications, with core expertise in interface, power management, and microcontroller technologies.
The PCA9673BS,118 belongs to NXP's Fast-mode Plus I²C I/O expander product line, designed specifically for high-speed, high-drive remote GPIO expansion in space- and reliability-constrained embedded systems.
FAQ
What is the function of the RESET pin on the PCA9673BS,118?
The RESET pin on the PCA9673BS,118 is an active-low hardware reset input that forces all I/Os and internal registers to their power-up default state (quasi-bidirectional inputs) when held LOW for ≥tw(rst). This provides deterministic recovery independent of I²C bus health - a key distinction from the PCF8575, which lacks this pin. The PCA9673BS,118 uses RESET in place of the A2 address pin found on legacy expanders.
Can the PCA9673BS,118 drive LEDs directly without external transistors?
Yes, the PCA9673BS,118 can drive standard LEDs directly: each of its 16 I/O pins supports 25 mA sink current, and the total package sink capacity is 400 mA. This allows simultaneous activation of all outputs at rated current - sufficient for indicator LEDs, 7-segment displays, or low-power LED matrices. The PCA9673BS,118's quasi-bidirectional architecture latches output states, ensuring stable illumination without continuous host refresh.
How does the interrupt (INT) pin on the PCA9673BS,118 operate?
The INT pin on the PCA9673BS,118 is an active-low open-drain output that asserts whenever any of the 16 I/O pins transitions (rising or falling edge). It remains asserted until cleared by reading the port register, writing to the port, or applying hardware RESET. This asynchronous notification eliminates the need for periodic I²C polling - reducing host MCU overhead and power consumption. The PCA9673BS,118's INT behavior is fully documented in Section 8.5 of its datasheet.
What package type is used for the PCA9673BS,118 and why does it matter?
The PCA9673BS,118 uses the HVQFN24 package (SOT616-1): a 4 mm × 4 mm × 0.85 mm thermal-enhanced quad flat no-lead package with an exposed center pad. This package delivers superior thermal dissipation versus SO24 or TSSOP24 - critical when sinking up to 400 mA total current. The exposed pad must be soldered to a PCB thermal pad with vias for reliable operation in industrial or high-ambient environments. This distinguishes the PCA9673BS,118 from pin-compatible variants like PCA9673D (SO24).
Does the PCA9673BS,118 support software reset, and how is it triggered?
Yes, the PCA9673BS,118 supports software reset via I²C General Call address (00h) followed by data byte 06h. Upon receiving this exact sequence, the device resets all registers and I/Os to power-up defaults without requiring hardware RESET assertion. This enables remote recovery during firmware updates or bus error conditions. The PCA9673BS,118 only acknowledges the 06h byte - any other value aborts the sequence. Full timing and protocol details are specified in Section 7.2.1 of the datasheet.
PCA9673BS,118 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Series:
- -
- Package/Case:
- 24-VFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Number of I/O:
- 16
- Interface:
- I2C
- Interrupt Output:
- Yes
- Features:
- POR
- Output Type:
- Push-Pull
- Current - Output Source/Sink:
- 100µA, 25mA
- Clock Frequency:
- 1 MHz
- Voltage - Supply:
- 2.3V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 24-HVQFN (4x4)
PCA9673BS,118 FAQ
1.How can I place an order for PCA9673BS,118 through Aetrix?
Please submit a Request for Quotation (RFQ) for PCA9673BS,118 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for PCA9673BS,118 reliable?
The price and inventory of PCA9673BS,118 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PCA9673BS,118 is usually 5 days.
3.What payment methods are accepted for PCA9673BS,118?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PCA9673BS,118 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for PCA9673BS,118?
PCA9673BS,118 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your PCA9673BS,118 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for PCA9673BS,118?
For technical support, including PCA9673BS,118 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PCA9673BS,118 requirements.
6.How does Aetrix verify that PCA9673BS,118 is sourced from the original manufacturer or authorized distributors?
All PCA9673BS,118 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PCA9673BS,118 meets industry standards.
7.What is the process for return or replacement of PCA9673BS,118?
All PCA9673BS,118 units undergo pre-shipment inspection (PSI). If there is an issue with PCA9673BS,118, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The PCA9673BS,118 part is unused and in its original packaging.
Return procedure for PCA9673BS,118:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
PCA9673BS,118 Tags

-
TCA6408ARSVR
Texas Instruments
-
TCA9535RTWR
Texas Instruments

-
FXL6408UMX
onsemi

-
PCF8574ADWR
Texas Instruments

-
PCF8574APWR
Texas Instruments

-
TCA9555PWR
Texas Instruments
-
TCA9554PWR
Texas Instruments
-
TCA9554APWR
Texas Instruments

-
TCA9539PWR
Texas Instruments
-
TCA9534PWR
Texas Instruments
-
TCA9555RTWR
Texas Instruments

-
TCA9535PWR
Texas Instruments
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

