NXP Semiconductors PCF2113AU/10/F4,00
- Part No.:
- PCF2113AU/10/F4,00
- Manufacturer:
- NXP Semiconductors
- Category:
- Display Drivers
- Package:
- Die
- Datasheet:
-
PCF2113AU/10/F4,00.pdf
- Description:
- IC DRVR CTRLR MATRIX DIE
- Quantity:
- Payment:

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Product details
Overview
PCF2113AU/10/F4,00 from NXP Semiconductors is a low-power CMOS LCD controller/driver IC designed to drive 2-line × 12-character or 1-line × 24-character dot-matrix LCDs with 5×8 dot format. It integrates on-chip LCD bias voltage generation (VLCD), temperature-compensated VLCD regulation (−0.16 %/K to −0.24 %/K), and dual interface support (4-/8-bit parallel or I²C-bus). It operates from 1.8 V to 5.5 V logic supply and supports icon-only mode for <25 µA current consumption - used in portable telecom terminals and point-of-sale displays.
For engineers reviewing the PCF2113AU/10/F4,00 datasheet, PCF2113AU/10/F4,00 pinout, PCF2113AU/10/F4,00 application, or PCF2113AU/10/F4,00 equivalent, key selection criteria include its 18-row/60-column driver capability, integrated 5-level bias generator, 80-byte DDRAM, 240-character CGROM + 16-character CGRAM, and direct-mode VLCD control for ultra-low power icon display.
Technical Context
The PCF2113AU/10/F4,00 implements a fully integrated LCD timing architecture with automatic multiplex rate switching (1:18 for 2-line, 1:9 for 1-line, 1:2 for icon-only mode) and programmable VLCD via 6-bit VA/VB registers. Its internal oscillator requires no external components, and the VLCD generator operates independently of VDD1, supporting external VLCD injection via VLCDIN/VLCDOUT.
It features dual register access (Instruction Register and Data Register), busy flag output on DB7, and synchronous power-on reset requiring three oscillator cycles. The address counter auto-increments during DDRAM/CGRAM read/write, and display shift wrap-around is handled per-line for 2-line operation (00h–27h and 40h–67h address ranges).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Display Support | 2-line × 12-char or 1-line × 24-char with 5×8 dot matrix; up to 120 icons driven via R17/R18 rows |
| Driver Outputs | 18 row outputs (R1–R18) and 60 column outputs (C1–C60); R17/R18 dedicated to icon rows |
| Memory Resources | 80-byte Display Data RAM (DDRAM); 240-character × 5×8 CGROM; 16-character × 5×8 CGRAM (3–6 chars reserved for icons) |
| Power Consumption | Icon mode: <25 µA; Power-down mode: <2 µA; Normal operation: 20–200 µA depending on MUX and display content |
| Voltage Ranges | VDD1 = 1.8–5.5 V; VLCD generator input VDD2 = 2.2–4.0 V; VLCD output range = 2.2–6.5 V |
| Interface Options | 4-bit or 8-bit parallel bus (DB0–DB7, RS, R/W, E) or 2-wire I²C-bus (SCL/SDA); SA0 pin enables I²C address selection |
| Multiplex Rates | Programmable: 1:18 (2-line), 1:9 (1-line), 1:2 (icon-only); bias levels auto-configured per Table 6 |
Pinout & Package
PCF2113AU/10/F4,00 is supplied in chip-on-flexible-film-carrier (COF) packaging - a bare die mounted on flexible polyimide substrate with gold bump bonding pads. It has no leadframe or molded body; pad layout matches the LQFP100 footprint but uses 112 bonding pads (including dummies) arranged in a 3.52 mm × 3.36 mm die area.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD1 (Pad 1) | Logic supply input | Primary power for core logic, oscillator, and interface; 1.8–5.5 V range; must connect OSC to VDD1 when using internal oscillator |
| VLCDIN/VLCDOUT/VLCDSENSE (Pads 9–11) | On-chip VLCD generator interface | Internally connected for self-regulated VLCD; VLCDSENSE enables closed-loop temperature compensation; external VLCD may be injected at VLCDIN |
| R1–R18 (Pads 12–20, 95, 87–94) | LCD row driver outputs | R1–R16 and R18 drive main display segments; R17 drives top icon row; all outputs support 1:18/1:9/1:2 multiplexing |
| C1–C60 (Pads 21–86, 109–112, 58–82, 31–55) | LCD column driver outputs | 60 independent column drivers; C1–C60 mapped across four sides of die; unused columns left unconnected |
| SCL/SDA (Pads 96/97) | I²C-bus interface | Standard 2-wire serial interface; SDA is bidirectional open-drain; both pins must tie to VSS1 or VDD1 when using parallel mode |
| DB0–DB7/SA0 (Pads 101–108, 105) | Parallel data bus + I²C address | 8-bit bidirectional data port; DB3 doubles as SA0 for I²C slave address (0x27 or 0x26); DB7 serves as busy flag in read mode |
Key Features
| Feature | Design Value |
|---|---|
| Integrated VLCD generator | Configurable 2/3/4-stage voltage multiplier with programmable 6-bit VA/VB registers; generates 1.90–6.86 V at 27 °C with −0.16 to −0.24 %/K tempco |
| Icon-optimized low-power mode | Reduces VLCD and switching frequency for icon-only display; cuts current to <25 µA while maintaining full 120-icon visibility |
| Dual interface flexibility | Hardware-selectable 4-/8-bit parallel or I²C-bus operation; no external level shifters needed; SA0 pin sets I²C address without pull-ups |
| Auto-bias configuration | On-chip 5-level (1:18/1:9) or 4-level (1:2) LCD bias generation eliminates external resistor networks and reduces system current |
| Direct mode VLCD control | DM bit disables VLCD generator and connects VLCDOUT directly to VDD2 - enables lowest possible current in icon/MUX 1:9 operation |
Applications
| Telecom Handsets | Point-of-Sale Terminals |
|---|---|
Use Scenario: Compact, battery-powered handheld devices requiring alphanumeric status and signal indicators with minimal standby drain. IC Role / Device Role / Timing Role: Primary LCD controller driving 2×12 character display with embedded icons for battery, signal strength, and network mode. Use Value: <25 µA icon-only mode extends battery life; integrated VLCD generator eliminates 3–5 external bias resistors and saves PCB space. |
Use Scenario: Retail payment terminals needing reliable, low-cost alphanumeric display with customer-facing status and transaction prompts. IC Role / Device Role / Timing Role: Standalone display controller interfacing to microcontroller via I²C, managing DDRAM updates and cursor positioning for real-time receipt preview. Use Value: 80-byte DDRAM supports full line buffering; built-in CGROM includes ISO-8859-1 Latin-1 and kana characters for multilingual UI support. |
| Portable Test Instruments | Industrial Control Panels |
Use Scenario: Handheld multimeters and oscilloscopes where display readability and ultra-low sleep current are critical. IC Role / Device Role / Timing Role: LCD driver handling segmented numeric digits and status symbols; uses R17/R18 for battery and measurement mode icons. Use Value: Power-down mode (<2 µA) enables instant wake-up from deep sleep; temperature-compensated VLCD ensures stable contrast across −20 °C to +70 °C operating range. |
Use Scenario: Factory HMIs requiring rugged, low-maintenance alphanumeric displays for machine status and fault codes. IC Role / Device Role / Timing Role: Controller managing static text labels and dynamic parameter values on 1×24 character display using parallel 4-bit interface. Use Value: Direct mode VLCD control allows use of single 3.3 V rail for both logic and LCD supply - simplifies power design and reduces BOM count. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar LCD controller/driver applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| PCF2113DH/4 | LQFP100 package with 100 leads; identical die, full pin access; requires PCB land pattern and reflow soldering | Used in fixed-mount industrial panels where COF assembly is impractical; supports same DDRAM, CGROM, and VLCD features | Select when board-level assembly and mechanical robustness outweigh flex-circuit integration needs. |
| ST7066U | 4-bit/8-bit parallel only (no I²C); 16×2 DDRAM; no icon-row drivers or VLCD temperature compensation; 2.7–5.5 V VDD | Cost-sensitive consumer displays with basic 2×16 character requirements; lacks icon optimization and ultra-low-power modes | Choose only for legacy designs where I²C is unused and <25 µA icon mode is unnecessary. |
Compared with PCF2113DH/4, the PCF2113AU/10/F4,00 offers identical functionality in a space-constrained COF form factor ideal for compact handhelds; versus ST7066U, it delivers superior power efficiency, integrated bias generation, and dual-interface flexibility - critical for battery-operated and multi-language applications.
Availability
PCF2113AU/10/F4,00 is available at Aetrix Electronics and suitable for telecom handsets, point-of-sale terminals, and portable test instruments requiring stable component supply, long-term lifecycle support, and consistent COF packaging for flex-circuit integration.
Supply support for PCF2113AU/10/F4,00 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor company headquartered in Eindhoven, Netherlands, specializing in secure connectivity solutions for automotive, industrial, and IoT applications.
The PCF2113x family was designed specifically for ultra-low-power alphanumeric LCD display control in portable and battery-constrained systems - emphasizing integrated bias generation, multiple interface options, and sub-25 µA icon operation.
FAQ
What display configurations does the PCF2113AU/10/F4,00 support?
The PCF2113AU/10/F4,00 supports two primary display modes: 2-line × 12-character (1:18 multiplex) and 1-line × 24-character (1:9 multiplex), both using 5×8 dot format. It also enables icon-only mode (1:2 multiplex) driving up to 120 icons via dedicated R17/R18 rows. All modes use the same 80-byte DDRAM and share the 240-character CGROM.
How does the PCF2113AU/10/F4,00 achieve ultra-low power in icon mode?
The PCF2113AU/10/F4,00 achieves <25 µA in icon mode by reducing the VLCD output voltage and lowering the LCD output switching frequency. It activates only R17 and R18 row drivers while disabling others, and uses direct mode (DM bit) to bypass the VLCD generator - connecting VLCDOUT directly to VDD2 for minimal overhead.
Can the PCF2113AU/10/F4,00 operate with a single 3.3 V supply?
Yes - the PCF2113AU/10/F4,00 supports VDD1 = 3.3 V for logic and interface, and can use the same 3.3 V rail for VDD2/VLCD via direct mode. In this configuration, VLCDOUT is tied directly to VDD2, eliminating the need for separate bias generation while maintaining full display functionality for icon and 1-line modes.
What is the role of the SA0 pin on the PCF2113AU/10/F4,00?
On the PCF2113AU/10/F4,00, the SA0 pin (bonding pad 105, shared with DB3) sets the LSB of the I²C slave address. When SA0 = LOW, the address is 0x26; when SA0 = HIGH, it is 0x27. This enables two PCF2113AU/10/F4,00 devices on the same I²C bus without address conflict - essential for multi-display systems.
Does the PCF2113AU/10/F4,00 require external components for oscillator operation?
No - the PCF2113AU/10/F4,00 includes an on-chip oscillator requiring no external capacitors or crystals. When enabled, the OSC pin (pad 2) must be connected directly to VDD1. An external clock (100 kHz–1 MHz) may be applied to OSC instead, but stopping the clock is only permitted in power-down mode to avoid DC bias damage to the LCD.
PCF2113AU/10/F4,00 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Series:
- -
- Package/Case:
- Die
- Packaging:
- Bulk
- Product Status:
- Obsolete
- Display Type:
- LCD
- Configuration:
- 5 x 8 (Matrix)
- Interface:
- I2C
- Digits or Characters:
- -
- Current - Supply:
- -
- Voltage - Supply:
- 2.2V ~ 4V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- Die
PCF2113AU/10/F4,00 FAQ
1.How can I place an order for PCF2113AU/10/F4,00 through Aetrix?
Please submit a Request for Quotation (RFQ) for PCF2113AU/10/F4,00 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for PCF2113AU/10/F4,00 reliable?
The price and inventory of PCF2113AU/10/F4,00 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PCF2113AU/10/F4,00 is usually 5 days.
3.What payment methods are accepted for PCF2113AU/10/F4,00?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PCF2113AU/10/F4,00 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for PCF2113AU/10/F4,00?
PCF2113AU/10/F4,00 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your PCF2113AU/10/F4,00 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for PCF2113AU/10/F4,00?
For technical support, including PCF2113AU/10/F4,00 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PCF2113AU/10/F4,00 requirements.
6.How does Aetrix verify that PCF2113AU/10/F4,00 is sourced from the original manufacturer or authorized distributors?
All PCF2113AU/10/F4,00 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PCF2113AU/10/F4,00 meets industry standards.
7.What is the process for return or replacement of PCF2113AU/10/F4,00?
All PCF2113AU/10/F4,00 units undergo pre-shipment inspection (PSI). If there is an issue with PCF2113AU/10/F4,00, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The PCF2113AU/10/F4,00 part is unused and in its original packaging.
Return procedure for PCF2113AU/10/F4,00:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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