NXP Semiconductors PCF85132U/2DA/1,02
- Part No.:
- PCF85132U/2DA/1,02
- Manufacturer:
- NXP Semiconductors
- Category:
- Display Drivers
- Package:
- Die
- Datasheet:
-
PCF85132U/2DA/1,02.pdf
- Description:
- IC DRVR MULTIPLE DIE
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
PCF85132U/2DA/1,02 from NXP Semiconductors is an I²C-compatible LCD controller and driver IC for static or low-multiplex-rate LCDs with up to 4 backplanes and 160 segments (640 total elements), supporting 1:2/1:3/1:4 multiplexing and 1/2 or 1/3 bias configuration. It integrates internal LCD bias generation, 160 × 4-bit display RAM, and factory-calibrated frame frequency control (60–90 Hz in 5 Hz steps), enabling direct drive of alphanumeric or graphical LCDs in industrial instrumentation and automotive displays.
For engineers reviewing the PCF85132U/2DA/1,02 datasheet, PCF85132U/2DA/1,02 pinout, PCF85132U/2DA/1,02 application, or PCF85132U/2DA/1,02 equivalent, this page delivers verified technical context, validated pin functions, confirmed drive capability limits, real-world application mappings, and two rigorously cross-checked alternative part options for LCD segment driving systems requiring stable bias generation and I²C-controlled display memory.
Technical Context
The PCF85132U/2DA/1,02 implements a fully integrated LCD timing engine with selectable internal oscillator (calibrated ±3.9% at 5.0 V/30 °C) or external clock input via OSC pin, generating frame frequencies from 60 Hz to 90 Hz using fixed 1/24 division of the internal clock (fclk(int)). Its dual-bank RAM architecture enables hardware-assisted blinking modes-including full-display blink and alternate-RAM-bank blink-without host CPU intervention in static or 1:2 multiplex modes.
It supports four distinct LCD drive configurations: static (1 BP), 1:2 (2 BP), 1:3 (3 BP), and 1:4 (4 BP), each with programmable bias (1/2 or 1/3) and corresponding RMS voltage ratios (e.g., D = 1.732 for 1:4/1/3). Backplane outputs BP0–BP3 are duplicated across both die edges to support Chip-on-Glass (COG) routing flexibility and enhanced current drive via parallel pin bonding.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Display capacity | Up to 640 LCD elements (4 backplanes × 160 segments); supports 80×7-seg digits or 40×14-seg alphanumerics |
| I²C interface speed | 400 kHz maximum; supports standard-mode I²C-bus with auto-incremental addressing across subaddress boundaries |
| Frame frequency range | 60–90 Hz in 5 Hz steps; factory-calibrated internal oscillator eliminates need for external crystal |
| LCD supply voltage (VLCD) | 1.8 V to 8.0 V; accommodates low-threshold, guest-host, and high-threshold twisted nematic LCDs |
| Logic supply range (VDD) | 1.8 V to 5.5 V; allows independent bias and logic rail optimization |
| Power consumption | Typical IDD = 4 µA (logic), IDD(LCD) = 30 µA (bias circuitry); ultra-low standby current for battery-powered devices |
| Display RAM | 160 × 4-bit static RAM with auto-incremental data loading and hardware subaddressing |
Pinout & Package
Bare die package: 197 bumps, 6.5 mm × 1.16 mm × 0.40 mm; designed for Chip-on-Glass (COG) mounting with dual-edge bump layout for flexible PCB or flex-circuit interconnect.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| SDA / SDAACK (pins 1–6) | I²C serial data bidirectional channel | SDA pins accept input; SDAACK pins output acknowledge pulse - typically shorted per application note for simplified bus termination |
| SCL (pins 7–9) | I²C serial clock input | Accepts 400 kHz clock; synchronizes all register writes, command execution, and RAM access |
| VDD (pins 11–13), VSS (pins 24–26) | Logic power supply rails | Support 1.8–5.5 V operation; substrate tied to VSS and must be electrically isolated in COG assembly |
| VLCD (pins 27–29) | LCD panel supply input | Independent 1.8–8.0 V rail; powers internal bias generator and segment/backplane drivers |
| BP0–BP3 (pins 30–31, 112–115, 196–197) | LCD backplane drive outputs | Duplicated across top/bottom die edges; configurable for 1:2/1:3/1:4 multiplex; parallel bonding increases current drive |
| S0–S159 (pins 32–111, 116–195) | LCD segment drive outputs | 160 dedicated outputs; open-circuit unused pins; no external components required for direct LCD connection |
| OSC (pin 15), CLK (pin 10) | Clock source selection and output | OSC = VSS selects internal oscillator (CLK becomes output); OSC = VDD enables external clock (CLK becomes input) |
| SYNC (pin 14) | Cascade synchronization I/O | Enables daisy-chaining multiple PCF85132U/2DA/1,02 units for >640-element displays; drives CLK of next device |
Key Features
| Feature | Design Value |
|---|---|
| Integrated LCD bias generator | Eliminates external resistor networks or charge pumps; provides precise 1/2 or 1/3 bias ratios via internal voltage divider |
| Cascadable architecture | SYNC pin and CLK forwarding enable up to 5120-element displays using eight PCF85132U/2DA/1,02 units without additional glue logic |
| Hardware blink control | Three blink frequencies (off, 1, 2, 3) plus alternate-RAM-bank mode - implemented entirely in silicon, zero host overhead |
| COG-optimized pin layout | Backplane and segment outputs duplicated on both die edges; supports symmetric flex-circuit routing and reduced trace inductance |
| Subaddressing & bank select | Four hardware subaddresses (A0/A1) and dual RAM banks (I/O selection) simplify memory mapping for segmented display layouts |
Applications
| Industrial Panel Meters | Automotive Instrument Clusters |
|---|---|
|
Use Scenario: Digital panel meters in factory automation systems displaying real-time process variables (temperature, pressure, flow). IC Role / Device Role / Timing Role: Primary LCD controller/driver; manages 4-backplane 14-segment alphanumeric display with 75 Hz frame rate and synchronized blink for alarm indication. Use Value: Internal bias generation and wide VLCD range (up to 8.0 V) ensure reliable contrast across temperature extremes (-40 °C to +85 °C) without external components. |
Use Scenario: Driver information display (DID) in entry-level vehicles showing speed, fuel level, and warning icons. IC Role / Device Role / Timing Role: Segment driver for 1:4 multiplexed monochrome LCD; uses BP0–BP3 and S0–S159 to drive 640-element graphic display with factory-calibrated 90 Hz refresh. Use Value: Dual-edge backplane outputs allow robust COG bonding to curved instrument cluster glass; low 4 µA logic current extends battery backup runtime. |
| Medical Diagnostic Devices | Smart Energy Meters |
|
Use Scenario: Portable blood glucose monitors and handheld ECG readers with compact alphanumeric LCDs. IC Role / Device Role / Timing Role: Static or 1:2 multiplex LCD driver; leverages 160 × 4-bit RAM and auto-incremental addressing for rapid screen updates during measurement cycles. Use Value: 1.8 V minimum VDD enables direct connection to single-cell Li-ion or alkaline supplies; integrated blink avoids MCU timer resource usage. |
Use Scenario: DIN-rail mounted electricity meters with multi-line LCD showing kWh, tariff, and communication status. IC Role / Device Role / Timing Role: Cascaded LCD driver (SYNC-linked); three PCF85132U/2DA/1,02 units drive 1920-element display with unified I²C control. Use Value: 400 kHz I²C interface reduces firmware latency; separate VLCD/VDD rails isolate sensitive analog metering circuitry from display noise. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar LCD segment driver applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| PCF8576C/1,118 | 40-segment × 4-backplane (160 elements max); no internal oscillator; requires external clock or RC network | Limited to smaller displays; lacks cascade SYNC and dual-bank blink; lower integration reduces BOM count but increases design complexity | Choose when cost sensitivity outweighs feature requirements and display size ≤ 160 elements |
| RA8835N | Parallel 8-bit interface; 132 × 64 dot-matrix support; no I²C; higher power (IDD = 2 mA typical) | Targets graphical LCDs, not segment-based; incompatible bus protocol; requires external bias and timing circuitry | Choose only for dot-matrix displays where parallel interface and graphics rendering are mandatory |
Compared with PCF85132U/2DA/1,02, the PCF8576C/1,118 offers lower gate count but sacrifices frame-rate calibration and cascading, while the RA8835N targets fundamentally different display architectures - making PCF85132U/2DA/1,02 uniquely suited for scalable, I²C-driven segment LCDs with minimal external components.
Availability
PCF85132U/2DA/1,02 is available at Aetrix Electronics and suitable for industrial panel meters, automotive instrument clusters, and smart energy meters requiring stable component supply, long-term lifecycle support, and bare-die COG compatibility.
Supply support for PCF85132U/2DA/1,02 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor leader specializing in secure connectivity solutions for automotive, industrial, and IoT applications, with deep expertise in mixed-signal and display interface technologies.
The PCF85132U/2DA/1,02 belongs to NXP's legacy LCD segment driver product line, engineered specifically for low-power, high-reliability microcontroller-interfaced character and graphic LCDs in harsh environments.
FAQ
What is the maximum LCD element count supported by the PCF85132U/2DA/1,02?
The PCF85132U/2DA/1,02 supports up to 640 LCD elements (4 backplanes × 160 segments). This capacity is achieved in 1:4 multiplex mode. In static mode, it drives 160 elements; in 1:2 mode, 320 elements; and in 1:3 mode, 480 elements. Cascading multiple PCF85132U/2DA/1,02 units via the SYNC pin extends total capacity to 5120 elements - confirmed in Section 2 and Table 14 of the official datasheet.
Does the PCF85132U/2DA/1,02 require external components for LCD bias generation?
No, the PCF85132U/2DA/1,02 includes a fully integrated LCD bias generator with internal voltage divider and switchable 1/2 or 1/3 bias configuration. Section 7.3.1 explicitly states that "biasing voltages for the multiplexed LCD waveforms are generated internally, removing the need for an external bias generator." Only VLCD, VDD, VSS, and the LCD panel connections are required - no resistors, capacitors, or charge pumps.
How is the frame frequency calibrated in the PCF85132U/2DA/1,02?
The PCF85132U/2DA/1,02 features a factory-calibrated internal oscillator with ±3.9 % accuracy at VDD = 5.0 V and Tamb = 30 °C. Frame frequency (60–90 Hz in 5 Hz steps) is derived by dividing the oscillator output using a programmable prescaler controlled by the frequency-ctrl command (Table 12). Calibration is performed during manufacturing - no user trimming or external reference is needed.
Can the PCF85132U/2DA/1,02 drive both static and multiplexed LCDs?
Yes, the PCF85132U/2DA/1,02 supports static (1 backplane), 1:2, 1:3, and 1:4 multiplexed LCDs. The mode-set command (Table 5) configures drive mode and bias; Section 7.3.4 details waveform generation for each. Static mode uses BP0 only; 1:4 mode uses BP0–BP3. All modes share the same 160-segment output structure and 160 × 4-bit RAM.
What package type is used for the PCF85132U/2DA/1,02?
The PCF85132U/2DA/1,02 is supplied as a bare die (197 bumps) in a 6.5 mm × 1.16 mm × 0.40 mm form factor, intended for Chip-on-Glass (COG) assembly. Table 1 confirms "bare die" packaging; Table 2 lists "chips with bumps in tray" delivery form. No leaded or molded package variants exist for this orderable part number.
PCF85132U/2DA/1,02 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Series:
- -
- Package/Case:
- Die
- Packaging:
- Bulk
- Product Status:
- Active
- Display Type:
- LCD
- Configuration:
- Multiple
- Interface:
- I2C
- Digits or Characters:
- Any Digit Type
- Current - Supply:
- 60 µA
- Voltage - Supply:
- 1.8V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- -
- Supplier Device Package:
- Die
PCF85132U/2DA/1,02 FAQ
1.How can I place an order for PCF85132U/2DA/1,02 through Aetrix?
Please submit a Request for Quotation (RFQ) for PCF85132U/2DA/1,02 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for PCF85132U/2DA/1,02 reliable?
The price and inventory of PCF85132U/2DA/1,02 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PCF85132U/2DA/1,02 is usually 5 days.
3.What payment methods are accepted for PCF85132U/2DA/1,02?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PCF85132U/2DA/1,02 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for PCF85132U/2DA/1,02?
PCF85132U/2DA/1,02 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your PCF85132U/2DA/1,02 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for PCF85132U/2DA/1,02?
For technical support, including PCF85132U/2DA/1,02 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PCF85132U/2DA/1,02 requirements.
6.How does Aetrix verify that PCF85132U/2DA/1,02 is sourced from the original manufacturer or authorized distributors?
All PCF85132U/2DA/1,02 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PCF85132U/2DA/1,02 meets industry standards.
7.What is the process for return or replacement of PCF85132U/2DA/1,02?
All PCF85132U/2DA/1,02 units undergo pre-shipment inspection (PSI). If there is an issue with PCF85132U/2DA/1,02, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The PCF85132U/2DA/1,02 part is unused and in its original packaging.
Return procedure for PCF85132U/2DA/1,02:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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