NXP Semiconductors PCF8574P,112

Overview

PCF8574P,112 from NXP Semiconductors is an 8-bit quasi-bidirectional I²C-bus I/O expander with active-low open-drain interrupt output, operating from 2.5 V to 6 V, supporting up to 100 kHz I²C communication and delivering 10 mA sink per port at 5 V. It features eight latched I/O pins that default to inputs with 100 µA internal pull-up at power-on, and provides total package sink capability of 80 mA. It is widely used in LED signage, keypad monitoring, and industrial control systems where remote GPIO expansion with interrupt-driven event detection is required.

For engineers reviewing the PCF8574P,112 datasheet, PCF8574P,112 pinout, PCF8574P,112 application, or PCF8574P,112 equivalent, this device serves as a low-power, address-configurable (via A0–A2) parallel port extender for microcontroller systems needing minimal I²C overhead, deterministic interrupt signaling on input change, and direct LED drive without external drivers.

Technical Context

The PCF8574P,112 implements a single-register quasi-bidirectional I/O architecture: no direction register is needed - writing '1' configures a pin as input (enabled by 100 µA weak pull-up), while writing '0' activates a strong NMOS sink for output LOW. Input state changes trigger the open-drain INT pin within tv(Q) after edge detection, eliminating polling.

Its I²C interface complies strictly with Standard-mode (100 kHz), uses fixed 7-bit slave addresses (0x20–0x27 for PCF8574 variant), and integrates internal Power-On Reset (POR) that initializes all ports as HIGH inputs. The DIP16 package supports through-hole mounting and operates across –40 °C to +85 °C ambient temperature.

Key Specifications

Pinout & Package

DIP16 plastic dual in-line package (SOT38-4), 300 mil width, through-hole mountable. Pin 1 = A0, Pin 16 = VDD, Pin 8 = VSS, Pin 13 = INT (active-low open-drain), Pins 4–12 = P0–P7 (quasi-bidirectional I/O), Pins 14/15 = SCL/SDA.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar I²C-based remote I/O expansion applications.

Compared with PCF8574P,112, PCA8574P,112 offers higher I²C bandwidth and lower minimum supply voltage, while PCF8574AP,112 provides non-overlapping addressing - both preserve identical DIP16 footprint and quasi-bidirectional I/O behavior, enabling drop-in replacement in most cases.

Availability

PCF8574P,112 is available at Aetrix Electronics and suitable for industrial control, server board management, and LED signage applications requiring stable component supply, long-term lifecycle support, and traceable sourcing.

Supply support for PCF8574P,112 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

NXP Semiconductors is a global semiconductor company headquartered in Eindhoven, Netherlands, specializing in secure connectivity solutions for automotive, industrial, and IoT markets.

The PCF8574P,112 belongs to NXP's legacy I²C I/O expander product line, designed specifically for cost-sensitive, low-pin-count microcontroller systems needing simple, interrupt-capable GPIO extension without complex configuration.

FAQ

What is the I²C slave address range for PCF8574P,112?

The PCF8574P,112 uses the PCF8574 family's fixed 7-bit address prefix 0x20 (binary 0100000). With A2–A0 pins, it supports eight addresses: 0x20–0x27 (write) / 0x21–0x27 (read). This differs from PCF8574A's 0x38–0x3F range - ensuring bus coexistence. PCF8574P,112 does not support Fast-mode or 10-bit addressing.

Can PCF8574P,112 drive LEDs directly without external components?

Yes - PCF8574P,112 can directly drive standard LEDs with appropriate current-limiting resistors. Each port sinks ≥10 mA at 5 V (VOL ≤ 0.4 V), and the total package sink limit is 80 mA. For example, eight 10 mA LEDs can be driven simultaneously. PCF8574P,112's quasi-bidirectional architecture eliminates need for external MOSFETs or driver ICs in basic indicator applications.

How does the interrupt (INT) pin on PCF8574P,112 behave during I²C read/write operations?

The INT pin on PCF8574P,112 is automatically de-asserted (goes HIGH) upon completion of any I²C read or write transaction - specifically on the rising edge of the acknowledge bit clock pulse. This ensures the interrupt clears after the MCU reads updated port states or writes new outputs. PCF8574P,112 does not require explicit software clearing of INT; it resets synchronously with bus activity.

What happens to PCF8574P,112 I/O states during power-on reset?

During power-on, PCF8574P,112's internal POR circuit initializes all P0–P7 ports as HIGH inputs with a 100 µA weak pull-up to VDD. This safe default prevents floating inputs and unintended output activation. The INT pin remains HIGH until first I/O state change occurs. PCF8574P,112 requires no external reset circuit - POR threshold is 1.3–2.4 V (typical VPOR).

Is PCF8574P,112 pin-compatible with SO16 or SSOP20 variants like PCF8574T/3?

No - PCF8574P,112 uses the DIP16 package (SOT38-4) with 16 pins in dual in-line format, while PCF8574T/3 uses SO16 (SOT162-1) and PCF8574TS/3 uses SSOP20 (SOT266-1). Although functional and register-compatible, the pinouts differ: DIP16 places A0–A2 on pins 1–3 and INT on pin 13, whereas SO16 mirrors DIP16 layout, but SSOP20 relocates A0–A2 and adds NC pins. PCF8574P,112 is not mechanically interchangeable with surface-mount variants.