STMicroelectronics PD57018
- Part No.:
- PD57018
- Manufacturer:
- STMicroelectronics
- Category:
- Single FETs, MOSFETs
- Package:
- PowerSO-10 Exposed Bottom Pad
- Datasheet:
-
PD57018.pdf
- Description:
- RF MOSFET LDMOS 28V POWERSO10
- Quantity:
- Payment:

- Shipping:

Inventory:3,350
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Product details
Overview
PD57018 from STMicroelectronics is a common-source N-channel enhancement-mode lateral LDMOS RF power transistor designed for high-gain, broadband operation up to 1 GHz at 28 V supply. It delivers 18 W output power with 16.5 dB gain and 53% drain efficiency at 945 MHz in base station amplifier stages. Its PowerSO-10RF plastic SMD package enables high-reliability surface-mount assembly in macrocell and small-cell infrastructure.
For engineers reviewing the PD57018 datasheet, PD57018 pinout, PD57018 application, or PD57018 equivalent, key selection criteria include its 65 V V(BR)DSS rating, 3.0 °C/W junction-to-case thermal resistance, 34.5 pF Ciss, 1 mho transconductance, and verified load mismatch tolerance up to 10:1 VSWR across phase angles.
Technical Context
The PD57018 employs ST's proprietary lateral double-diffused MOS (LDMOS) process optimized for RF linearity and thermal stability in common-source configuration. Its gate bias operates at 2.0–5.0 V for 100 mA quiescent drain current, enabling Class AB linear amplification without external gate resistors.
It features low input capacitance (Ciss = 34.5 pF), moderate output capacitance (Coss = 21 pF), and minimal feedback capacitance (Crss = 1.3 pF), supporting stable broadband matching from 925–960 MHz. The device maintains consistent gain flatness (±0.75 dB) and return loss >15 dB across this band under 18 W POUT conditions.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| V(BR)DSS | 65 V - Withstands transient voltage spikes up to 65 V without breakdown, enabling robust operation in 28 V DC-fed RF PA stages. |
| POUT @ 945 MHz | 18 W - Delivers full-rated RF output power into 50 Ω load at 945 MHz with 28 V supply and 100 mA IDQ bias. |
| GPS @ 945 MHz | 16.5 dB typ - Provides 45× power gain, reducing driver stage complexity in multi-stage base station amplifiers. |
| ηD @ 945 MHz | 53 % typ - Achieves high DC-to-RF conversion efficiency, lowering thermal load and power supply requirements. |
| Rth(j-c) | 3.0 °C/W - Enables direct heatsinking to PCB copper or external heatsink, supporting continuous-wave operation at Tc ≤ 70 °C. |
| Ciss / Coss / Crss | 34.5 / 21 / 1.3 pF - Low feedback capacitance ensures unconditional stability; input/output capacitances simplify broadband impedance matching. |
| Load Mismatch | 10:1 VSWR - Survives worst-case antenna VSWR events across all phase angles without degradation or latch-up. |
Pinout & Package
PD57018 is housed in the PowerSO-10RF plastic SMD package (gull-wing formed leads), JEDEC-approved for high-power RF applications. The package integrates an exposed drain pad for low-thermal-resistance mounting and optimized RF grounding.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| GATE | Control electrode | Accepts 2.0–5.0 V DC bias for 100 mA IDQ; requires external DC blocking and RF bypassing per AN1294. |
| SOURCE | Common reference node | Internally connected to exposed drain pad ground plane; must be soldered to large PCB ground area for thermal and RF performance. |
| DRAIN | RF power output terminal | High-current RF output node; connects directly to output matching network and heatsink via exposed metal pad. |
Key Features
| Feature | Design Value |
|---|---|
| PowerSO-10RF SMD package | First JEDEC-approved high-power RF plastic SMD package, enabling automated assembly and eliminating through-hole reliability risks. |
| Excellent thermal stability | Normalized VGS drift < ±2% over −40 to +100 °C case temperature, ensuring consistent bias point across environmental extremes. |
| Superior linearity | IMD3 < −30 dBc at 18 W POUT (945 MHz, two-tone test), meeting 3GPP ACLR requirements for LTE base stations. |
| High reliability | Qualified to industrial temperature range (−65 to +150 °C storage); 165 °C max junction temperature supports long-term field operation. |
| Common-source configuration | Single-ended topology simplifies PCB layout and matching network design versus push-pull or balanced alternatives. |
Applications
| Macrocell Base Station PA | Small-Cell Remote Radio Head |
|---|---|
Use Scenario: Final-stage RF power amplifier in 900 MHz band macrocell BTS operating at 28 V supply. IC Role / Device Role / Timing Role: High-efficiency, high-linearity final-stage power transistor delivering 18 W POUT into 50 Ω load. Use Value: Enables single-transistor final stage with 53% drain efficiency, reducing cooling requirements and system power consumption. |
Use Scenario: Compact, air-cooled PA module in outdoor small-cell RRH units deployed on street furniture. IC Role / Device Role / Timing Role: Surface-mount RF power transistor in Class AB configuration with integrated thermal pad. Use Value: PowerSO-10RF package allows direct PCB heatsinking, eliminating need for mechanical fasteners or thermal interface materials. |
| ISM Band Industrial Amplifier | Land Mobile Radio Transmitter |
Use Scenario: 915 MHz ISM-band RF amplifier for medical diathermy or industrial heating systems. IC Role / Device Role / Timing Role: Robust RF power device handling continuous-duty 18 W output with 10:1 VSWR survivability. Use Value: Eliminates need for external circulators or VSWR protection circuits due to intrinsic load mismatch tolerance. |
Use Scenario: Mobile radio transmitter PA in public safety or commercial land mobile radio equipment. IC Role / Device Role / Timing Role: High-reliability RF transistor operating at 28 V with stable gain across temperature and battery voltage variation. Use Value: Maintains ≥14 dB gain across 925–960 MHz band and ±20% supply voltage swing, ensuring consistent modulation fidelity. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar RF power transistor applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MRF6V2150N | Higher POUT (150 W), GaN-on-SiC, 28 V, 1.8–2.2 GHz band - not frequency-compatible with 945 MHz. | Targeted for 2.1 GHz LTE macrocells; unsuitable for 900 MHz band without redesign. | Select only if upgrading to higher-frequency bands and higher power; requires new matching network and bias circuitry. |
| PD57018S | Same die, straight-lead variant of PowerSO-10RF package - identical electrical specs, different lead form factor. | Used where wave-solder or selective soldering is preferred over reflow; same RF and thermal performance. | Choose PD57018S for through-hole compatible assembly processes; otherwise PD57018 (formed lead) is optimal for SMT lines. |
Compared with MRF6V2150N, PD57018 offers precise 900 MHz band optimization and lower cost for legacy infrastructure; compared with PD57018S, the formed-lead version provides superior coplanarity and reflow yield in high-volume SMT production.
Availability
PD57018 is available at Aetrix Electronics and suitable for macrocell base station amplifiers, small-cell remote radio heads, ISM-band industrial transmitters, and land mobile radio systems requiring stable component supply and long-lifecycle support.
Supply support for PD57018 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, specializing in automotive, industrial, and power discrete technologies with over 45 years of analog and RF product heritage.
PD57018 belongs to ST's LdmoST Plastic family of RF power transistors, engineered specifically for high-efficiency, high-linearity cellular infrastructure amplifiers operating below 1 GHz.
FAQ
What is the maximum safe operating drain voltage for PD57018?
The absolute maximum drain-source voltage (V(BR)DSS) is 65 V at TCASE = 25°C, measured with VGS = 0 V and IDS = 10 mA. Operation above 28 V DC supply is permissible only during transient events within the SOA curve; sustained operation must remain ≤28 V for rated 18 W output.
Does PD57018 require external gate protection diodes?
No. The device incorporates internal gate protection and specifies ±20 V maximum gate-source voltage (VGS). External Zener clamps are unnecessary when bias is regulated within 2.0–5.0 V and gate drive is AC-coupled with proper RF bypassing per ST application note AN1294.
How does thermal performance differ between PD57018 and PD57018S?
Both variants share identical die and thermal characteristics: Rth(j-c) = 3.0 °C/W and Tj(max) = 165 °C. The only difference is lead form - formed (gull-wing) vs. straight - which affects solder joint geometry but not thermal resistance or RF performance.
Can PD57018 be used in Doherty amplifier configurations?
Yes. Its common-source topology, high linearity (IMD3 < −30 dBc), and stable gain make it suitable as the main or auxiliary amplifier in Doherty architectures. Matching networks must be designed per the provided ZIN/ZDL impedance data at 925–960 MHz for optimal efficiency and bandwidth.
PD57018 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Series:
- -
- Package/Case:
- PowerSO-10 Exposed Bottom Pad
- Packaging:
- Tube
- Product Status:
- Obsolete
- Technology:
- LDMOS
- Configuration:
- -
- Frequency:
- 945MHz
- Gain:
- 16.5dB
- Voltage - Test:
- 28 V
- Current Rating (Amps):
- 2.5A
- Noise Figure:
- -
- Current - Test:
- 100 mA
- Power - Output:
- 18W
- Voltage - Rated:
- 65 V
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- -
- Supplier Device Package:
- 10-PowerSO
PD57018 FAQ
1.How can I place an order for PD57018 through Aetrix?
Please submit a Request for Quotation (RFQ) for PD57018 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for PD57018 reliable?
The price and inventory of PD57018 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PD57018 is usually 5 days.
3.What payment methods are accepted for PD57018?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PD57018 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for PD57018?
PD57018 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your PD57018 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for PD57018?
For technical support, including PD57018 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PD57018 requirements.
6.How does Aetrix verify that PD57018 is sourced from the original manufacturer or authorized distributors?
All PD57018 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PD57018 meets industry standards.
7.What is the process for return or replacement of PD57018?
All PD57018 units undergo pre-shipment inspection (PSI). If there is an issue with PD57018, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The PD57018 part is unused and in its original packaging.
Return procedure for PD57018:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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