NXP Semiconductors PDTA113EK,115
- Part No.:
- PDTA113EK,115
- Manufacturer:
- NXP Semiconductors
- Category:
- Single, Pre-Biased Bipolar Transistors
- Package:
- TO-236-3, SC-59, SOT-23-3
- Datasheet:
-
PDTA113EK,115.pdf
- Description:
- TRANS PREBIAS PNP 50V 0.1A SMT3
- Quantity:
- Payment:

- Shipping:

Inventory:9,297
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Product details
Overview
PDTA113EK from NXP Semiconductors is a PNP resistor-equipped transistor (RET) in SOT346 (SC-59A/TO-236) package, featuring integrated bias resistors R1 = 1 kΩ and R2/R1 = 1, VCEO = −50 V, IO = −100 mA, and VCEsat ≤ −150 mV at IC = −30 mA. It serves as a compact, pre-biased switching element in digital logic interfaces and level-shifting circuits.
For engineers reviewing the PDTA113EK datasheet, PDTA113EK pinout, PDTA113EK application, or PDTA113EK equivalent, key selection criteria include its −50 V collector-emitter breakdown rating, built-in 1 kΩ input resistor enabling direct microcontroller GPIO drive, low saturation voltage for efficient switching, and SOT346 thermal resistance of 500 K/W.
Technical Context
This PNP RET integrates two precision bias resistors (R1 = 1 kΩ, R2 = 1 kΩ) to eliminate external base resistors, simplifying circuit design and reducing PCB footprint. Its internal resistor ratio of 1.0 ensures predictable turn-on behavior with minimal base current dependency.
The device operates with an emitter-grounded configuration in SOT346: Pin 1 is base input, Pin 2 is emitter (GND), and Pin 3 is collector output. It supports DC switching up to −100 mA with guaranteed VCEsat ≤ −150 mV under IC = −30 mA / IB = −1.5 mA conditions.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VCEO | −50 V: Maximum safe collector-emitter voltage with base open; defines high-side switch headroom in PNP configurations. |
| IO | −100 mA: Continuous DC output current capability; suitable for driving LEDs, small relays, or logic inputs. |
| R1 | 1 kΩ (0.7–1.3 kΩ): Integrated base input resistor enables direct connection to 3.3 V or 5 V logic without external components. |
| VCEsat | ≤ −150 mV at IC = −30 mA: Low saturation voltage minimizes power loss and heat generation during on-state operation. |
| hFE | ≥30 at VCE = −5 V, IC = −40 mA: Sufficient DC current gain to ensure reliable saturation with standard logic-level drive. |
| Ptot | 250 mW at Tamb ≤ 25 °C: Power dissipation limit in SOT346 package; requires thermal derating above ambient temperature. |
Pinout & Package
SOT346 (SC-59A/TO-236) is a plastic surface-mounted package with 3 leads, body dimensions 3.1 × 1.7 × 1.3 mm, and standard JEDEC TO-236 outline. Thermal resistance Rth(j-a) = 500 K/W in free air.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | Base input (with R1) | Accepts logic-level input; internal 1 kΩ resistor limits base current and eliminates need for external pull-up/down. |
| 2 | Emitter (GND) | Common reference node; connects directly to system ground in standard PNP switch configuration. |
| 3 | Collector output | Switched output node; sinks current when active; rated for −50 V and −100 mA continuous operation. |
Key Features
| Feature | Design Value |
|---|---|
| Integrated bias network | R1 = 1 kΩ and R2 = 1 kΩ enable single-resistor logic interface-no external base components required. |
| Low saturation voltage | VCEsat ≤ −150 mV ensures minimal conduction loss and thermal stress in high-duty-cycle switching. |
| High VCEO rating | −50 V collector-emitter breakdown supports robust operation in 24 V industrial control and automotive subsystems. |
| SOT346 package | Standardized TO-236 footprint offers compatibility with automated assembly and proven thermal performance (500 K/W). |
Applications
| LED Driver Circuit | Microcontroller Interface |
|---|---|
Use Scenario: Driving common-anode LEDs from 3.3 V or 5 V MCU GPIO pins in indicator panels and status displays. IC Role / Device Role / Timing Role: PNP switch controlling LED current path to ground via emitter-follower configuration. Use Value: Built-in 1 kΩ R1 allows direct GPIO connection without discrete base resistor; −150 mV VCEsat preserves forward voltage margin for LED brightness control. | Use Scenario: Level translation between 3.3 V logic outputs and 5 V or 12 V peripheral enable lines. IC Role / Device Role / Timing Role: Active-low signal inverter with fixed gain and fast turn-off due to R2 feedback path. Use Value: R2/R1 = 1 ratio provides stable off-state leakage suppression (< −1 µA ICEO), ensuring clean high-impedance disable states. |
| Relay Driver Stage | Power Rail Switching |
Use Scenario: Controlling small signal relays (e.g., 5 V coil, 100 mA hold current) in programmable logic controllers. IC Role / Device Role / Timing Role: High-side switch replacing discrete PNP + two-resistor solution in relay coil drive path. Use Value: −100 mA IO rating matches typical relay coil requirements; −50 V VCEO withstands inductive kickback without snubber. | Use Scenario: Enabling/disabling auxiliary 5 V or 3.3 V rails in battery-powered IoT nodes based on MCU sleep/wake signals. IC Role / Device Role / Timing Role: Load switch with integrated biasing, minimizing quiescent current in shutdown mode. Use Value: VI(off) ≤ −0.5 V guarantees full cutoff at logic-high input; IEBO < −4 mA prevents false turn-on from noise coupling. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar PNP resistor-equipped transistor applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| PDTC113EK | NPN complement with identical R1/R2 values, SOT346 package, and matching VCEO/IO ratings. | Requires inverted logic drive and load-side switching instead of source-side; not drop-in for PNP topology. | Select PDTC113EK only when circuit architecture mandates NPN high-side sourcing or complementary stage pairing. |
| NSV113E0T1G | ON Semiconductor PNP RET in SOT-23; R1 = 10 kΩ, R2 = 10 kΩ, VCEO = −50 V, but higher VCEsat (−300 mV typ) and lower IO (−100 mA max). | Same functional role but incompatible pinout (SOT-23 vs SOT346) and higher saturation loss reduces efficiency in high-current switching. | Choose NSV113E0T1G only if SOT-23 footprint is mandatory and −300 mV VCEsat is acceptable for thermal budget. |
Compared with PDTC113EK and NSV113E0T1G, PDTA113EK delivers optimal balance of PNP topology, SOT346 manufacturability, −150 mV low-loss switching, and 1 kΩ logic-compatible input impedance-making it preferred for space-constrained, low-power digital interface designs requiring source-switching capability.
Availability
PDTA113EK is available at Aetrix Electronics and suitable for LED driver circuits, microcontroller interface stages, relay driver modules, and power rail switching applications requiring stable component supply across industrial and consumer electronics production cycles.
Supply support for PDTA113EK includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor company headquartered in Eindhoven, Netherlands, specializing in secure connectivity solutions for automotive, industrial, and IoT markets.
The PDTA113EK belongs to NXP's resistor-equipped transistor (RET) family, designed specifically to reduce bill-of-materials count and simplify digital interface design in space- and cost-sensitive embedded systems.
FAQ
What is the maximum operating temperature for PDTA113EK?
The PDTA113EK has a maximum junction temperature (Tj) of 150 °C and an ambient temperature range of −65 °C to +150 °C. Its thermal resistance Rth(j-a) is 500 K/W in free air, so sustained operation near 150 °C requires careful PCB thermal design and power derating per the datasheet curves.
Does PDTA113EK require an external base resistor?
No, PDTA113EK does not require an external base resistor. It integrates R1 = 1 kΩ and R2 = 1 kΩ internally, enabling direct connection to 3.3 V or 5 V logic outputs. This eliminates discrete components and reduces layout complexity while maintaining predictable switching thresholds.
What is the pin configuration of PDTA113EK in SOT346 package?
In the SOT346 package, PDTA113EK uses a standardized pinout: Pin 1 is the base input (with internal R1), Pin 2 is the emitter (GND), and Pin 3 is the collector output. This matches JEDEC TO-236 and SC-59A mechanical outlines and is verified in NXP's official pinning table.
Can PDTA113EK replace a discrete PNP transistor plus two resistors?
Yes, PDTA113EK is engineered as a direct functional replacement for a discrete PNP transistor (e.g., BC807) plus two external bias resistors. Its integrated R1/R2 network replicates the same biasing function while reducing component count, pick-and-place steps, and PCB area-confirmed by NXP's "reduces component count" and "simplifies circuit design" feature statements.
What is the typical VCEsat of PDTA113EK under standard operating conditions?
The typical VCEsat of PDTA113EK is ≤ −150 mV at IC = −30 mA and IB = −1.5 mA, with Tamb = 25 °C. This low saturation voltage is guaranteed across process and temperature, enabling high-efficiency switching in battery-powered and thermally constrained applications using PDTA113EK.
PDTA113EK,115 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Series:
- -
- Package/Case:
- TO-236-3, SC-59, SOT-23-3
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Transistor Type:
- PNP - Pre-Biased
- Current - Collector (Ic) (Max):
- 100 mA
- Voltage - Collector Emitter Breakdown (Max):
- 50 V
- Resistor - Base (R1):
- 1 kOhms
- Resistor - Emitter Base (R2):
- 1 kOhms
- DC Current Gain (hFE) (Min) @ Ic, Vce:
- 30 @ 40mA, 5V
- Vce Saturation (Max) @ Ib, Ic:
- 150mV @ 1.5mA, 30mA
- Current - Collector Cutoff (Max):
- 1µA
- Frequency - Transition:
- -
- Power - Max:
- 250 mW
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- SMT3; MPAK
PDTA113EK,115 FAQ
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6.How does Aetrix verify that PDTA113EK,115 is sourced from the original manufacturer or authorized distributors?
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7.What is the process for return or replacement of PDTA113EK,115?
All PDTA113EK,115 units undergo pre-shipment inspection (PSI). If there is an issue with PDTA113EK,115, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The PDTA113EK,115 part is unused and in its original packaging.
Return procedure for PDTA113EK,115:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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