NXP Semiconductors PDTA115TK,115
- Part No.:
- PDTA115TK,115
- Manufacturer:
- NXP Semiconductors
- Category:
- Single, Pre-Biased Bipolar Transistors
- Package:
- TO-236-3, SC-59, SOT-23-3
- Datasheet:
-
PDTA115TK,115.pdf
- Description:
- TRANS PREBIAS PNP 50V 0.1A SMT3
- Quantity:
- Payment:

- Shipping:

Inventory:3,522
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Product details
Overview
PDTA115TK,115 from Nexperia is a PNP resistor-equipped transistor (RET) with integrated 100 kΩ base bias resistor (R1), open R2 configuration, −50 V VCEO, −100 mA IO, and SOT346 (SC-59) package. It functions as a single-transistor switch in low-power digital interface circuits, replacing discrete BJT + two resistors in level-shifting and logic buffer applications.
For engineers reviewing the PDTA115TK,115 datasheet, PDTA115TK,115 pinout, PDTA115TK,115 application, or PDTA115TK,115 equivalent, key selection criteria include verified VCEO rating, confirmed R1 tolerance (70–130 kΩ), thermal resistance (500 K/W), DC current gain at −1 mA, and SOT346 pin compatibility with legacy TO-236 footprints.
Technical Context
This device integrates a PNP bipolar junction transistor with a precision 100 kΩ input bias resistor (R1) and no second resistor (R2 = open), enabling direct logic-level drive without external base components. Its architecture eliminates base resistor matching errors and reduces PCB footprint by 66% versus discrete equivalents.
Designed for DC switching up to 100 mA, it operates with VCE = −5 V and IC = −1 mA to deliver hFE ≥ 100, while maintaining VCEsat ≤ −150 mV at IC = −5 mA / IB = −0.25 mA - critical for low-loss signal inversion in battery-powered interfaces.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VCEO | −50 V: Maximum collector-emitter blocking voltage under open-base conditions; ensures safe operation in 24 V industrial control rails. |
| IO | −100 mA: Continuous DC output current capability; supports driving LED indicators or small relays directly. |
| R1 | 70–130 kΩ: Toleranced integrated base bias resistor; enables predictable turn-on threshold without external component variation. |
| hFE | ≥100 @ VCE = −5 V, IC = −1 mA: Minimum DC current gain; guarantees reliable saturation with standard microcontroller GPIO drive strength. |
| VCEsat | ≤ −150 mV @ IC = −5 mA, IB = −0.25 mA: Low saturation voltage; minimizes power loss and heat generation in high-duty-cycle switching. |
| Ptot | 250 mW @ Tamb ≤ 25 °C: Total power dissipation limit in SOT346 package; defines maximum continuous switching load under natural convection. |
| Rth(j-a) | 500 K/W: Junction-to-ambient thermal resistance; determines temperature rise per watt - essential for thermal derating in enclosed enclosures. |
Pinout & Package
SOT346 (SC-59/TO-236) plastic surface-mounted package; 3 leads; body dimensions 3.1 × 1.7 × 1.3 mm; recommended reflow soldering only.
| Pin | Circuit Role | Design Meaning |
|---|---|---|
| 1 | input (base) | Connected internally to R1; accepts logic-level input (e.g., 0 V or 3.3 V) to control transistor conduction state. |
| 2 | GND (emitter) | Common reference node; tied to system ground; serves as current return path for both input and output loops. |
| 3 | output (collector) | Switched high-side output node; sinks current when active; connects to load (e.g., LED anode or MCU input pull-up). |
Key Features
| Feature | Design Value |
|---|---|
| Integrated R1 bias resistor | 100 kΩ ±30% eliminates need for external base resistor, reducing BOM count and layout area by one passive component. |
| Open R2 configuration | No second resistor enables flexible external feedback or pull-up implementation - ideal for open-collector interface designs. |
| Low VCEsat | ≤ −150 mV ensures minimal voltage drop across the switch, preserving signal integrity in 3.3 V or 5 V logic domains. |
| SOT346 footprint compatibility | Matches JEDEC TO-236AB outline; allows drop-in replacement of legacy discrete PNP switches without PCB redesign. |
| −65 °C to +150 °C operating range | Supports deployment in automotive engine compartments and industrial motor drives where ambient extremes occur. |
Applications
| LED Indicator Driver | Microcontroller Interface Buffer |
|---|---|
Use Scenario: Driving status LEDs from 3.3 V GPIO pins in portable medical devices. IC Role / Device Role / Timing Role: High-side current sink switch that inverts logic level and limits LED current via internal R1. Use Value: Eliminates external base resistor and saves 1.2 mm² PCB area per channel while maintaining <1 µA standby leakage. | Use Scenario: Level-shifting between 5 V legacy peripherals and 3.3 V microcontrollers in industrial PLC modules. IC Role / Device Role / Timing Role: Inverting open-collector buffer with defined VOL ≤ 0.15 V at 4 mA load. Use Value: Guarantees clean logic transitions without timing skew from resistor network RC delays. |
| Relay Coil Driver | Power Supply Enable Switch |
Use Scenario: Activating 24 VDC relay coils in building automation controllers. IC Role / Device Role / Timing Role: Low-saturation PNP switch controlling coil current path to ground. Use Value: Delivers −100 mA continuous current with <0.15 V dropout, reducing relay coil self-heating and extending contact life. | Use Scenario: Enabling 12 V auxiliary power rail in automotive infotainment head units. IC Role / Device Role / Timing Role: High-side enable switch controlled by low-voltage MCU output. Use Value: Provides fast turn-off (toff < 100 ns typical) and −50 V VCEO margin against load-dump transients. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar PNP resistor-equipped transistor applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| PDTC115TK | NPN complement with identical SOT346 package, R1 = 100 kΩ, same pinout but opposite polarity. | Requires inverted logic drive and reversed load connection; used where sourcing (not sinking) current is needed. | Select PDTC115TK only when circuit topology demands NPN behavior - not a functional substitute for PDTA115TK,115. |
| NSV11501MT1G | PNP RET in SOT-23 package; R1 = 100 kΩ, VCEO = −50 V, but Ptot = 250 mW and Rth(j-a) = 500 K/W - identical thermal performance but smaller footprint. | Same electrical specs but different mechanical outline; requires PCB land pattern change from SOT346 to SOT-23. | Choose NSV11501MT1G only if board space is constrained and re-layout is acceptable; not pin-compatible. |
Compared with PDTC115TK and NSV11501MT1G, PDTA115TK,115 uniquely combines PNP polarity, SOT346 mechanical compatibility with TO-236 footprints, and guaranteed −100 mA DC output in a cost-optimized industrial-grade package - making it optimal for retrofitting legacy discrete designs without layout changes.
Availability
PDTA115TK,115 is available at Aetrix Electronics and suitable for industrial control panels, automotive body electronics, and consumer appliance interfaces requiring stable component supply and long-term manufacturing continuity.
Supply support for PDTA115TK,115 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Nexperia is a global leader in discrete, logic, and PowerMOS semiconductors, spun off from NXP in 2017 and focused on automotive, industrial, computing, and consumer markets.
The PDTA115T series belongs to Nexperia's resistor-equipped transistor (RET) product line, engineered to simplify digital interface design by integrating bias resistors into robust, AEC-Q101 qualified packages for high-reliability switching applications.
FAQ
What is the exact pin configuration of PDTA115TK,115 in the SOT346 package?
PDTA115TK,115 uses a standardized SOT346 pinout: Pin 1 is input (base), Pin 2 is GND (emitter), and Pin 3 is output (collector). This matches JEDEC TO-236AB and enables direct substitution for discrete PNP transistors in existing SOT-23 or TO-236 layouts with appropriate pad adjustments.
Does PDTA115TK,115 include both R1 and R2 bias resistors?
No, PDTA115TK,115 includes only R1 = 100 kΩ (70–130 kΩ tolerance) and has R2 = open. This configuration supports applications requiring external pull-up or feedback networks, such as open-collector bus interfaces or programmable threshold circuits - unlike dual-resistor RETs like PDTA123EK.
What is the maximum continuous collector current rating for PDTA115TK,115?
The maximum continuous DC collector current (IO) for PDTA115TK,115 is −100 mA at Tamb ≤ 25 °C. Derating is required above 25 °C per the thermal resistance of 500 K/W; at 70 °C ambient, maximum usable current drops to approximately −55 mA to maintain Tj ≤ 150 °C.
Is PDTA115TK,115 suitable for automotive applications?
Yes, PDTA115TK,115 is qualified to AEC-Q101 standards for automotive use. Its −65 °C to +150 °C operating temperature range, 150 °C max junction temperature, and robust SOT346 package make it suitable for body control modules, lighting drivers, and sensor interface circuits in passenger vehicles.
What marking code identifies PDTA115TK,115 on the device body?
PDTA115TK,115 is marked with the code "11" on its top surface. This 2-character laser marking is consistent across all SOT346-packaged variants in the PDTA115T series and is visible under 20× magnification on the molded plastic package.
PDTA115TK,115 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Series:
- -
- Package/Case:
- TO-236-3, SC-59, SOT-23-3
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Transistor Type:
- PNP - Pre-Biased
- Current - Collector (Ic) (Max):
- 100 mA
- Voltage - Collector Emitter Breakdown (Max):
- 50 V
- Resistor - Base (R1):
- 100 kOhms
- Resistor - Emitter Base (R2):
- -
- DC Current Gain (hFE) (Min) @ Ic, Vce:
- 100 @ 1mA, 5V
- Vce Saturation (Max) @ Ib, Ic:
- 150mV @ 250µA, 5mA
- Current - Collector Cutoff (Max):
- 1µA
- Frequency - Transition:
- -
- Power - Max:
- 250 mW
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- SMT3; MPAK
PDTA115TK,115 FAQ
1.How can I place an order for PDTA115TK,115 through Aetrix?
Please submit a Request for Quotation (RFQ) for PDTA115TK,115 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for PDTA115TK,115 reliable?
The price and inventory of PDTA115TK,115 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PDTA115TK,115 is usually 5 days.
3.What payment methods are accepted for PDTA115TK,115?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PDTA115TK,115 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for PDTA115TK,115?
PDTA115TK,115 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your PDTA115TK,115 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for PDTA115TK,115?
For technical support, including PDTA115TK,115 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PDTA115TK,115 requirements.
6.How does Aetrix verify that PDTA115TK,115 is sourced from the original manufacturer or authorized distributors?
All PDTA115TK,115 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PDTA115TK,115 meets industry standards.
7.What is the process for return or replacement of PDTA115TK,115?
All PDTA115TK,115 units undergo pre-shipment inspection (PSI). If there is an issue with PDTA115TK,115, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The PDTA115TK,115 part is unused and in its original packaging.
Return procedure for PDTA115TK,115:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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