NXP Semiconductors PDTA123JK,115
- Part No.:
- PDTA123JK,115
- Manufacturer:
- NXP Semiconductors
- Category:
- Single, Pre-Biased Bipolar Transistors
- Package:
- TO-236-3, SC-59, SOT-23-3
- Datasheet:
-
PDTA123JK,115.pdf
- Description:
- TRANS PREBIAS PNP 50V 0.1A SMT3
- Quantity:
- Payment:

- Shipping:

Inventory:3,411
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Product details
Overview
PDTA123JK from NXP Semiconductors is a PNP resistor-equipped transistor with integrated bias resistors R1 = 2.2 kΩ and R2 = 47 kΩ, designed for general-purpose switching in low-voltage digital interface circuits. It features VCEO = −50 V, IO = −100 mA DC output current, and operates in SOT346 (SC-59) surface-mount package for space-constrained PCB layouts.
For engineers reviewing the PDTA123JK datasheet, PDTA123JK pinout, PDTA123JK application, or PDTA123JK equivalent, this discrete PNP RET simplifies BJT-based logic-level translation, reduces external component count, and supports reliable DC switching in industrial control I/O stages and microcontroller-driven load interfaces.
Technical Context
The PDTA123JK integrates two precision thin-film resistors (R1 = 2.2 kΩ, R2 = 47 kΩ) directly into a monolithic PNP bipolar die to form a single-input, single-output switch configuration. Its internal resistor ratio (R2/R1 ≈ 21) sets base bias for predictable saturation at IC = −5 mA with IB = −0.25 mA.
It delivers VCEsat ≤ −100 mV under rated drive conditions and exhibits low leakage: ICEO ≤ −1 μA at VCE = −30 V and Tj = 25 °C, rising to −50 μA at 150 °C - enabling stable operation across extended industrial temperature ranges.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VCEO | −50 V - maximum safe collector-emitter voltage before breakdown in open-base configuration |
| IO (DC) | −100 mA - continuous collector current capability without thermal derating at Tamb ≤ 25 °C |
| R1 | 2.2 kΩ ±30% - input bias resistor connecting base to input signal, defining turn-on threshold |
| R2 | 47 kΩ ±30% - feedback resistor from emitter to base, stabilizing operating point against β variation |
| VCEsat | ≤ −100 mV at IC = −5 mA, IB = −0.25 mA - ensures low conduction loss in saturated switching mode |
| hFE | ≥100 at VCE = −5 V, IC = −10 mA - sufficient current gain for direct GPIO driving without additional amplification |
| Tj max | 150 °C - maximum junction temperature supporting operation in sealed enclosures or high-ambient environments |
Pinout & Package
Package: SOT346 (SC-59), plastic surface-mounted package with 3 leads; body dimensions 3.1 × 2.7 × 1.3 mm (L × W × H); standard JEDEC-compliant footprint for automated placement and reflow soldering.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | Base | Input node connected internally to R1 and R2; accepts TTL/CMOS-compatible logic signals (Vi(on) = −0.75 V typ.) |
| 2 | Emitter | Common reference terminal; tied to system ground or negative rail in high-side switch configurations |
| 3 | Collector | Output node delivering switched current to load; polarity inverted relative to input due to PNP topology |
Key Features
| Feature | Design Value |
|---|---|
| Integrated bias network | Eliminates need for two external resistors, reducing BOM count and PCB area by ~3 mm² per instance |
| Guaranteed saturation performance | VCEsat ≤ −100 mV enables <100 mW power dissipation at 100 mA, minimizing thermal design overhead |
| Wide operating temperature range | Functional from −65 °C to +150 °C ambient, supporting automotive under-hood and industrial motor-control applications |
| Low input-off voltage | Vi(off) = −0.6 V typ. ensures robust noise immunity against false triggering in noisy 5 V digital systems |
| Standard SMT compatibility | SOT346 package supports IPC-7351B land pattern and is qualified for lead-free reflow per J-STD-020 |
Applications
| Industrial PLC Input Stage | Microcontroller GPIO Driver |
|---|---|
Use Scenario: Isolating and conditioning 24 V DC field signals into 3.3 V/5 V logic levels for PLC CPU modules. IC Role / Device Role / Timing Role: PNP RET acts as level-shifting active pull-down switch, sinking current from optocoupler outputs. Use Value: Built-in R1/R2 eliminates external biasing components, reducing input-stage bill-of-materials by two resistors per channel. | Use Scenario: Driving LED indicators, small relays, or MOSFET gates from MCU GPIO pins with limited sink/source capability. IC Role / Device Role / Timing Role: Acts as a buffered, polarity-inverted switch that translates logic-high to collector-low output state. Use Value: Guaranteed VCEsat ≤ −100 mV ensures minimal voltage drop and heat generation when sinking up to 100 mA. |
| Automotive Body Control Module | Consumer Appliance Power Sequencing |
Use Scenario: Controlling low-power solenoids and status LEDs in 12 V automotive subsystems with ESD-robust interface. IC Role / Device Role / Timing Role: Functions as a protected, current-limited PNP switch interfacing MCU outputs to 12 V loads. Use Value: VEBO = −10 V rating allows safe operation with transient spikes common on vehicle battery rails. | Use Scenario: Enabling/disabling auxiliary power rails (e.g., display backlight, sensor bias) during boot-up or standby modes. IC Role / Device Role / Timing Role: Provides clean, fast turn-on/turn-off switching with defined input thresholds (Vi(on)/Vi(off)) for deterministic sequencing. Use Value: Resistor ratio (R2/R1 ≈ 21) ensures stable biasing across process and temperature variations, preventing unintended conduction. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar PNP resistor-equipped transistor applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| PDTC123JK | NPN complement with identical R1/R2 values and SOT346 package; requires inverted logic drive and positive-side switching topology | Used where load connects to VCC instead of GND; not interchangeable without circuit redesign | Select PDTC123JK only when high-side sourcing (not sinking) is required and input logic polarity can be inverted |
| NSV123JU | Same R1/R2 values but in SOT323 package; lower Ptot (200 mW vs. 250 mW) and higher Rth j-a (625 K/W vs. 500 K/W) | Better suited for ultra-dense layouts where footprint size is critical over thermal margin | Choose NSV123JU only if board space is constrained and peak current remains below 60 mA to maintain junction temperature safety |
Compared with PDTC123JK and NSV123JU, the PDTA123JK provides optimal balance of thermal performance (250 mW Ptot, 500 K/W Rth j-a), standardized SOT346 footprint, and guaranteed −100 mV VCEsat - making it preferred for mid-density industrial control boards requiring robust 100 mA sinking capability.
Availability
PDTA123JK is available at Aetrix Electronics and suitable for industrial PLC input stages, microcontroller GPIO drivers, and automotive body control modules requiring stable component supply, long-term lifecycle support, and consistent parametric performance across production batches.
Supply support for PDTA123JK includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor company headquartered in Eindhoven, Netherlands, specializing in secure connectivity solutions for automotive, industrial, and IoT applications.
The PDTA123JK belongs to NXP's resistor-equipped transistor (RET) product line, engineered to replace discrete BJT + bias resistor combinations in cost-sensitive, high-volume digital interface and switching applications.
FAQ
What is the pin configuration of the PDTA123JK?
The PDTA123JK uses SOT346 package with pin 1 = Base, pin 2 = Emitter, pin 3 = Collector. This configuration is confirmed in the "Simplified outline, symbol and pinning" section of the official NXP datasheet (2004 Aug 02), and matches the standard SC-59 pinout for PNP RET devices in this series.
Does the PDTA123JK require external bias resistors?
No, the PDTA123JK does not require external bias resistors. It integrates R1 = 2.2 kΩ and R2 = 47 kΩ internally, as specified in the Quick Reference Data and Characteristics tables of the NXP datasheet. This built-in network enables direct connection to logic-level inputs without additional components.
What is the maximum continuous collector current for PDTA123JK?
The maximum continuous DC collector current for PDTA123JK is −100 mA, as stated in the Limiting Values table under "IO output current (DC)" with Tamb ≤ 25 °C. Derating applies above 25 °C ambient per the thermal resistance specification (Rth j-a = 500 K/W).
Can PDTA123JK be used in 3.3 V logic systems?
Yes, PDTA123JK supports 3.3 V logic systems. Its Vi(on) = −0.75 V (typ.) and Vi(off) = −0.6 V (typ.) ensure reliable turn-on with 3.3 V CMOS outputs, and its −100 mV VCEsat minimizes voltage drop across the device when sinking load current.
Is PDTA123JK RoHS compliant and lead-free solder compatible?
Yes, PDTA123JK is RoHS compliant and qualified for lead-free reflow soldering. The datasheet specifies reflow soldering as the only recommended method and references JEDEC J-STD-020 moisture sensitivity level (MSL) compliance - consistent with NXP's 2004-era lead-free transition for SOT346-packaged products.
PDTA123JK,115 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Series:
- -
- Package/Case:
- TO-236-3, SC-59, SOT-23-3
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Transistor Type:
- PNP - Pre-Biased
- Current - Collector (Ic) (Max):
- 100 mA
- Voltage - Collector Emitter Breakdown (Max):
- 50 V
- Resistor - Base (R1):
- 2.2 kOhms
- Resistor - Emitter Base (R2):
- 47 kOhms
- DC Current Gain (hFE) (Min) @ Ic, Vce:
- 100 @ 10mA, 5V
- Vce Saturation (Max) @ Ib, Ic:
- 100mV @ 250µA, 5mA
- Current - Collector Cutoff (Max):
- 1µA
- Frequency - Transition:
- -
- Power - Max:
- 250 mW
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- SMT3; MPAK
PDTA123JK,115 FAQ
1.How can I place an order for PDTA123JK,115 through Aetrix?
Please submit a Request for Quotation (RFQ) for PDTA123JK,115 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for PDTA123JK,115 reliable?
The price and inventory of PDTA123JK,115 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PDTA123JK,115 is usually 5 days.
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Once your PDTA123JK,115 order is processed, you will receive an email with the shipment details and tracking number.
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5.How can I obtain technical support or documentation for PDTA123JK,115?
For technical support, including PDTA123JK,115 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PDTA123JK,115 requirements.
6.How does Aetrix verify that PDTA123JK,115 is sourced from the original manufacturer or authorized distributors?
All PDTA123JK,115 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PDTA123JK,115 meets industry standards.
7.What is the process for return or replacement of PDTA123JK,115?
All PDTA123JK,115 units undergo pre-shipment inspection (PSI). If there is an issue with PDTA123JK,115, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The PDTA123JK,115 part is unused and in its original packaging.
Return procedure for PDTA123JK,115:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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