Nexperia USA Inc. PDTA143XQCZ

Overview

PDTA143XQC from Nexperia is a 50 V, 100 mA PNP resistor-equipped transistor (RET) in a DFN1412D-3 (SOT8009) leadless SMD package with side-wettable flanks. It integrates 4.7 kΩ input bias resistor (R1) and 10 kΩ feedback resistor (R2), delivers V_CE(sat) ≤ −100 mV at I_C = −10 mA / I_B = −0.5 mA, and supports digital switching of IC inputs and low-power loads in space-constrained consumer and industrial PCBs.

For engineers reviewing the PDTA143XQC datasheet, PDTA143XQC pinout, PDTA143XQC application, or PDTA143XQC equivalent, key selection criteria include its built-in resistor ratio (R2/R1 = 2.13 typ), ultra-low profile (0.48 mm height), AOI-compatible side-wettable flanks, and −50 V V_CEO rating for robust off-state blocking in 3.3 V/5 V logic interface circuits.

Technical Context

This PNP RET uses an integrated bipolar junction transistor with monolithically embedded R1 and R2 resistors to form a single-input, single-output active switch. Its base-emitter junction is biased through R1, while R2 provides emitter feedback to stabilize DC operating point and improve noise immunity.

The device operates as a saturated switch in digital applications, with guaranteed turn-on at V_I(on) = −1.5 V (typ) and turn-off at V_I(off) = −0.6 V (typ), enabling direct interfacing with standard CMOS/TTL outputs without external biasing components.

Key Specifications

Pinout & Package

DFN1412D-3 (SOT8009) is a 3-terminal, leadless plastic package measuring 1.4 × 1.2 × 0.48 mm with side-wettable flanks for automated optical inspection (AOI) of solder joints. It features a 0.8 mm pitch and 0.5 mm max package height.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar PNP resistor-equipped transistor applications.

Compared with PDTC143XQC, PDTA143XQC enables direct sink-switching without logic inversion; compared with BC857BW, it reduces component count and layout area at the cost of fixed bias configuration and slightly lower maximum h_FE.

Availability

PDTA143XQC is available at Aetrix Electronics and suitable for LED indicator control, microcontroller GPIO expansion, logic-level signal translation, and low-power load switching requiring stable component supply across high-mix, low-volume production runs.

Supply support for PDTA143XQC includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Nexperia is a leading semiconductor manufacturer specializing in high-performance, energy-efficient logic, analog, and discrete components for automotive, industrial, and consumer markets.

PDTA143XQC belongs to Nexperia's resistor-equipped transistor (RET) product line, engineered to simplify digital interface design by integrating precision biasing resistors into miniature leadless packages for space- and cost-sensitive applications.

FAQ

What is the maximum continuous collector current for PDTA143XQC?

The maximum continuous collector current is −100 mA at T_amb ≤ 25 °C on a standard FR4 PCB with 35 µm copper. Derating applies above 25 °C per Figure 1: at 75 °C ambient, maximum I_C drops to approximately −60 mA due to thermal limits.

Can PDTA143XQC be used in 1.8 V logic systems?

Yes - its V_I(on) is specified down to −0.75 V (min) at I_C = −5 mA, and typical turn-on occurs at −1.5 V, making it compatible with 1.8 V CMOS outputs when referenced to the same ground. Ensure V_I(off) ≥ −0.6 V is maintained to avoid unintended conduction.

Does PDTA143XQC require a heatsink in normal operation?

No heatsink is required. With P_tot = 360 mW (FR4, 35 µm Cu) and R_th(j-a) = 348 K/W, junction temperature rise is ~125 °C at full 100 mA/100 mV dissipation - still within the 150 °C T_j limit. Layout with adequate copper pour improves thermal performance.

How does the built-in R2 resistor affect switching speed?

R2 provides emitter degeneration that stabilizes DC bias but introduces minor Miller-effect capacitance. Measured f_T remains 180 MHz, and typical t_on/t_off is <100 ns at I_C = −10 mA, confirming suitability for digital switching up to 5–10 MHz without speed penalty.