NXP Semiconductors PDTA144VK,115
- Part No.:
- PDTA144VK,115
- Manufacturer:
- NXP Semiconductors
- Category:
- Single, Pre-Biased Bipolar Transistors
- Package:
- TO-236-3, SC-59, SOT-23-3
- Datasheet:
-
PDTA144VK,115.pdf
- Description:
- TRANS PREBIAS PNP 50V 0.1A SMT3
- Quantity:
- Payment:

- Shipping:

Inventory:7,690
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
PDTA144VK from Nexperia is a PNP resistor-equipped transistor (RET) designed for general-purpose switching and amplification in compact surface-mount applications. It features integrated bias resistors R1 = 47 kΩ and R2/R1 = 0.21, −50 V VCEO, −100 mA IO, and SOT346 (SC-59A) package. It is commonly used in logic-level interface circuits and load switching in consumer and industrial control modules.
For engineers reviewing the PDTA144VK datasheet, PDTA144VK pinout, PDTA144VK application, or PDTA144VK equivalent, this page delivers verified electrical parameters, validated pin configuration for SOT346, real-world use cases in level-shifting and inverter design, and two confirmed alternative parts with documented functional and packaging differences.
Technical Context
The PDTA144VK integrates two on-die resistors (R1 = 47 kΩ, R2 = 10 kΩ) to form a single-base-biased PNP transistor structure, eliminating external bias components. Its internal resistor network enables direct TTL/CMOS-compatible drive without external pull-up or current-limiting resistors.
It operates as a saturated switch with VCE(sat) ≤ −150 mV at IC = −10 mA / IB = −0.5 mA and supports off-state input voltage (VI(off)) down to −3.1 V - ensuring reliable turn-off under noisy digital logic conditions.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VCEO | −50 V - maximum allowable collector-emitter voltage before breakdown; suitable for 24 V rail switching with safety margin. |
| IO | −100 mA - continuous DC output current capability; supports medium-current loads like LED drivers or small relays. |
| R1 | 47 kΩ ±21% - input bias resistor enabling direct connection to 3.3 V or 5 V logic without external current limiting. |
| R2/R1 | 0.21 - fixed internal resistor ratio defining base current division; ensures predictable saturation behavior across temperature. |
| VCE(sat) | ≤ −150 mV at IC = −10 mA - low saturation voltage minimizes power loss and self-heating in switching mode. |
| hFE | ≥40 at VCE = −5 V, IC = −5 mA - sufficient DC gain for reliable switching with minimal drive overhead. |
| Ptot | 250 mW at Tamb ≤ 25 °C - thermal rating compatible with standard FR4 PCB layouts using SOT346 footprint. |
Pinout & Package
SOT346 (SC-59A/TO-236) plastic surface-mounted package; 3 leads; body dimensions 3.0 × 1.4 × 1.0 mm; standard reflow solderable.
| Pin | Circuit Role | Design Meaning |
|---|---|---|
| 1 | input (base) | Connected internally to R1 and R2 node; accepts logic-level input directly; no external base resistor required. |
| 2 | GND (emitter) | Emitter terminal tied to system ground reference; serves as common return path for switched load current. |
| 3 | output (collector) | Switched high-side output node; sinks current from load connected between VCC and collector. |
Key Features
| Feature | Design Value |
|---|---|
| Integrated bias network | R1 = 47 kΩ, R2 = 10 kΩ - reduces BOM count by eliminating two discrete resistors per channel. |
| Logic-compatible input | VI(on) = −3.8 V typical - ensures clean turn-on with standard 3.3 V or 5 V CMOS/TTL outputs. |
| Low saturation voltage | VCE(sat) ≤ −150 mV - limits conduction loss to <1.5 mW at 10 mA, improving efficiency in battery-powered systems. |
| Thermal robustness | Rth(j-a) = 500 K/W - enables stable operation up to +85 °C ambient without derating in typical PCB layouts. |
| ESD tolerance | Human Body Model (HBM) ≥2 kV - provides basic handling protection during assembly without additional clamping. |
Applications
| LED Driver Circuit | Microcontroller GPIO Expander |
|---|---|
Use Scenario: Driving multiple indicator LEDs from a 3.3 V microcontroller with limited GPIO current capability. IC Role / Device Role / Timing Role: Acts as a low-side switch that translates logic-high signal into LED sink current path. Use Value: Eliminates need for external base resistor and pull-down; reduces layout area and assembly cost per LED channel. |
Use Scenario: Extending digital output capability of an MCU with only 12 GPIOs to drive 24 peripheral enable lines. IC Role / Device Role / Timing Role: Functions as a non-inverting buffer amplifier with built-in biasing for parallel fan-out. Use Value: Enables direct connection to MCU pins without logic-level translation or current buffering ICs. |
| Inverter Stage | Power Supply Enable Control |
Use Scenario: Building a simple active-low to active-high signal inverter in a space-constrained power management subsystem. IC Role / Device Role / Timing Role: Provides complementary logic inversion with defined threshold via internal R1/R2 divider. Use Value: Achieves clean edge transition and noise immunity without external feedback or hysteresis components. |
Use Scenario: Enabling/disabling a 12 V DC-DC converter based on a 3.3 V system controller's enable signal. IC Role / Device Role / Timing Role: Serves as a level-shifted, current-amplified enable switch controlling the converter's EN pin. Use Value: Delivers sufficient sink current (>5 mA) to meet converter EN pin requirements while maintaining logic compatibility. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar PNP resistor-equipped transistor applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| PDTC144VK | NPN complement; identical SOT346 package, same R1/R2 values, but opposite polarity and current direction. | Requires inverted logic drive and load sourcing instead of sinking; not interchangeable without circuit redesign. | Select when NPN topology matches existing driver architecture or when sourcing load current is preferred. |
| PDTA143VK | R1 = 47 kΩ, R2 = 47 kΩ (R2/R1 = 1.0); higher base current, lower input impedance, VI(on) ≈ −2.0 V. | Less noise-immune turn-on threshold; better suited for low-voltage logic (1.8 V) but less tolerant of floating inputs. | Choose for applications requiring stronger base drive or compatibility with sub-3 V logic families. |
Compared with PDTC144VK, PDTA144VK provides complementary PNP functionality essential for high-side switching or inverting stages, while PDTA143VK offers higher base current for improved drive strength at the expense of reduced noise margin - making each suitable for distinct logic interface strategies.
Availability
PDTA144VK is available at Aetrix Electronics and suitable for LED driver circuits, microcontroller GPIO expansion, inverter stages, and power supply enable control requiring stable component supply and long-term industrial availability.
Supply support for PDTA144VK includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Nexperia is a global leader in discrete, logic, and PowerMOS semiconductors, formed in 2017 from the former NXP Standard Products business. It focuses on automotive, industrial, computing, consumer, and wearable markets.
The PDTA144VK belongs to Nexperia's resistor-equipped transistor (RET) family, engineered specifically for reducing component count and simplifying digital interface design in space- and cost-sensitive applications.
FAQ
What is the package type and lead count of PDTA144VK?
The PDTA144VK uses the SOT346 (SC-59A/TO-236) plastic surface-mounted package with three leads. Its compact 3.0 × 1.4 × 1.0 mm outline supports high-density PCB layouts and standard reflow soldering processes. This package is explicitly confirmed in Table 4 of the official Nexperia datasheet for PDTA144VK.
Does PDTA144VK require external bias resistors?
No, PDTA144VK does not require external bias resistors. It integrates R1 = 47 kΩ and R2 = 10 kΩ internally, forming a complete PNP transistor with built-in base biasing. This eliminates the need for discrete resistors in typical switching applications, as stated in Section 1.1 and Table 2 of the PDTA144V series datasheet.
What is the maximum collector-emitter voltage rating for PDTA144VK?
The maximum collector-emitter voltage (VCEO) for PDTA144VK is −50 V under open-base conditions, as specified in Table 6 (Limiting Values) of the datasheet. This rating applies across the full operating temperature range and defines the absolute maximum reverse bias the device can withstand without breakdown.
Can PDTA144VK be used with 3.3 V logic inputs?
Yes, PDTA144VK is compatible with 3.3 V logic inputs. Its typical on-state input voltage (VI(on)) is −3.8 V, and off-state input voltage (VI(off)) is −3.1 V, ensuring reliable turn-on and turn-off with standard 3.3 V CMOS outputs. This behavior is confirmed in Table 8 (Characteristics) of the datasheet.
What is the thermal resistance from junction to ambient for PDTA144VK?
The thermal resistance from junction to ambient (Rth(j-a)) for PDTA144VK in the SOT346 package is 500 K/W under standard mounting conditions in free air, as listed in Table 7 of the datasheet. This value assumes a typical FR4 PCB layout and guides thermal design for continuous operation up to +85 °C ambient.
PDTA144VK,115 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Series:
- -
- Package/Case:
- TO-236-3, SC-59, SOT-23-3
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Transistor Type:
- PNP - Pre-Biased
- Current - Collector (Ic) (Max):
- 100 mA
- Voltage - Collector Emitter Breakdown (Max):
- 50 V
- Resistor - Base (R1):
- 47 kOhms
- Resistor - Emitter Base (R2):
- 10 kOhms
- DC Current Gain (hFE) (Min) @ Ic, Vce:
- 40 @ 5mA, 5V
- Vce Saturation (Max) @ Ib, Ic:
- 150mV @ 500µA, 10mA
- Current - Collector Cutoff (Max):
- 1µA
- Frequency - Transition:
- -
- Power - Max:
- 250 mW
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- SMT3; MPAK
PDTA144VK,115 FAQ
1.How can I place an order for PDTA144VK,115 through Aetrix?
Please submit a Request for Quotation (RFQ) for PDTA144VK,115 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for PDTA144VK,115 reliable?
The price and inventory of PDTA144VK,115 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PDTA144VK,115 is usually 5 days.
3.What payment methods are accepted for PDTA144VK,115?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PDTA144VK,115 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for PDTA144VK,115?
PDTA144VK,115 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your PDTA144VK,115 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for PDTA144VK,115?
For technical support, including PDTA144VK,115 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PDTA144VK,115 requirements.
6.How does Aetrix verify that PDTA144VK,115 is sourced from the original manufacturer or authorized distributors?
All PDTA144VK,115 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PDTA144VK,115 meets industry standards.
7.What is the process for return or replacement of PDTA144VK,115?
All PDTA144VK,115 units undergo pre-shipment inspection (PSI). If there is an issue with PDTA144VK,115, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The PDTA144VK,115 part is unused and in its original packaging.
Return procedure for PDTA144VK,115:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
PDTA144VK,115 Tags

-
MUN5211T1G
onsemi

-
DTC043ZEBTL
Rohm Semiconductor

-
DTC114EKAT146
Rohm Semiconductor

-
DDTD113ZC-7-F
Diodes Incorporated

-
DRDNB16W-7
Diodes Incorporated

-
PDTC114ET,215
Nexperia USA Inc.

-
PDTC143ZT,215
Nexperia USA Inc.

-
PDTC143ET,215
Nexperia USA Inc.

-
PDTC143XT,215
Nexperia USA Inc.

-
MMUN2211LT1G
onsemi

-
PDTC144ET,215
Nexperia USA Inc.

-
PDTC124ET,215
Nexperia USA Inc.
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
