Nexperia USA Inc. PDTB113EQAZ

Overview

PDTB113EQAZ from Nexperia is a PNP resistor-equipped transistor (RET) in a DFN1010D-3 (SOT1215) package, designed for digital switching and IC input control. It features 50 V V_CEO, −500 mA output current, built-in 1 kΩ/1 kΩ bias resistors, ±10% R2/R1 tolerance, and AEC-Q101 qualification for automotive use.

For engineers reviewing the PDTB113EQAZ datasheet, PDTB113EQAZ pinout, PDTB113EQAZ application, or PDTB113EQAZ equivalent, this device serves as a space-optimized, AOI-compatible replacement for BC807-series transistors in low-voltage logic interface and load switching circuits where reduced component count and simplified PCB layout are critical.

Technical Context

This RET integrates a PNP bipolar transistor with two precision-matched on-die bias resistors (R1 = R2 = 1 kΩ), enabling direct logic-level drive without external base resistors. Its ultra-thin 0.37 mm profile and side-wettable flanks support high-density routing and automated optical inspection.

The device operates with V_CE = −5 V at I_C = −50 mA for h_FE ≥ 33, delivers V_CE(sat) ≤ −100 mV at I_C = −50 mA/I_B = −2.5 mA, and maintains stable off-state behavior with V_I(off) ≤ −1.5 V at I_C = −100 µA - all under ambient temperatures from −55 °C to +150 °C.

Key Specifications

Pinout & Package

DFN1010D-3 (SOT1215) is a 3-terminal, leadless, thermally enhanced ultra-thin plastic package with side-wettable flanks for AOI compatibility and improved thermal dissipation (R_th(j-sp) = 40 K/W).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar PNP resistor-equipped transistor applications.

Compared with PDTB123EQAZ, PDTB113EQAZ offers faster switching and lower input threshold for 3.3 V logic compatibility; compared with BC807-40, it reduces PCB area by 65% and eliminates two passives while adding automotive qualification and AOI support.

Availability

PDTB113EQAZ is available at Aetrix Electronics and suitable for automotive lighting control, industrial PLC input conditioning, and consumer appliance power sequencing requiring stable component supply, AEC-Q101 compliance, and ultra-small footprint.

Supply support for PDTB113EQAZ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Nexperia is a global semiconductor expert focused on essential efficiency technologies, delivering high-performance, reliable discrete, logic, and MOSFET solutions for automotive, industrial, and mobile markets.

PDTB113EQAZ belongs to Nexperia's resistor-equipped transistor (RET) product line, engineered specifically to replace discrete BJT + resistor combinations in digital interface and load-switching applications where miniaturization and manufacturability are critical.

FAQ

What is the maximum continuous collector current for PDTB113EQAZ?

The maximum continuous collector current is −500 mA, validated under FR4 PCB conditions with 4-layer copper and 1 cm² collector pad (P_tot = 940 mW). Derating applies above 25 °C ambient: linear reduction to zero at 150 °C junction temperature per IEC 60134 limiting values.

Can PDTB113EQAZ be used with 3.3 V microcontroller GPIOs?

Yes. Its VI(on) range is −1.0 V to −1.8 V at I_C = −20 mA, ensuring reliable turn-on with standard 3.3 V CMOS outputs. VI(off) ≤ −1.5 V guarantees full cutoff even with 3.3 V logic high, preventing partial conduction in noise-prone environments.

How does the dual-collector configuration (pins 3 and 4) affect PCB layout?

Pins 3 and 4 are internally shorted collector terminals. Layout requires connecting both to the same net - typically a large copper pour - to maximize current capacity and thermal dissipation. This configuration lowers effective R_th(j-a) by up to 30% versus single-pad equivalents on identical PCBs.

Is reflow soldering supported for the DFN1010D-3 package?

Yes. The DFN1010D-3 package is qualified for standard lead-free reflow profiles (J-STD-020). Nexperia provides a verified footprint with 0.35 mm solder lands (2×), 0.45 mm solder resist openings (2×), and 0.5 mm solder paste stencil apertures to ensure robust side-wettable flank wetting and void-free joints.