Nexperia USA Inc. PDTB113ET,215

Overview

PDTB113ET from Nexperia is a 50 V, 500 mA PNP resistor-equipped transistor (RET) in SOT23 package, integrating R1 = 1 kΩ and R2 = 1 kΩ bias resistors with ±10 % ratio tolerance. It functions as a digital switch for load control and IC input driving in automotive and industrial systems, delivering guaranteed -500 mA output current and -0.3 V V_CE(sat) at -50 mA / -2.5 mA drive.

For engineers reviewing the PDTB113ET datasheet, PDTB113ET pinout, PDTB113ET application, or PDTB113ET equivalent, this AEC-Q101-qualified discrete device supports robust digital switching where simplified biasing, reduced component count, and thermal reliability up to 150 °C junction temperature are critical selection criteria.

Technical Context

This PNP RET integrates two precision-matched on-die resistors (R1 = 1 kΩ, R2/R1 = 1.0 ±0.1) to eliminate external base bias components and ensure stable turn-on/turn-off behavior across -40 °C to +100 °C ambient. Its fixed resistor topology enables predictable VI(on) (-1.0 to -1.8 V) and VI(off) (-0.6 to -1.5 V) thresholds under defined V_CE conditions.

The device operates within absolute maximum ratings of V_CBO = -50 V, V_CEO = -50 V, and P_tot = 250 mW (FR4 PCB), with thermal resistance R_th(j-a) = 500 K/W. Its h_FE ≥33 at -50 mA ensures sufficient DC gain for saturated switching without external feedback.

Key Specifications

Pinout & Package

Package: SOT23 plastic surface-mount package (2.9 mm × 1.3 mm × 1.0 mm body, 1.9 mm lead pitch), optimized for automated placement and reflow soldering on FR4 PCBs.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar PNP resistor-equipped transistor applications.

Compared with PDTB123ET and BC807-40, the PDTB113ET uniquely balances 500 mA drive, AEC-Q101 compliance, and matched internal biasing-making it optimal for production automotive and industrial digital outputs where BOM reduction and qualification assurance are mandatory.

Availability

PDTB113ET is available at Aetrix Electronics and suitable for automotive body control modules, industrial PLC digital outputs, and smart building HVAC actuator circuits requiring stable component supply, long-term lifecycle support, and traceable sourcing.

Supply support for PDTB113ET includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Nexperia is a global semiconductor expert focused on essential efficiency technologies, delivering high-performance, reliable discrete, logic, and MOSFET solutions for automotive, industrial, and consumer markets.

The PDTB113ET belongs to Nexperia's Resistor-Equipped Transistor (RET) product line, engineered specifically to replace traditional BJT + resistor combinations in cost-sensitive, space-constrained digital switching applications with AEC-Q101-grade reliability.

FAQ

What is the maximum continuous collector current for PDTB113ET?

The PDTB113ET is rated for -500 mA continuous output current under specified thermal conditions (T_amb ≤ 25 °C, FR4 PCB). Derating is required above 25 °C ambient per the thermal resistance R_th(j-a) = 500 K/W; at 85 °C ambient, maximum sustainable current drops to approximately -300 mA to maintain T_j ≤ 150 °C.

Can PDTB113ET be used as a direct replacement for BC807-40 in existing designs?

No-PDTB113ET is not a drop-in replacement for BC807-40 due to fundamental differences: it integrates R1 and R2 bias resistors, uses different pinning (input-ground-output vs. emitter-base-collector), and has fixed gain characteristics. Layout and drive circuit changes are required to accommodate its RET topology and SOT23 pin 1 = input configuration.

What does the marking "%7U" indicate on the physical device?

The marking "%7U" on the PDTB113ET package consists of a placeholder "%" for the manufacturing site code, followed by "7U" as the unique device identifier per Nexperia's marking convention. This code corresponds directly to the PDTB113ET type number and confirms full compliance with the 2026 revision of the official product data sheet.

Is thermal performance affected by PCB layout, and what is the recommended footprint?

Yes-thermal performance depends critically on PCB copper area. The datasheet specifies R_th(j-a) = 500 K/W assumes a standard FR4 board with single-sided 1 oz copper, tin-plated, and the recommended reflow footprint (SOT23_FR) shown in Figure 6. Using larger copper pours or thermal vias can reduce R_th(j-a) by up to 30 %, improving current handling at elevated temperatures.