Nexperia USA Inc. PDTB114EUX

Overview

PDTB114EUX from Nexperia is a 500 mA, 50 V PNP resistor-equipped transistor (RET) in SOT323 (SC-70) package, featuring integrated 10 kΩ input bias resistor (R1) and 10 kΩ base-emitter resistor (R2) with ±10% ratio tolerance. It delivers −100 mV V_CE(sat) at −50 mA/−2.5 mA drive, supports −50 V V_CEO, and operates up to 175 °C ambient - used for high-reliability digital switching in automotive body control modules.

For engineers reviewing the PDTB114EUX datasheet, PDTB114EUX pinout, PDTB114EUX application, or PDTB114EUX equivalent, this page provides verified pin functions, thermal derating curves, AEC-Q101 qualification status, R1/R2 resistor values, and direct alternatives to BC807/BC817 series in space-constrained logic interface designs.

Technical Context

This PNP RET integrates two precision thin-film resistors (R1 = 10 kΩ, R2 = 10 kΩ) directly on-die to form a monolithic bias network, eliminating external components while maintaining 0.9–1.1 R2/R1 ratio tolerance. Its −50 V V_CEO and −500 mA I_O rating support robust load switching in 12 V/24 V automotive subsystems.

The device achieves 70 minimum h_FE at −50 mA/−5 V, −100 mV V_CE(sat) under standard drive, and 140 MHz f_T - enabling fast digital switching with low power loss. Built-in ESD protection and AEC-Q101 qualification confirm suitability for under-hood applications requiring operation from −55 °C to +175 °C.

Key Specifications

Pinout & Package

SOT323 (SC-70) plastic surface-mounted package: 1.35 mm × 1.15 mm × 0.45 mm body, 3-lead, single-row configuration with gull-wing leads. JEITA code SC-70; JEDEC code SOT323.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar PNP resistor-equipped transistor applications.

Compared with PDTB114ZU, PDTB114EUX offers tighter R2/R1 matching (±10% vs. ±15%) and lower VI(on) threshold, enabling faster turn-on in noisy environments; versus BC807-40, it reduces bill-of-materials count and guarantees automotive-grade reliability without design overhead.

Availability

PDTB114EUX is available at Aetrix Electronics and suitable for automotive body electronics, industrial PLC output stages, consumer appliance motor control, and medical diagnostic equipment interfaces requiring stable component supply and long-term lifecycle support.

Supply support for PDTB114EUX includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Nexperia is a global semiconductor expert focused on essential efficiency technologies, delivering high-performance, high-reliability discrete and logic devices for automotive, industrial, and consumer markets.

PDTB114EUX belongs to the PDTB1xxxU series of AEC-Q101-qualified PNP RETs designed specifically for space-constrained, high-temperature digital switching in automotive and industrial control systems.

FAQ

What is the maximum allowable input voltage (VI) for PDTB114EUX?

The absolute maximum input voltage is −50 V (VI) and +10 V, per Table 6. This wide range accommodates transient overvoltage events in automotive 12 V systems, including load dump spikes. Operation within −1.5 V to −3.0 V ensures reliable turn-on, while staying above −0.6 V prevents unintended activation.

How does PDTB114EUX handle thermal stress in enclosed enclosures?

With R_th(j-a) = 353 K/W on 4-layer FR4 PCB (Table 7), PDTB114EUX dissipates up to 425 mW at 25 °C ambient. At 100 °C ambient, derated power drops to ~250 mW. Its 175 °C T_j(max) and −55 °C to +175 °C T_amb rating allow full functionality in sealed, non-ventilated housings typical in automotive junction boxes.

Can PDTB114EUX replace BC807-40 in existing designs without layout changes?

No - PDTB114EUX uses SOT323 (SC-70), while BC807-40 uses SOT23. The SOT323 footprint is smaller (1.35 × 1.15 mm vs. 2.9 × 1.3 mm) and has different lead pitch (0.65 mm vs. 0.95 mm). A PCB redesign is required; however, the integrated resistors eliminate two 0402/0603 passives, offsetting layout effort with BOM simplification.

Is the R2/R1 ratio guaranteed across temperature and voltage?

Yes - the R2/R1 ratio is specified as 0.9 to 1.1 (±10%) over full operating conditions (Table 8), measured at Tamb = 25 °C. Characterization data (Figs 46–49) confirms stable VI(on)/VI(off) behavior from −40 °C to +100 °C, ensuring consistent switching thresholds in thermal cycling environments.