Nexperia USA Inc. PDTB143ETR

Overview

PDTB143ETR from Nexperia is a PNP resistor-equipped transistor (RET) in SOT23 (TO-236AB) package, designed for digital switching applications with built-in 4.7 kΩ input and 4.7 kΩ base-emitter bias resistors, −50 V V_CEO, −500 mA I_O, and AEC-Q101 qualification for automotive use.

For engineers reviewing the PDTB143ETR datasheet, PDTB143ETR pinout, PDTB143ETR application, or PDTB143ETR equivalent, this device serves as a simplified, high-temperature (up to 175 °C), low-component-count alternative to discrete BJT + resistor networks in logic-level load switching and IC-driven control circuits.

Technical Context

This PNP RET integrates two precision-matched on-chip resistors (R1 = R2 = 4.7 kΩ ±10 %) to enable direct connection to CMOS/TTL outputs without external biasing. Its internal transistor delivers h_FE ≥ 60 at I_C = −50 mA and V_CE = −5 V, with V_CE(sat) ≤ −100 mV under same conditions.

Rated for −50 V collector-emitter voltage and −500 mA output current, it operates across −55 °C to +175 °C ambient, meeting AEC-Q101 stress test requirements for automotive under-hood and powertrain control modules.

Key Specifications

Pinout & Package

Package: SOT23 (TO-236AB), 3-lead surface-mount plastic package with 1.9 mm × 1.1 mm footprint and 0.95 mm height; optimized for reflow and wave soldering per IPC-7351.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar PNP resistor-equipped transistor applications.

Compared with PDTB143XT, PDTB143ETR offers symmetrical biasing ideal for TTL/CMOS-compatible switching, while BC807-40 lacks integrated resistors and automotive qualification-making PDTB143ETR the optimal choice for new AEC-Q101-compliant designs requiring minimal external components.

Availability

PDTB143ETR is available at Aetrix Electronics and suitable for automotive body electronics, industrial programmable logic controllers, and LED lighting control systems requiring stable component supply and long-term lifecycle support.

Supply support for PDTB143ETR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Nexperia is a global semiconductor expert focused on high-volume, high-reliability discrete and logic devices, with leadership in automotive-qualified components and energy-efficient solutions.

The PDTB1xxxT series targets cost-sensitive, space-constrained digital switching applications where integration, qualification, and thermal robustness are critical-especially in automotive and industrial control.

FAQ

What is the maximum allowable input voltage applied to Pin 1 of PDTB143ETR?

The absolute maximum input voltage (V_I) at Pin 1 is −30 V to +10 V, as specified in Table 5 of the datasheet. Exceeding +10 V risks forward-biasing the internal base-emitter junction beyond safe limits, while voltages below −30 V may overstress the R1 resistor or cause avalanche breakdown.

Can PDTB143ETR replace a standard PNP transistor like BC807 in existing designs?

Yes, but only with circuit modification: PDTB143ETR's integrated R1/R2 network means its Pin 1 must connect directly to the logic source-no external base resistor is needed. Removing the discrete resistor and verifying V_CE(sat) and switching speed under load ensures functional equivalence.

Is thermal derating required when operating PDTB143ETR at 100 °C ambient temperature?

Yes. At T_amb = 100 °C, total power dissipation must be reduced from 320 mW (25 °C) to approximately 160 mW, per Figure 1's derating curve. This corresponds to limiting I_C to ~−350 mA at V_CE(sat) ≈ −100 mV to maintain T_j ≤ 175 °C.

Does PDTB143ETR support PWM switching at frequencies above 10 kHz?

Yes. With f_T = 140 MHz and typical switching times < 1 µs (t_on/t_off), PDTB143ETR supports clean PWM operation up to at least 100 kHz. Layout-dependent parasitic inductance and load capacitance remain the primary limiting factors-not device bandwidth.