NXP Semiconductors PDTC114EK,135
- Part No.:
- PDTC114EK,135
- Manufacturer:
- NXP Semiconductors
- Category:
- Single, Pre-Biased Bipolar Transistors
- Package:
- TO-236-3, SC-59, SOT-23-3
- Datasheet:
-
PDTC114EK,135.pdf
- Description:
- TRANS PREBIAS NPN 50V 0.1A SMT3
- Quantity:
- Payment:

- Shipping:

Inventory:7,025
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
PDTC114EK,135 from Nexperia (formerly Philips Semiconductors) is an NPN resistor-equipped transistor with integrated 47 kΩ base bias resistors (R1 and R2), rated for 50 V VCEO, 100 mA IO, and optimized for general-purpose switching in compact SOT346 (SC-59) surface-mount packages. It simplifies BJT-based logic interface and level-shifting circuits by eliminating external bias components.
For engineers reviewing the PDTC114EK,135 datasheet, PDTC114EK,135 pinout, PDTC114EK,135 application, or PDTC114EK,135 equivalent, key selection criteria include its built-in resistor ratio (R1/R2 = 1), guaranteed VCE(sat) ≤ 150 mV at IC = 10 mA / IB = 0.5 mA, input-off voltage Vi(off) ≥ 1.2 V, and thermal resistance Rth(j-a) = 500 K/W in free air - all critical for reliable low-power digital switching.
Technical Context
This device integrates two precision 47 kΩ resistors (R1 between base and input, R2 between base and emitter) to form a single-chip solution for digitally driven NPN switching. Its fixed resistor ratio ensures consistent turn-on/turn-off thresholds across temperature and process variation.
Designed for DC-coupled logic interfacing, it operates with input voltages up to +40 V and supports output currents up to 100 mA while maintaining saturation voltage below 150 mV - enabling direct replacement of discrete BJT + resistor networks in space-constrained PCB layouts.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VCEO | 50 V maximum - supports rail-to-rail switching in 3.3 V, 5 V, and 12 V logic systems without breakdown risk. |
| IO (DC) | 100 mA maximum - sufficient to drive LEDs, small relays, MOSFET gates, or TTL/CMOS inputs directly. |
| R1 / R2 | 47 kΩ ±28% - tightly matched internal bias network eliminates need for external resistors and reduces BOM count. |
| VCE(sat) | ≤150 mV at IC=10 mA, IB=0.5 mA - minimizes power loss and heat generation during active conduction. |
| Vi(off) | ≥1.2 V - ensures reliable cutoff when driving from 1.8 V or 3.3 V microcontroller GPIOs with noise margin. |
| hFE | ≥80 at VCE=5 V, IC=5 mA - provides stable current gain for predictable switching behavior under typical bias conditions. |
Pinout & Package
PDTC114EK,135 is housed in a plastic surface-mounted SOT346 (SC-59) package measuring 3.1 × 1.7 × 1.3 mm (L × W × H), with gull-wing leads and standard JEDEC-compliant footprint.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | Base | Internal connection to both R1 (input) and R2 (emitter feedback); no external base access - only input and output terminals exposed. |
| 2 | Emitter | Common reference node for R2 and collector current return path; tied to system ground or low-side reference in switch configurations. |
| 3 | Collector | Main switched output terminal; connects to load (e.g., LED anode, relay coil, or pull-up rail) in low-side switching topology. |
Key Features
| Feature | Design Value |
|---|---|
| Built-in bias resistors | Eliminates 2 external resistors per switch, reducing PCB area and assembly cost in high-channel-count interfaces. |
| Guaranteed resistor ratio | R1/R2 = 1.0 ±20% ensures predictable input threshold and stable saturation characteristics across production lots. |
| Low saturation voltage | VCE(sat) ≤ 150 mV enables <15 mW dissipation at 100 mA - suitable for thermally constrained modules and battery-powered devices. |
| Input voltage range | −10 V to +40 V allows safe operation with negative transients and compatibility with industrial 24 V control signals. |
Applications
| LED Driver Circuit | Microcontroller GPIO Expander |
|---|---|
Use Scenario: Driving multiple indicator LEDs from a 3.3 V MCU with limited GPIO current capability. IC Role / Device Role / Timing Role: Low-side switch that translates logic-high signal into LED current path closure. Use Value: Built-in 47 kΩ resistors enable direct connection to MCU pins without external biasing, reducing component count by 2 per channel and saving >0.5 mm² PCB area per instance. | Use Scenario: Adding digital output capability to an embedded system with exhausted GPIO resources. IC Role / Device Role / Timing Role: Digital buffer/switch translating MCU logic levels to higher-current loads (e.g., solenoids, fans). Use Value: 100 mA output rating and 150 mV VCE(sat) allow direct drive of 12 V/100 mA loads with <15 mW self-heating - avoiding need for discrete BJT + resistor stages. |
| Logic Level Shifter | Inverter for Digital Signals |
Use Scenario: Interfacing 1.8 V FPGA I/O to 5 V peripheral logic without level-shifting ICs. IC Role / Device Role / Timing Role: Active-low translator where FPGA output drives PDTC114EK,135 input and 5 V rail powers the collector load. Use Value: Vi(off) ≥ 1.2 V ensures clean cutoff at 1.8 V logic low, while Vi(on) ≤ 1.6 V guarantees turn-on at 1.8 V logic high - enabling robust rail-to-rail translation. | Use Scenario: Generating inverted logic signals in sensor interface or clock conditioning circuits. IC Role / Device Role / Timing Role: Single-transistor inverter with fixed bias network providing defined switching threshold. Use Value: Matched R1/R2 values yield symmetric input hysteresis-free inversion with propagation delay <50 ns - suitable for non-critical timing paths up to 1 MHz. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar NPN resistor-equipped transistor applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| PDTC114YK,115 | R1 = 10 kΩ, R2 = 10 kΩ - lower input impedance, faster switching but higher input current draw. | Better suited for high-speed digital buffers (>5 MHz), less ideal for battery-powered low-IIN designs. | Select PDTC114YK,115 when driving from strong-sourcing logic families (e.g., 74HC) and speed >1 MHz is required. |
| MMBT3904LT1G | No built-in resistors - requires external RB and RE; hFE = 100–300, VCE(sat) = 200–300 mV at same bias. | Greater design flexibility but increases BOM count, layout complexity, and calibration effort for consistent switching thresholds. | Choose MMBT3904LT1G only when precise hFE tuning or variable bias ratios are needed - not for drop-in replacement. |
Compared with PDTC114YK,115, PDTC114EK,135 offers higher input impedance and lower static power consumption; versus MMBT3904LT1G, it delivers guaranteed resistor matching and reduced layout overhead - making it optimal for cost-sensitive, high-volume digital interface applications where consistency and simplicity are prioritized over tunability.
Availability
PDTC114EK,135 is available at Aetrix Electronics and suitable for LED driver circuits, microcontroller GPIO expansion, logic level shifting, and digital inverter applications requiring stable component supply and long-term manufacturability.
Supply support for PDTC114EK,135 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Nexperia is a global semiconductor expert delivering high-performance, reliable discrete, logic, and MOSFET solutions - spun off from Philips Semiconductors in 2017 with full IP and manufacturing continuity.
The PDTC114EK,135 belongs to Nexperia's resistor-equipped transistor (RET) product line, engineered specifically to replace discrete BJT-resistor combinations in digital interface, switching, and signal conditioning applications - emphasizing space savings, assembly efficiency, and parametric consistency.
FAQ
What is the exact pin configuration of PDTC114EK,135?
PDTC114EK,135 uses the SOT346 package with pin 1 = Base (internally connected to R1 and R2), pin 2 = Emitter, and pin 3 = Collector. This configuration is confirmed in the Philips/Nexperia datasheet "Simplified outline, symbol and pinning" section and matches the SC-59 mechanical standard. No alternate pinouts exist for this specific type number.
Does PDTC114EK,135 support 5 V logic-level input directly?
Yes, PDTC114EK,135 supports 5 V logic-level input directly: its Vi(on) is specified at ≤1.6 V (typical) and Vi(off) ≥1.2 V, ensuring reliable turn-on with 5 V CMOS/TTL outputs while maintaining noise immunity. The input voltage rating extends to +40 V, so 5 V operation falls well within safe limits.
Can PDTC114EK,135 replace a standard 2N3904 with external resistors?
Yes, PDTC114EK,135 can replace a 2N3904 plus two 47 kΩ resistors in low-speed switching applications. Its integrated R1/R2 network matches the typical bias configuration, and its 100 mA IO and 50 V VCEO ratings meet or exceed 2N3904 specifications. However, hFE is guaranteed minimum 80 (vs. 2N3904's 100–300), so verify gain margin in linear-mode use.
What is the thermal resistance of PDTC114EK,135 in free air?
The thermal resistance from junction to ambient (Rth(j-a)) for PDTC114EK,135 in free air is 500 K/W, as specified for the SOT346 package in the "Thermal Characteristics" table. This value assumes standard mounting on FR4 PCB with minimal copper pour - derating is required above 25 °C ambient or with reduced copper area.
Is PDTC114EK,135 RoHS compliant and lead-free?
Yes, PDTC114EK,135 is RoHS compliant and lead-free. As a Nexperia product manufactured post-2006, it conforms to EU RoHS Directive 2011/65/EU and uses lead-free solderable terminations. The "135" suffix denotes tape-and-reel packaging compatible with standard SMT reflow profiles, including Pb-free JEDEC J-STD-020 requirements.
PDTC114EK,135 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Series:
- -
- Package/Case:
- TO-236-3, SC-59, SOT-23-3
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Transistor Type:
- NPN - Pre-Biased
- Current - Collector (Ic) (Max):
- 100 mA
- Voltage - Collector Emitter Breakdown (Max):
- 50 V
- Resistor - Base (R1):
- 10 kOhms
- Resistor - Emitter Base (R2):
- 10 kOhms
- DC Current Gain (hFE) (Min) @ Ic, Vce:
- 30 @ 5mA, 5V
- Vce Saturation (Max) @ Ib, Ic:
- 150mV @ 500µA, 10mA
- Current - Collector Cutoff (Max):
- 1µA
- Frequency - Transition:
- -
- Power - Max:
- 250 mW
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- SMT3; MPAK
PDTC114EK,135 FAQ
1.How can I place an order for PDTC114EK,135 through Aetrix?
Please submit a Request for Quotation (RFQ) for PDTC114EK,135 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for PDTC114EK,135 reliable?
The price and inventory of PDTC114EK,135 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PDTC114EK,135 is usually 5 days.
3.What payment methods are accepted for PDTC114EK,135?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PDTC114EK,135 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for PDTC114EK,135?
PDTC114EK,135 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your PDTC114EK,135 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for PDTC114EK,135?
For technical support, including PDTC114EK,135 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PDTC114EK,135 requirements.
6.How does Aetrix verify that PDTC114EK,135 is sourced from the original manufacturer or authorized distributors?
All PDTC114EK,135 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PDTC114EK,135 meets industry standards.
7.What is the process for return or replacement of PDTC114EK,135?
All PDTC114EK,135 units undergo pre-shipment inspection (PSI). If there is an issue with PDTC114EK,135, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The PDTC114EK,135 part is unused and in its original packaging.
Return procedure for PDTC114EK,135:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
PDTC114EK,135 Tags

-
MUN5211T1G
onsemi

-
DTC043ZEBTL
Rohm Semiconductor

-
DTC114EKAT146
Rohm Semiconductor

-
DDTD113ZC-7-F
Diodes Incorporated

-
DRDNB16W-7
Diodes Incorporated

-
PDTC114ET,215
Nexperia USA Inc.

-
PDTC143ZT,215
Nexperia USA Inc.

-
PDTC143ET,215
Nexperia USA Inc.

-
PDTC143XT,215
Nexperia USA Inc.

-
MMUN2211LT1G
onsemi

-
PDTC144ET,215
Nexperia USA Inc.

-
PDTC124ET,215
Nexperia USA Inc.
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
