Nexperia USA Inc. PDTC114YQBZ
- Part No.:
- PDTC114YQBZ
- Manufacturer:
- Nexperia USA Inc.
- Category:
- Single, Pre-Biased Bipolar Transistors
- Package:
- 3-XDFN Exposed Pad
- Datasheet:
-
PDTC114YQBZ.pdf
- Description:
- TRANS PREBIAS PNP 50V 0.1A 3DFN
- Quantity:
- Payment:

- Shipping:

Inventory:4,450
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Product details
Overview
PDTC114YQB from Nexperia is a 50 V, 100 mA NPN resistor-equipped transistor (RET) in a DFN1110D-3 (SOT8015) leadless SMD package with side-wettable flanks. It integrates 10 kΩ input bias resistor (R1) and 47 kΩ feedback resistor (R2), delivers 100 mA output current, exhibits 100 mV VCE(sat) at IC = 5 mA / IB = 0.25 mA, and supports digital switching in low-voltage logic interfaces.
For engineers reviewing the PDTC114YQB datasheet, PDTC114YQB pinout, PDTC114YQB application, or PDTC114YQB equivalent, this device serves as a space-optimized, component-count-reducing alternative to discrete BJT + resistor combinations in microcontroller GPIO-driven load switching, level translation, and IC input control circuits.
Technical Context
This RET integrates an NPN transistor with two monolithically embedded silicon resistors: R1 (10 kΩ nominal) connects base to input, and R2 (47 kΩ nominal) connects base to emitter, enabling single-pin biasing and guaranteed turn-off behavior. Its internal structure eliminates external base resistors while maintaining DC current gain (hFE) ≥100 at VCE = 5 V, IC = 10 mA.
The DFN1110D-3 package features side-wettable flanks for automated optical inspection (AOI) of solder joints, 0.48 mm height, and 0.65 mm pitch - optimized for high-density PCB layouts. Thermal resistance Rth(j-a) is 298 K/W on 70 µm FR4 copper, supporting continuous 100 mA operation within ambient limits.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VCEO | 50 V - Maximum collector-emitter voltage before breakdown; enables use in 24 V industrial control rails and 3.3/5 V logic systems with margin. |
| IO | 100 mA - Continuous output current capability; sufficient for driving LEDs, small relays, and logic inputs without external heatsinking. |
| R1 | 10 kΩ (7–13 kΩ range) - Input bias resistor sets base current; simplifies drive circuitry by eliminating external pull-up/pull-down components. |
| R2/R1 | 4.7 (3.7–5.7) - Feedback resistor ratio ensures reliable saturation and fast turn-off; prevents latch-up in noisy environments. |
| VCE(sat) | 100 mV at IC = 5 mA / IB = 0.25 mA - Low saturation voltage minimizes power loss and heat generation during switching. |
| VI(on) | 0.8–1.4 V at VCE = 0.3 V - On-state input voltage threshold compatible with 1.8 V, 3.3 V, and 5 V CMOS/TTL logic families. |
| VI(off) | 0.5–0.7 V at VCE = 5 V - Off-state input voltage ensures robust noise immunity and guaranteed cutoff under typical PCB trace coupling. |
Pinout & Package
PDTC114YQB uses the ultra-small DFN1110D-3 (SOT8015) plastic leadless package measuring 1.1 × 1.0 × 0.48 mm with side-wettable flanks for AOI-compatible reflow soldering.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | Input (base) | Connected internally to R1; accepts logic-level drive signal directly from MCU GPIO or buffer output. |
| 2 | GND (emitter) | Emitter terminal tied to system ground; provides return path for load current and reference for R2 feedback. |
| 3 | Output (collector) | Switched high-side output node; connects to load (e.g., LED anode, relay coil, or IC input) referenced to VCC. |
Key Features
| Feature | Design Value |
|---|---|
| Integrated bias network | Monolithic R1 = 10 kΩ + R2 = 47 kΩ eliminates two external passives, reducing BOM count and layout area by >30% vs discrete BJT solution. |
| Side-wettable flanks | Exposed copper on package edges enables automated optical inspection (AOI) of solder joint integrity - critical for high-reliability consumer and industrial assembly. |
| Low profile | 0.48 mm max height allows placement under connectors or beneath shields in ultra-thin portable and IoT devices. |
| Guaranteed turn-off | R2-to-emitter connection clamps base voltage during signal transitions, preventing unintended conduction from EMI or floating inputs. |
Applications
| Microcontroller GPIO Load Switching | Logic-Level Translation |
|---|---|
Use Scenario: Driving a 20 mA indicator LED or 50 mA solenoid from a 3.3 V STM32 GPIO pin with no external resistors. IC Role / Device Role / Timing Role: Single-transistor switch replacing BC847 + two resistors; provides direct logic-to-load interface with built-in current limiting. Use Value: Reduces PCB footprint by 0.8 mm², eliminates resistor placement error risk, and guarantees VCE(sat) ≤100 mV at 5 mA drive. |
Use Scenario: Converting 1.8 V open-drain I²C signal to 5 V rail for legacy sensor interface. IC Role / Device Role / Timing Role: Level-shifting switch with fast turn-on (ton < 50 ns typical) and sub-µs propagation delay. Use Value: Enables interoperability between mixed-voltage subsystems without dedicated level translators; supports 400 kHz I²C timing. |
| Digital Input Conditioning | Industrial Sensor Interface |
Use Scenario: Debouncing and noise filtering for mechanical push-button inputs feeding FPGA configuration pins. IC Role / Device Role / Timing Role: Schmitt-trigger-like input conditioning via R1/R2 hysteresis; suppresses contact bounce and ESD transients. Use Value: Eliminates need for RC filters and debounce firmware; VI(on)/VI(off) separation >0.3 V ensures clean edge detection. |
Use Scenario: Isolating 24 V proximity sensor outputs to 3.3 V PLC input modules using optocoupler replacement topology. IC Role / Device Role / Timing Role: High-side switch with 50 V VCEO rating and 100 mA surge tolerance for inductive sensor loads. Use Value: Survives 24 V field wiring transients; R2 feedback ensures fail-safe off-state during power brownouts. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar NPN resistor-equipped transistor applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| PDTC123JQB | R1 = 2.2 kΩ, R2 = 47 kΩ, hFE ≥100 at IC = 5 mA - lower input impedance, higher base current demand. | Better suited for 1.8 V logic drive where lower VI(on) (~0.75 V) improves margin, but less tolerant of weak drivers. | Select when driving from low-VOH sources (e.g., older ASICs); verify IB availability exceeds 0.1 mA. |
| BC847B,115 | Discrete NPN BJT (no integrated resistors); requires external 10 kΩ base resistor and 47 kΩ base-emitter resistor. | Offers higher hFE (200–450) and wider VCEO (45 V), but increases component count and layout complexity. | Choose when precise gain control or thermal derating beyond 100 mA is required; accept added design and assembly overhead. |
Compared with PDTC123JQB, PDTC114YQB provides higher input impedance for weaker drivers and better noise immunity; compared with BC847B, it reduces bill-of-materials cost and assembly steps at the expense of minor gain flexibility.
Availability
PDTC114YQB is available at Aetrix Electronics and suitable for industrial control panels, IoT endpoint nodes, and consumer appliance PCBs requiring stable component supply, compact footprint, and AOI-compatible packaging.
Supply support for PDTC114YQB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Nexperia is a global semiconductor expert focused on high-volume, high-reliability standard products including logic, discretes, MOSFETs, and ESD protection devices.
PDTC114YQB belongs to Nexperia's resistor-equipped transistor (RET) product line, engineered specifically to replace discrete BJT-resistor combinations in digital switching applications while improving manufacturability and board density.
FAQ
What is the maximum continuous collector current for PDTC114YQB?
The absolute maximum continuous collector current is 100 mA under standard FR4 PCB conditions (70 µm copper, single-sided). Derating applies above 25 °C ambient: power dissipation drops linearly to zero at 150 °C junction temperature, per the 420 mW Ptot limit and 298 K/W thermal resistance.
Can PDTC114YQB be used with 1.8 V logic inputs?
Yes - its VI(on) is specified at 0.8–1.4 V (typical 1.1 V) with VCE = 0.3 V, providing sufficient margin for 1.8 V CMOS outputs. At IC = 1 mA, the device saturates fully with only 0.25 mA base drive, well within typical 1.8 V GPIO sink capability.
How does the R2 resistor improve reliability in noisy environments?
R2 (47 kΩ) pulls the base to emitter during signal transitions or floating states, ensuring the transistor remains fully off even with induced noise or leakage currents up to 150 µA (IEBO max). This prevents false triggering in industrial settings with EMI or long PCB traces.
Is PDTC114YQB suitable for automotive applications?
No - PDTC114YQB is not AEC-Q101 qualified and lacks automotive-grade screening, temperature range extension (−40 °C to +125 °C), or stress testing. It is rated for −55 °C to +150 °C operation but intended for commercial/industrial use only per Nexperia's non-automotive qualification statement.
PDTC114YQBZ Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Nexperia USA Inc.
- Series:
- -
- Package/Case:
- 3-XDFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Transistor Type:
- PNP - Pre-Biased
- Current - Collector (Ic) (Max):
- 100 mA
- Voltage - Collector Emitter Breakdown (Max):
- 50 V
- Resistor - Base (R1):
- 10 kOhms
- Resistor - Emitter Base (R2):
- 47 kOhms
- DC Current Gain (hFE) (Min) @ Ic, Vce:
- 100 @ 5mA, 5V
- Vce Saturation (Max) @ Ib, Ic:
- 100mV @ 250µA, 5mA
- Current - Collector Cutoff (Max):
- 100nA
- Frequency - Transition:
- 180 MHz
- Power - Max:
- 340 mW
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount, Wettable Flank
- Supplier Device Package:
- DFN1110D-3
PDTC114YQBZ FAQ
1.How can I place an order for PDTC114YQBZ through Aetrix?
Please submit a Request for Quotation (RFQ) for PDTC114YQBZ on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for PDTC114YQBZ reliable?
The price and inventory of PDTC114YQBZ are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PDTC114YQBZ is usually 5 days.
3.What payment methods are accepted for PDTC114YQBZ?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PDTC114YQBZ transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for PDTC114YQBZ?
PDTC114YQBZ orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your PDTC114YQBZ order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for PDTC114YQBZ?
For technical support, including PDTC114YQBZ datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PDTC114YQBZ requirements.
6.How does Aetrix verify that PDTC114YQBZ is sourced from the original manufacturer or authorized distributors?
All PDTC114YQBZ products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PDTC114YQBZ meets industry standards.
7.What is the process for return or replacement of PDTC114YQBZ?
All PDTC114YQBZ units undergo pre-shipment inspection (PSI). If there is an issue with PDTC114YQBZ, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The PDTC114YQBZ part is unused and in its original packaging.
Return procedure for PDTC114YQBZ:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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