NXP Semiconductors PDTC115EK,115
- Part No.:
- PDTC115EK,115
- Manufacturer:
- NXP Semiconductors
- Category:
- Single, Pre-Biased Bipolar Transistors
- Package:
- TO-236-3, SC-59, SOT-23-3
- Datasheet:
-
PDTC115EK,115.pdf
- Description:
- TRANS PREBIAS NPN 50V 0.02A SMT3
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
PDTC115EK,115 from NXP Semiconductors is an NPN resistor-equipped transistor with integrated 100 kΩ base bias resistors (R1 and R2), designed for general-purpose switching in low-current digital interface circuits. It features a VCEO of 50 V, IO (DC) rating of 20 mA, and SOT346 (SC-59) surface-mount package, commonly used in logic-level signal translation and microcontroller GPIO driver stages.
For engineers reviewing the PDTC115EK,115 datasheet, PDTC115EK,115 pinout, PDTC115EK,115 application, or PDTC115EK,115 equivalent, key selection criteria include built-in bias resistor values, collector-emitter saturation voltage under 150 mV at IC = 5 mA / IB = 0.25 mA, thermal resistance (500 K/W), and compatibility with reflow-only soldering per JEDEC standards.
Technical Context
The PDTC115EK,115 integrates two precision 100 kΩ resistors (R1 = base-to-VIN, R2 = base-to-emitter) to eliminate external bias components in saturated-switch configurations. Its internal resistor ratio (R2/R1 = 1.0 ± 0.2) ensures stable turn-on behavior across temperature.
It operates as a single-stage digital switch with VI(OFF) = 0.5 V (max) and VI(ON) = 1.5 V (typ) at defined test conditions, enabling direct interfacing with 3.3 V and 5 V logic families without level-shifting circuitry.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VCEO | 50 V maximum - supports rail-to-rail switching in 24 V industrial control inputs and 5 V/3.3 V logic interfaces |
| IO (DC) | 20 mA maximum - suitable for driving LEDs, small relays, and logic gate inputs without external current limiting |
| R1, R2 | 100 kΩ ±30% - eliminates need for two external bias resistors, reducing BOM count and PCB area |
| VCE(sat) | 150 mV max at IC = 5 mA / IB = 0.25 mA - minimizes power loss and self-heating in high-duty-cycle switching |
| Ptot | 250 mW at Tamb ≤ 25 °C - compatible with standard FR4 PCB layouts using SOT346 footprint |
| hFE | 80 min at VCE = 5 V, IC = 5 mA - ensures reliable saturation with low drive current from MCU outputs |
Pinout & Package
PDTC115EK,115 is housed in a plastic surface-mounted SOT346 (SC-59) package measuring 1.3 mm × 1.0 mm × 0.45 mm, optimized for automated pick-and-place assembly and reflow soldering only.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | Base (via internal R1/R2 network) | Input node connected internally to both bias resistors - accepts logic-level voltage directly without external pull-up/down |
| 2 | Emitter | Common reference terminal tied to ground or low-side return path; forms emitter-follower or low-side switch configuration |
| 3 | Collector | Output node switched to VCC; sinks load current when active, supporting open-collector-style interfacing |
Key Features
| Feature | Design Value |
|---|---|
| Integrated dual-bias resistor network | Reduces component count by two resistors and associated placement steps, lowering manufacturing cost and board space |
| Guaranteed VI(OFF) and VI(ON) | Enables predictable logic-level recognition at 3.3 V and 5 V without external threshold-setting components |
| Reflow-soldering only construction | Ensures mechanical reliability and thermal stability in high-volume SMT production environments |
| Low VCE(sat) with minimal drive current | Permits direct connection to weak-drive microcontroller pins (e.g., 2–4 mA GPIO) while maintaining full saturation |
Applications
| Microcontroller GPIO Driver | Logic-Level Translation |
|---|---|
Use Scenario: Driving a 12 V LED indicator from a 3.3 V ARM Cortex-M0+ GPIO pin with no additional passive components. IC Role / Device Role / Timing Role: Low-side switch providing current sinking capability with integrated biasing. Use Value: Eliminates need for discrete base resistor and reduces layout complexity while maintaining <150 mV saturation drop. | Use Scenario: Converting TTL-compatible output (0–3.6 V swing) to a clean 0–5 V signal for legacy sensor interface. IC Role / Device Role / Timing Role: Digital level shifter operating in saturated mode with fixed input thresholds. Use Value: Provides deterministic VI(ON) = 1.5 V (typ) and VI(OFF) = 0.5 V (max), ensuring noise-immune switching at 50 ns propagation delay. |
| Industrial Input Conditioning | Small-Signal Inverter Stage |
Use Scenario: Isolating and conditioning 24 V PLC digital input signals before feeding into a 3.3 V FPGA I/O bank. IC Role / Device Role / Timing Role: Voltage-clamped, current-limited interface transistor protecting downstream logic. Use Value: Withstands 50 V VCEO and limits input current via internal R1, eliminating external series resistor. | Use Scenario: Building a compact inverter stage in a battery-powered IoT sensor node where PCB area is constrained. IC Role / Device Role / Timing Role: Single-transistor inverting amplifier configured with fixed gain and DC bias. Use Value: Delivers hFE ≥ 80 at 5 mA, enabling stable gain without external bias network or decoupling. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar NPN resistor-equipped transistor applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| PDTC114EK,115 | R1 = 100 kΩ, R2 = 10 kΩ - lower R2 yields higher base current and faster switching | Better suited for higher-speed switching (>1 MHz) and lower VCE(sat) at same IC | Select when faster turn-off and reduced storage time are required over strict 1:1 resistor ratio |
| MMBT3904LT1G | No integrated resistors - requires two external 100 kΩ bias resistors and occupies more PCB area | Offers higher hFE (100 min) and wider VCEO margin (60 V), but increases BOM and layout effort | Choose when design flexibility, higher gain, or legacy compatibility outweighs integration benefits |
Compared with PDTC115EK,115, PDTC114EK,115 provides faster switching due to asymmetric biasing, while MMBT3904LT1G offers greater gain and voltage headroom at the cost of added passives and layout overhead.
Availability
PDTC115EK,115 is available at Aetrix Electronics and suitable for industrial control inputs, microcontroller peripheral drivers, and logic-level translation circuits requiring stable component supply and long-term manufacturability.
Supply support for PDTC115EK,115 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor company headquartered in Eindhoven, Netherlands, specializing in secure connectivity solutions for automotive, industrial, and IoT markets.
The PDTC115EK,115 belongs to NXP's resistor-equipped transistor family, engineered to simplify digital interface design by integrating precision bias networks into miniature SMT packages for cost-sensitive, high-volume applications.
FAQ
What is the exact pin configuration of PDTC115EK,115?
PDTC115EK,115 uses the SOT346 package with Pin 1 = Base (internally connected to R1 and R2), Pin 2 = Emitter, and Pin 3 = Collector. This configuration is confirmed in the "Simplified outline, symbol and pinning" section of the official NXP datasheet dated 2004 Aug 06.
Does PDTC115EK,115 support through-hole mounting?
No, PDTC115EK,115 is exclusively a surface-mount device in the SOT346 (SC-59) package. Through-hole variants exist in the same family (e.g., PDTC115ES in SOT54), but PDTC115EK,115 is not rated for wave or hand soldering and requires reflow-only assembly per NXP's limiting value notes.
What is the maximum junction temperature for PDTC115EK,115?
The maximum junction temperature (Tj) for PDTC115EK,115 is 150 °C, as specified in the Limiting Values table of the NXP product data sheet. This rating applies under standard mounting conditions on FR4 PCB with appropriate copper pour for thermal dissipation.
Can PDTC115EK,115 be used in linear amplification mode?
PDTC115EK,115 is characterized and optimized for switching applications, with guaranteed parameters like VI(OFF), VI(ON), and VCE(sat) defined for saturated operation. While it can function in active mode, its hFE variation and lack of linearity specs make PDTC115EK,115 unsuitable for precision analog amplification.
Is the resistor ratio R2/R1 tightly controlled in PDTC115EK,115?
Yes, the resistor ratio R2/R1 for PDTC115EK,115 is specified as 0.8 to 1.2 (i.e., ±20%) in the Characteristics table, ensuring consistent turn-on behavior across production lots and temperature ranges - a critical parameter for reliable digital switching performance.
PDTC115EK,115 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Series:
- -
- Package/Case:
- TO-236-3, SC-59, SOT-23-3
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Transistor Type:
- NPN - Pre-Biased
- Current - Collector (Ic) (Max):
- 20 mA
- Voltage - Collector Emitter Breakdown (Max):
- 50 V
- Resistor - Base (R1):
- 100 kOhms
- Resistor - Emitter Base (R2):
- 100 kOhms
- DC Current Gain (hFE) (Min) @ Ic, Vce:
- 80 @ 5mA, 5V
- Vce Saturation (Max) @ Ib, Ic:
- 150mV @ 250µA, 5mA
- Current - Collector Cutoff (Max):
- 1µA
- Frequency - Transition:
- -
- Power - Max:
- 250 mW
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- SMT3; MPAK
PDTC115EK,115 FAQ
1.How can I place an order for PDTC115EK,115 through Aetrix?
Please submit a Request for Quotation (RFQ) for PDTC115EK,115 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for PDTC115EK,115 reliable?
The price and inventory of PDTC115EK,115 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PDTC115EK,115 is usually 5 days.
3.What payment methods are accepted for PDTC115EK,115?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PDTC115EK,115 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for PDTC115EK,115?
PDTC115EK,115 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your PDTC115EK,115 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for PDTC115EK,115?
For technical support, including PDTC115EK,115 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PDTC115EK,115 requirements.
6.How does Aetrix verify that PDTC115EK,115 is sourced from the original manufacturer or authorized distributors?
All PDTC115EK,115 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PDTC115EK,115 meets industry standards.
7.What is the process for return or replacement of PDTC115EK,115?
All PDTC115EK,115 units undergo pre-shipment inspection (PSI). If there is an issue with PDTC115EK,115, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The PDTC115EK,115 part is unused and in its original packaging.
Return procedure for PDTC115EK,115:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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