NXP Semiconductors PDTC124EK,115
- Part No.:
- PDTC124EK,115
- Manufacturer:
- NXP Semiconductors
- Category:
- Single, Pre-Biased Bipolar Transistors
- Package:
- TO-236-3, SC-59, SOT-23-3
- Datasheet:
-
PDTC124EK,115.pdf
- Description:
- TRANS PREBIAS NPN 50V 0.1A SMT3
- Quantity:
- Payment:

- Shipping:

Inventory:5,919
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
PDTC124EK,115 from NXP Semiconductors is an NPN resistor-equipped transistor with integrated 22 kΩ base bias resistors (R1 and R2), rated for 50 V VCEO, 100 mA IO, and housed in SOT346 (SC-59) surface-mount package. It functions as a single-chip switch for low-power digital interface and logic-level translation circuits.
For engineers reviewing the PDTC124EK,115 datasheet, PDTC124EK,115 pinout, PDTC124EK,115 application, or PDTC124EK,115 equivalent, key selection criteria include built-in bias network compatibility, SOT346 thermal performance (Rth j-a = 500 K/W), DC current gain (hFE ≥ 60 at 5 mA), and input voltage thresholds (Vi(on) = 1.7 V typ, Vi(off) = 1.1 V typ).
Technical Context
This device integrates two precision 22 kΩ resistors (R1 between base and input, R2 between base and emitter) to form a monolithic digital transistor, eliminating external bias components. Its internal resistor ratio (R2/R1 = 1.0 ± 0.2) ensures stable turn-on/turn-off behavior across temperature.
The PDTC124EK,115 operates as a saturated switch with VCEsat ≤ 150 mV at IC = 10 mA / IB = 0.5 mA and supports input voltage ranges from −10 V to +40 V, enabling robust interfacing with TTL, CMOS, and microcontroller GPIOs without level-shifting circuitry.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VCEO | 50 V maximum - supports switching of 24 V logic and industrial control signals without breakdown. |
| IO (DC) | 100 mA maximum - sufficient for driving LEDs, small relays, and logic buffers directly. |
| R1 / R2 | 22 kΩ ± 30% - provides fixed-current biasing that eliminates discrete resistor selection and layout effort. |
| hFE | ≥ 60 at VCE = 5 V, IC = 5 mA - ensures reliable saturation under typical microcontroller drive conditions. |
| Vi(on) / Vi(off) | 1.7 V / 1.1 V typical - enables clean TTL-compatible switching with noise margin > 0.4 V. |
| Ptot | 250 mW at Tamb ≤ 25 °C - defines power handling in standard FR4 PCB layouts with minimal copper area. |
| Rth j-a | 500 K/W - indicates thermal derating requirement: max 50 °C ambient rise at full 250 mW dissipation. |
Pinout & Package
PDTC124EK,115 is packaged in SOT346 (SC-59), a plastic surface-mounted 3-lead package measuring 3.1 × 1.7 × 1.3 mm (L × W × H), optimized for reflow soldering only.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | Base | Internal connection to R1 (22 kΩ) and R2 (22 kΩ); accepts logic-level input signal. |
| 2 | Emitter | Common emitter node; connects to ground or low-side return path in switching configurations. |
| 3 | Collector | Output terminal; sinks up to 100 mA when saturated; connects to load (e.g., LED anode or relay coil). |
Key Features
| Feature | Design Value |
|---|---|
| Built-in R1/R2 bias network | Eliminates two external resistors, reducing BOM count and PCB footprint by ~2.5 mm² per instance. |
| SOT346 package | Enables high-density placement on compact boards while maintaining 250 mW power capability and 500 K/W thermal resistance. |
| Vi(on) = 1.7 V typ | Guarantees reliable turn-on from 3.3 V microcontrollers without pull-up or level-shifter circuitry. |
| VCEsat ≤ 150 mV | Minimizes conduction loss in low-voltage loads (e.g., 3.3 V LED strings), preserving system efficiency. |
| Input voltage range −10 V to +40 V | Supports direct connection to open-collector outputs, industrial sensors, and transient-prone control lines. |
Applications
| LED Driver Circuit | Microcontroller GPIO Interface |
|---|---|
Use Scenario: Driving 20 mA indicator LEDs from 3.3 V MCU pins with no external bias components. IC Role / Device Role / Timing Role: Single-chip saturated switch replacing discrete BJT + two resistors. Use Value: Reduces component count by 3 parts per channel and eliminates manual resistor matching during assembly. | Use Scenario: Level-shifting and buffering between 5 V legacy peripherals and 3.3 V ARM Cortex-M controllers. IC Role / Device Role / Timing Role: Digital translator with defined Vi(on)/Vi(off) thresholds ensuring noise-immune logic transitions. Use Value: Prevents false triggering due to floating inputs and supports bidirectional signal conditioning without active ICs. |
| Logic Inverter Stage | Low-Power Relay Driver |
Use Scenario: Implementing non-inverting or inverting logic gates in space-constrained embedded systems. IC Role / Device Role / Timing Role: Configurable switch with emitter-follower or common-emitter topology via PCB routing. Use Value: Enables gate count reduction in custom logic blocks without sacrificing propagation delay (< 50 ns typical). | Use Scenario: Activating 5 V, 70 mA coil relays in battery-powered IoT sensor nodes. IC Role / Device Role / Timing Role: Low-quiescent-current driver with fast turn-off (ICEO < 1 μA) minimizing standby drain. Use Value: Extends battery life by limiting leakage current to sub-microamp levels when de-energized. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar NPN resistor-equipped transistor applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| PDTC114EK,115 | R1 = 10 kΩ, R2 = 10 kΩ - higher base current, lower Vi(on) (1.4 V typ). | Better suited for 1.8 V logic families; less margin for noisy 3.3 V environments. | Select when driving from ultra-low-voltage MCUs or requiring faster switching at cost of higher input current. |
| MMBT3904LT1G | No built-in resistors - requires external RB and RE; hFE = 100–300; VCEO = 40 V. | Higher gain but increased design complexity and board area; not drop-in compatible. | Choose when precise gain control or higher collector voltage tolerance is required, accepting added component count. |
Compared with PDTC124EK,115, PDTC114EK,115 offers lower input threshold for 1.8 V systems but reduced noise immunity, while MMBT3904LT1G delivers higher hFE and voltage rating at the expense of external biasing and layout overhead.
Availability
PDTC124EK,115 is available at Aetrix Electronics and suitable for LED driver circuits, microcontroller interface modules, and low-power relay control applications requiring stable component supply and long-term manufacturability.
Supply support for PDTC124EK,115 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor company headquartered in Eindhoven, Netherlands, specializing in secure connectivity solutions for automotive, industrial, and consumer markets.
The PDTC124EK,115 belongs to NXP's resistor-equipped transistor product line, engineered to simplify digital switching designs by integrating precision bias networks into standardized SMD packages for high-volume manufacturing.
FAQ
What is the maximum continuous collector current for PDTC124EK,115?
The PDTC124EK,115 has a maximum DC output current (IO) of 100 mA, verified under standard mounting conditions with ambient temperature ≤25 °C. This rating applies to steady-state switching operation; peak current remains limited to 100 mA per IEC 60134 limiting values. Derating is required above 25 °C ambient per its 500 K/W thermal resistance.
Does PDTC124EK,115 require external bias resistors?
No, PDTC124EK,115 does not require external bias resistors. It integrates two 22 kΩ resistors (R1 and R2) internally - R1 connects the input to the base, and R2 connects the base to the emitter - forming a complete digital transistor structure. This eliminates the need for discrete bias components in most logic-level switching applications.
What is the pin configuration of PDTC124EK,115 in the SOT346 package?
The PDTC124EK,115 uses a standardized SOT346 (SC-59) pinout: Pin 1 is Base, Pin 2 is Emitter, and Pin 3 is Collector. This configuration is confirmed in the "Simplified outline, symbol and pinning" section of the official NXP datasheet and matches the mechanical drawing for SOT346 outlined on page 8.
Can PDTC124EK,115 be used with 1.8 V logic inputs?
PDTC124EK,115 has a typical input-on voltage (Vi(on)) of 1.7 V, making it borderline functional with 1.8 V logic, but its minimum guaranteed Vi(on) is not specified. For reliable 1.8 V operation, NXP recommends PDTC114EK,115 (Vi(on) = 1.4 V typ) instead. The PDTC124EK,115 is best suited for 3.3 V and 5 V logic families.
What is the thermal resistance junction-to-ambient for PDTC124EK,115?
The thermal resistance from junction to ambient (Rth j-a) for PDTC124EK,115 in its SOT346 package is 500 K/W under standard mounting conditions in free air. This value assumes a typical FR4 PCB layout with minimal copper area; adding thermal pads or copper pours can improve heat dissipation and reduce effective Rth j-a.
PDTC124EK,115 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Series:
- -
- Package/Case:
- TO-236-3, SC-59, SOT-23-3
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Transistor Type:
- NPN - Pre-Biased
- Current - Collector (Ic) (Max):
- 100 mA
- Voltage - Collector Emitter Breakdown (Max):
- 50 V
- Resistor - Base (R1):
- 22 kOhms
- Resistor - Emitter Base (R2):
- 22 kOhms
- DC Current Gain (hFE) (Min) @ Ic, Vce:
- 60 @ 5mA, 5V
- Vce Saturation (Max) @ Ib, Ic:
- 150mV @ 500µA, 10mA
- Current - Collector Cutoff (Max):
- 1µA
- Frequency - Transition:
- -
- Power - Max:
- 250 mW
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- SMT3; MPAK
PDTC124EK,115 FAQ
1.How can I place an order for PDTC124EK,115 through Aetrix?
Please submit a Request for Quotation (RFQ) for PDTC124EK,115 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for PDTC124EK,115 reliable?
The price and inventory of PDTC124EK,115 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PDTC124EK,115 is usually 5 days.
3.What payment methods are accepted for PDTC124EK,115?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PDTC124EK,115 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for PDTC124EK,115?
PDTC124EK,115 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your PDTC124EK,115 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for PDTC124EK,115?
For technical support, including PDTC124EK,115 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PDTC124EK,115 requirements.
6.How does Aetrix verify that PDTC124EK,115 is sourced from the original manufacturer or authorized distributors?
All PDTC124EK,115 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PDTC124EK,115 meets industry standards.
7.What is the process for return or replacement of PDTC124EK,115?
All PDTC124EK,115 units undergo pre-shipment inspection (PSI). If there is an issue with PDTC124EK,115, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The PDTC124EK,115 part is unused and in its original packaging.
Return procedure for PDTC124EK,115:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
PDTC124EK,115 Tags

-
MUN5211T1G
onsemi

-
DTC043ZEBTL
Rohm Semiconductor

-
DTC114EKAT146
Rohm Semiconductor

-
DDTD113ZC-7-F
Diodes Incorporated

-
DRDNB16W-7
Diodes Incorporated

-
PDTC114ET,215
Nexperia USA Inc.

-
PDTC143ZT,215
Nexperia USA Inc.

-
PDTC143ET,215
Nexperia USA Inc.

-
PDTC143XT,215
Nexperia USA Inc.

-
MMUN2211LT1G
onsemi

-
PDTC144ET,215
Nexperia USA Inc.

-
PDTC124ET,215
Nexperia USA Inc.
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
