NXP Semiconductors PDTC144WS,126

Overview

PDTC144WS from NXP Semiconductors is an NPN resistor-equipped transistor in a through-hole SOT54 (TO-92) package, featuring integrated bias resistors R1 = 47 kΩ and R2 = 22 kΩ, V_CEO = 50 V, I_O = 100 mA, and V_CEsat ≤ 150 mV at I_C = 10 mA / I_B = 0.5 mA. It serves as a compact, single-device replacement for discrete BJT + two-bias-resistor circuits in low-power switching applications.

For engineers reviewing the PDTC144WS datasheet, PDTC144WS pinout, PDTC144WS application, or PDTC144WS equivalent, key selection criteria include its fixed internal resistor ratio (R2/R1 ≈ 0.47), guaranteed input-off voltage (V_i(off) = 1.2–1.7 V), thermal resistance (R_th(j-a) = 250 K/W), and compatibility with standard through-hole PCB assembly processes.

Technical Context

The PDTC144WS integrates two precision thin-film resistors directly into the silicon die to form a monolithic NPN transistor with base bias network - eliminating external components while maintaining predictable DC current gain (h_FE ≥ 60 at I_C = 5 mA). Its internal topology fixes the base-emitter shunt path via R2 and base-collector pull-up via R1, enabling reliable saturation under defined input voltage thresholds.

This configuration supports direct interfacing with 3.3 V and 5 V logic families without level-shifting, with verified operation across −65 °C to +150 °C ambient temperature and junction temperatures up to 150 °C. The device meets IEC 60134 absolute maximum ratings and is qualified for production use per NXP's product data sheet status.

Key Specifications

Pinout & Package

PDTC144WS uses the plastic single-ended leaded (through-hole) SOT54 (TO-92) package, with 3 leads and body dimensions of 4.8 mm × 4.2 mm × 14.5 mm (D × E × L). Lead spacing is 2.54 mm (e), and terminal plating complies with standard tin-lead or lead-free finishes per JEDEC TO-92 specifications.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar NPN resistor-equipped transistor applications.

Compared with PDTC144EK,115 and NSBC114EPDXV6T1G, the PDTC144WS offers superior thermal performance in through-hole layouts, guaranteed low V_CEsat, and a proven 0.47 resistor ratio optimized for standard logic-drive margins - making it preferred for reliability-critical, manually assembled, or thermally demanding applications.

Availability

PDTC144WS is available at Aetrix Electronics and suitable for LED driver circuits, microcontroller GPIO interfaces, and automotive door lock actuator control requiring stable component supply and long-term manufacturability.

Supply support for PDTC144WS includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

NXP Semiconductors is a global semiconductor company headquartered in Eindhoven, Netherlands, specializing in secure connectivity solutions for automotive, industrial, and IoT applications.

The PDTC144W series belongs to NXP's resistor-equipped transistor product line, designed specifically to reduce component count and improve reliability in general-purpose switching and interface circuits across consumer, industrial, and automotive markets.

FAQ

What is the pin configuration of PDTC144WS?

The PDTC144WS has a fixed pinout in the SOT54 (TO-92) package: Pin 1 is Base, Pin 2 is Collector, and Pin 3 is Emitter. This arrangement is confirmed in the official NXP datasheet section "Simplified outline, symbol and pinning" and matches standard TO-92 mechanical orientation with flat side facing outward and leads downward.

Does PDTC144WS require external bias resistors?

No, PDTC144WS does not require external bias resistors. It integrates R1 = 47 kΩ and R2 = 22 kΩ internally, forming a complete NPN switching transistor with built-in base bias network. This eliminates two external components and ensures consistent DC operating point across temperature and process variation - a core design feature of the PDTC144W series.

What is the maximum continuous collector current for PDTC144WS?

The maximum continuous collector current (I_O) for PDTC144WS is 100 mA, as specified in the Quick Reference Data and Limiting Values tables of the NXP datasheet. This rating applies at T_amb ≤ 25 °C with proper PCB thermal relief; derating is required above ambient temperatures per the thermal resistance value of 250 K/W.

Can PDTC144WS be used with 3.3 V logic inputs?

Yes, PDTC144WS can be reliably driven by 3.3 V logic inputs. Its V_i(on) is specified as 2.7–4.0 V (typical 2.7 V), ensuring full saturation at 3.3 V, while V_i(off) is 1.2–1.7 V, providing adequate noise margin. This makes PDTC144WS compatible with modern low-voltage MCUs without additional level-shifting circuitry.

Is PDTC144WS RoHS compliant and lead-free?

Yes, PDTC144WS is RoHS compliant and offered in lead-free versions. NXP's documentation confirms compliance with EU RoHS Directive 2011/65/EU, and the device is marked with appropriate packaging codes (e.g., "W" indicating China manufacturing with lead-free finish). Full compliance details, including homogeneous material declarations, are available in NXP's official product change notices and environmental reports.