Nexperia USA Inc. PDTD114ETR

Overview

PDTD114ETR from Nexperia is an AEC-Q101-qualified NPN resistor-equipped transistor (RET) in SOT23 package, featuring integrated 10 kΩ input bias resistor (R1) and 10 kΩ emitter feedback resistor (R2), 50 V V_CEO, 500 mA I_O, and operation up to 175 °C junction temperature-used for digital switching in automotive body control modules.

For engineers reviewing the PDTD114ETR datasheet, PDTD114ETR pinout, PDTD114ETR application, or PDTD114ETR equivalent, key selection criteria include built-in resistor ratio tolerance (±10 %), thermal derating on FR4 PCBs, off-state input voltage (0.6–1.5 V), and compatibility with BC807-series replacement in low-side load switching.

Technical Context

This RET integrates a monolithic NPN transistor with two precision thin-film resistors on a single die: R1 connects base to input, R2 connects base to emitter, enabling single-resistor drive logic-level interfacing. It eliminates external bias components while maintaining DC current gain (h_FE) ≥70 at I_C = 50 mA and V_CE = 5 V.

The device operates under AEC-Q101 stress qualification, supports ±10 % R2/R1 ratio tolerance, delivers 100 mV V_CEsat at I_C = 50 mA / I_B = 2.5 mA, and exhibits 225 MHz f_T for high-speed digital switching applications in harsh ambient environments.

Key Specifications

Pinout & Package

SOT23 (TO-236AB) plastic surface-mount package: 3-terminal, 1.9 mm pitch, 2.9 mm × 1.3 mm × 1.0 mm body; optimized for reflow and wave soldering per IPC-7351B footprint standards.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar NPN resistor-equipped transistor applications.

Compared with BC807-40 and PDTA114ET, PDTD114ET provides guaranteed R2/R1 matching, lower layout sensitivity, and simplified drive requirements-making it optimal for cost-sensitive, high-volume automotive digital I/O stages where consistency and space savings outweigh need for ultra-high h_FE.

Availability

PDTD114ETR is available at Aetrix Electronics and suitable for automotive body control units, industrial PLC output modules, and medical fan control systems requiring stable component supply and AEC-Q101 compliance.

Supply support for PDTD114ETR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Nexperia is a global semiconductor expert delivering high-performance, reliable discrete, logic, and MOSFET devices with focus on efficiency, miniaturization, and automotive-grade quality.

PDTD114ETR belongs to Nexperia's AEC-Q101-qualified Resistor-Equipped Transistor (RET) family, engineered specifically for replacing discrete BJT + resistor combinations in automotive and industrial digital switching applications.

FAQ

What is the function of Pin 2 (GND) in the PDTD114ETR?

Pin 2 is the emitter terminal and serves as the internal reference node for the R2 feedback resistor. It must be connected to system ground to complete the bias network and enable proper transistor turn-on/turn-off behavior. Unlike standard BJTs, this pin is not floating-it forms the return path for both R2 current and emitter current.

Can PDTD114ETR replace BC847 in existing designs?

No-BC847 is a bare NPN transistor without integrated resistors, requiring external base biasing. PDTD114ETR has fixed internal R1/R2 values and different input impedance characteristics. Direct substitution would cause incorrect biasing unless the original schematic's resistor network is removed and logic drive levels verified against VI(on)/VI(off) specs (1–3 V and 0.6–1.5 V respectively).

Is thermal derating required for continuous 500 mA operation?

Yes-continuous 500 mA operation is only rated at T_amb ≤ 25 °C on a 4-layer FR4 PCB (P_tot = 460 mW). At 85 °C ambient, maximum continuous current drops to ~320 mA due to thermal resistance (R_th(j-a) = 327 K/W). Derating curves in Figure 1 must be applied for reliable long-term performance.

Does PDTD114ETR support PWM switching above 10 kHz?

Yes-the internal transistor's 225 MHz f_T and 7 pF collector capacitance enable clean switching at PWM frequencies up to 100 kHz. However, layout parasitics and load inductance dominate edge integrity beyond 20 kHz; use short traces and local decoupling to maintain V_CEsat stability and minimize overshoot.