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Texas Instruments PGA113AIDGSTG4
- Part No.:
- PGA113AIDGSTG4
- Manufacturer:
- Texas Instruments
- Category:
- Instrumentation, Op Amps, Buffer Amps
- Package:
- 10-TFSOP, 10-MSOP (0.118", 3.00mm Width)
- Datasheet:
-
PGA113AIDGSTG4.pdf
- Description:
- IC OPAMP PGA 1 CIRCUIT 10VSSOP
- Quantity:
- Payment:
- Shipping:
Inventory:2,268
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Product details
Overview
PGA113AIDGSTG4 from Texas Instruments is a zero-drift programmable gain amplifier with 2-channel multiplexer, SPI interface, and scope-gain selection (1, 2, 5, 10, 20, 50, 100, 200). It delivers 25 μV typical offset, 0.35 μV/°C drift, 12 nV/√Hz input noise, rail-to-rail output swing, and operates from 2.2 V to 5.5 V supplies. It is used in precision portable data acquisition systems interfacing to microcontroller ADCs.
For engineers reviewing the PGA113AIDGSTG4 datasheet, PGA113AIDGSTG4 pinout, PGA113AIDGSTG4 application, or PGA113AIDGSTG4 equivalent, key selection criteria include its scope-gain architecture, internal calibration channels (GND/0.1VCAL/0.9VCAL/VREF), dual-supply support (AVDD/DVDD), 10-pin VSSOP package, and 200 ns gain switching time for dynamic signal conditioning in battery-powered test equipment.
Technical Context
The PGA113AIDGSTG4 integrates a chopper-stabilized amplifier core with a 2-input analog mux and SPI-configurable gain control logic. Its zero-drift architecture uses auto-zeroing and chopping to suppress offset and drift, while internal calibration channels enable system-level offset/gain correction without external components.
It supports mixed-voltage operation via separate AVDD (analog) and DVDD (digital/output stage) rails, allowing safe interfacing to 3-V microcontrollers when powered from 5-V supplies. The SPI interface operates at up to 10 MHz in Mode 0,0 and includes dedicated CS, SCLK, and bidirectional DIO pins - no daisy-chain capability.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Gain Options | Scope gains: 1, 2, 5, 10, 20, 50, 100, 200 - enables precise scaling for wide-dynamic-range sensor signals without external resistors. |
| Input Offset Voltage | ±25 μV typical (±100 μV max) - ensures high DC accuracy in low-level signal amplification (e.g., thermocouple, strain gauge). |
| Offset Drift | 0.35 μV/°C typical (1.2 μV/°C max) - maintains calibration stability across –40°C to +125°C industrial temperature range. |
| Input Voltage Noise | 12 nV/√Hz at f > 10 kHz - supports clean amplification of medium-frequency sensor outputs with minimal added noise. |
| Supply Range | AVDD/DVDD = 2.2 V to 5.5 V - allows flexible power domain partitioning (e.g., 5-V analog rail, 3.3-V digital rail). |
| Quiescent Current | 1.1 mA typical total (0.45 mA analog + 0.75 mA digital) - enables multi-hour operation on coin-cell or Li-ion batteries. |
| Gain Error | 0.1% max for G ≤ 32; 0.3% max for G ≥ 50 - defines absolute gain tolerance for calibrated measurement systems. |
| Output Swing | GND + 50 mV to DVDD – 50 mV at ±0.25 mA - delivers full-scale utilization of 12-bit+ microcontroller ADC inputs. |
Pinout & Package
PGA113AIDGSTG4 is housed in a 10-pin VSSOP package (3.00 mm × 3.00 mm body size, 0.5-mm pitch), optimized for space-constrained PCB layouts in handheld instruments and smart sensors.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 AVDD | Analog supply input | Provides power to amplifier core and mux; must be bypassed with 0.1-μF ceramic capacitor near pin. |
| 2 CH1 | Analog input channel 1 | High-impedance (10 GΩ) differential input path; supports rail-to-rail common-mode range (GND–0.1 V to AVDD+0.1 V). |
| 3 VCAL/CH0 | Calibration reference / channel 0 input | Connects to external VCAL reference; selects internal CAL1–CAL4 channels (GND, 0.1VCAL, 0.9VCAL, VREF) for system calibration. |
| 4 VREF | Reference voltage input | Sets output offset; requires low-impedance source capable of ±2 mA; can be tied to GND for single-supply midscale referencing. |
| 5 VOUT | Analog output | Rail-to-rail output stage; clamped to AVDD + 300 mV if AVDD < DVDD - prevents overvoltage into downstream ADC. |
| 6 GND | Analog/digital ground | Common return for AVDD, DVDD, and signal paths; must be connected to low-impedance PCB ground plane. |
| 7 SCLK | SPI clock input | Accepts up to 10-MHz CMOS clock; timing-critical for register writes and gain/channel updates. |
| 8 DIO | SPI data I/O | Bidirectional serial line with 10-μA internal pulldown; transmits command/data on falling edge, receives on rising edge (Mode 0,0). |
| 9 CS | SPI chip select | Active-low enable; must remain low for entire SPI transaction; controls DIO direction and register access window. |
| 10 DVDD | Digital/output supply | Supplies digital logic and op-amp output stage; sets logic levels and output drive strength; bypass with 0.1-μF capacitor. |
Key Features
| Feature | Design Value |
|---|---|
| Rail-to-rail input and output | Enables full utilization of supply rails for maximum dynamic range in single-supply systems (e.g., 3.3-V battery-powered DAQ). |
| Four internal calibration channels | Eliminates need for external calibration DACs or switches by providing GND, 0.1VCAL, 0.9VCAL, and VREF as selectable mux inputs. |
| Zero-drift architecture | Combines auto-zeroing and chopping to achieve sub-μV offset drift - critical for long-duration unattended measurements. |
| Separate AVDD and DVDD supplies | Prevents ADC lockup in mixed-voltage systems (e.g., 5-V PGA driving 3-V MSP430 ADC) by isolating analog and digital domains. |
| 200 ns gain switching time | Supports real-time gain adaptation during signal acquisition - essential for automatic ranging in multimeter or oscilloscope front-ends. |
| Software shutdown mode | Reduces total current to ≤4 μA - extends battery life in sleep-mode portable instrumentation without external enable circuitry. |
Applications
| Remote e-Meter Reading | Portable Data Acquisition |
|---|---|
Use Scenario: High-accuracy voltage/current sensing in utility smart meters deployed in outdoor cabinets with wide temperature swings. IC Role / Device Role / Timing Role: Programmable gain amplifier conditioning shunt resistor or CT output before 16-bit sigma-delta ADC. Use Value: 0.35 μV/°C drift and ±100 μV max offset ensure meter calibration remains valid over –40°C to +85°C operating range without field recalibration. | Use Scenario: Handheld multimeter or sensor logger acquiring thermocouple, RTD, or bridge sensor signals in field service environments. IC Role / Device Role / Timing Role: Signal-conditioning front-end with automatic gain selection and internal calibration for multi-range measurements. Use Value: Scope gains (1–200) and 200 ns switching enable seamless autoranging; 12 nV/√Hz noise preserves resolution for µV-level thermocouple outputs. |
| PC-Based Signal Acquisition Systems | Battery-Powered Instruments |
Use Scenario: USB-connected DAQ module for lab testing, where PC provides power and control via SPI over GPIO or FTDI bridge. IC Role / Device Role / Timing Role: Precision analog front-end with SPI-configurable gain and calibration, interfacing to microcontroller's ADC. Use Value: Dual AVDD/DVDD rails allow 5-V analog performance while accepting 3.3-V USB logic levels; software shutdown reduces idle power to <5 μW. | Use Scenario: Pocket-sized environmental monitor logging temperature, humidity, and gas concentration using low-power MCU and sensors. IC Role / Device Role / Timing Role: Low-noise, low-drift gain stage optimizing sensor output for 12-bit SAR ADC in energy-harvesting or coin-cell designs. Use Value: 1.1 mA typical IQ and rail-to-rail I/O maximize battery runtime and ADC utilization; internal CAL channels reduce BOM count by eliminating external calibration hardware. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar programmable gain amplifier applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| PGA112AIDGST | Binary gain set (1, 2, 4, 8, 16, 32, 64, 128); identical pinout, package, and spec limits except gain options. | Preferred where integer binary scaling suffices (e.g., digital pot replacement, fixed-step gain control). | Select PGA112AIDGST when binary gains align with system resolution requirements and scope gains are unnecessary. |
| AD8253ARMZ | 4-channel, 10-MHz bandwidth, ±15-V supply capable; SPI interface with daisy-chain; higher power (3.5 mA IQ); different pinout (16-pin LFCSP). | Suitable for high-speed, high-voltage industrial PLC analog input modules requiring >1-MHz bandwidth. | Choose AD8253ARMZ only when >1-MHz small-signal bandwidth or bipolar supply operation is required - not a drop-in replacement. |
Compared with PGA112AIDGST and AD8253ARMZ, PGA113AIDGSTG4 uniquely balances ultra-low drift (0.35 μV/°C), scope-gain flexibility (1–200), and ultra-low power (1.1 mA) in a 10-pin VSSOP - making it optimal for precision, battery-operated, single-supply measurement systems where gain granularity and thermal stability outweigh raw speed or voltage range.
Availability
PGA113AIDGSTG4 is available at Aetrix Electronics and suitable for remote e-meter reading, portable data acquisition, and battery-powered instruments requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for PGA113AIDGSTG4 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor company specializing in analog and embedded processing technologies, with leadership in precision signal chain solutions.
The PGA11x family was designed specifically for high-accuracy, low-power sensor signal conditioning in portable and industrial measurement systems - emphasizing zero-drift performance, integrated calibration, and flexible gain control via SPI.
FAQ
What is the maximum SPI clock frequency supported by PGA113AIDGSTG4?
The PGA113AIDGSTG4 supports SPI clock frequencies up to 10 MHz under recommended operating conditions (AVDD/DVDD = 2.2 V to 5.5 V). This timing is validated per Figure 1 (SPI Mode 0,0) in the SBOS424C datasheet, with minimum tHI/tLO of 40 ns. At lower supply voltages (e.g., 2.2 V), slew-rate-limited edges may reduce practical maximum frequency, but 10 MHz remains the specified limit for full functionality. PGA113AIDGSTG4 does not support daisy-chain configurations.
How does the internal calibration feature work on PGA113AIDGSTG4?
The PGA113AIDGSTG4 provides four internal calibration channels accessible via the VCAL/CH0 pin: CAL1 (GND), CAL2 (0.9×VCAL), CAL3 (0.1×VCAL), and CAL4 (VREF). When selected through SPI commands, these channels route known reference voltages to the amplifier input, enabling system-level offset and gain error measurement and correction. VCAL must be supplied externally as a stable, low-impedance reference; the device loads it with ~100 kΩ only when CAL2 or CAL3 are active. This eliminates external calibration DACs in PGA113AIDGSTG4-based designs.
Can PGA113AIDGSTG4 operate with AVDD = 3.3 V and DVDD = 5 V?
Yes, PGA113AIDGSTG4 supports independent AVDD and DVDD supplies within 2.2 V to 5.5 V each. With AVDD = 3.3 V and DVDD = 5 V, the analog core runs at 3.3 V while the digital interface and output stage use 5 V - enabling safe interfacing to a 3.3-V microcontroller ADC that would otherwise experience overvoltage from a 5-V PGA output. In this configuration, VOUT is clamped to AVDD + 300 mV (i.e., 3.6 V), protecting the downstream ADC. Both supplies require local 0.1-μF ceramic bypass capacitors.
What is the purpose of the separate AVDD and DVDD pins on PGA113AIDGSTG4?
The separate AVDD and DVDD pins on PGA113AIDGSTG4 isolate the analog signal path (amplifier, mux) from digital logic and output driver circuitry. AVDD powers the precision analog core, directly affecting offset, noise, and bandwidth. DVDD sets digital I/O voltage levels and supplies current to the output stage - allowing the PGA113AIDGSTG4 to drive higher-current loads or interface to higher-voltage logic without degrading analog performance. This separation prevents digital switching noise from coupling into sensitive analog nodes and avoids ADC lockup in mixed-supply systems.
Does PGA113AIDGSTG4 support true rail-to-rail input with GND-referenced signals?
Yes, PGA113AIDGSTG4 supports rail-to-rail input common-mode range from GND – 0.1 V to AVDD + 0.1 V under normal operation, and guarantees no phase reversal for inputs from GND – 0.3 V to AVDD + 0.3 V. When VREF = GND and AVDD = 5 V, this allows direct connection of 0–5 V sensor outputs (e.g., potentiometers, ratiometric sensors) without level-shifting. Input protection diodes clamp excursions beyond ±0.5 V of the rails, but sustained overvoltage must be current-limited to <10 mA to prevent damage. PGA113AIDGSTG4 maintains rail-to-rail operation across its full –40°C to +125°C temperature range.
PGA113AIDGSTG4 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 10-TFSOP, 10-MSOP (0.118", 3.00mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Discontinued at Digi-Key
- Amplifier Type:
- Programmable Gain
- Number of Circuits:
- 1
- Output Type:
- Rail-to-Rail
- Slew Rate:
- 8V/µs
- Gain Bandwidth Product:
- -
- -3db Bandwidth:
- 10 MHz
- Current - Input Bias:
- 1.5 nA
- Voltage - Input Offset:
- 75 µV
- Current - Supply:
- 330µA
- Current - Output / Channel:
- 60 mA
- Voltage - Supply Span (Min):
- 2.2 V
- Voltage - Supply Span (Max):
- 5.5 V
- Operating Temperature:
- -40°C ~ 125°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 10-VSSOP
PGA113AIDGSTG4 FAQ
1.How can I place an order for PGA113AIDGSTG4 through Aetrix?
Please submit a Request for Quotation (RFQ) for PGA113AIDGSTG4 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for PGA113AIDGSTG4 reliable?
The price and inventory of PGA113AIDGSTG4 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PGA113AIDGSTG4 is usually 5 days.
3.What payment methods are accepted for PGA113AIDGSTG4?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PGA113AIDGSTG4 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for PGA113AIDGSTG4?
PGA113AIDGSTG4 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your PGA113AIDGSTG4 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for PGA113AIDGSTG4?
For technical support, including PGA113AIDGSTG4 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PGA113AIDGSTG4 requirements.
6.How does Aetrix verify that PGA113AIDGSTG4 is sourced from the original manufacturer or authorized distributors?
All PGA113AIDGSTG4 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PGA113AIDGSTG4 meets industry standards.
7.What is the process for return or replacement of PGA113AIDGSTG4?
All PGA113AIDGSTG4 units undergo pre-shipment inspection (PSI). If there is an issue with PGA113AIDGSTG4, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The PGA113AIDGSTG4 part is unused and in its original packaging.
Return procedure for PGA113AIDGSTG4:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
PGA113AIDGSTG4 Tags
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LM358DR
Texas Instruments
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MCP6006UT-E/OT
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LM358P
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