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Texas Instruments PGA116AIPWR
- Part No.:
- PGA116AIPWR
- Manufacturer:
- Texas Instruments
- Category:
- Instrumentation, Op Amps, Buffer Amps
- Package:
- 20-TSSOP (0.173", 4.40mm Width)
- Datasheet:
-
PGA116AIPWR.pdf
- Description:
- IC OPAMP PGA 1 CIRCUIT 20TSSOP
- Quantity:
- Payment:
- Shipping:
Inventory:5,693
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Product details
Overview
PGA116AIPWR from Texas Instruments is a zero-drift programmable gain amplifier with 10-channel analog multiplexer, binary gain selection (1–128), SPI interface, rail-to-rail output, and internal calibration channels. It delivers 25 μV typical offset, 0.35 μV/°C drift, 12 nV/√Hz noise, and operates from 2.2 V to 5.5 V supplies across –40°C to 125°C. Used in precision data acquisition systems interfacing with CDAC ADCs.
For engineers reviewing the PGA116AIPWR datasheet, PGA116AIPWR pinout, PGA116AIPWR application, or PGA116AIPWR equivalent, key selection criteria include 10-channel MUX support, daisy-chain SPI capability, hardware/software shutdown (IQ ≤4 μA), AVDD/DVDD dual-supply isolation, and calibration channel integration for system-level offset/gain correction.
Technical Context
The PGA116AIPWR implements a chopper-stabilized zero-drift architecture with auto-zeroing to suppress input offset and drift. Its 10-input MUX feeds a single high-precision amplifier stage whose gain is set via SPI register writes supporting eight binary values (1, 2, 4, 8, 16, 32, 64, 128).
SPI communication operates at up to 10 MHz in Mode 0,0 or Mode 1,1, with daisy-chain capability enabled by separate DIN/DOUT pins. Hardware enable (ENABLE pin) and software-controlled shutdown provide dual low-power entry paths, reducing total quiescent current to ≤4 μA in shutdown mode.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Gain Range | Binary gains 1, 2, 4, 8, 16, 32, 64, 128 - enables precise signal scaling before ADC sampling without external resistor networks. |
| Input Offset Voltage | ±25 μV typical (±100 μV max) - ensures <0.1 mV error at unity gain, critical for sub-millivolt sensor measurements. |
| Offset Drift | 0.35 μV/°C typical (1.2 μV/°C max) - maintains calibration stability over industrial temperature range without frequent recalibration. |
| Input Voltage Noise | 12 nV/√Hz @ >10 kHz - supports high-resolution, wideband signal conditioning for dynamic sensor inputs. |
| Supply Range | AVDD & DVDD: 2.2 V to 5.5 V - allows independent analog/digital supply rails to prevent ADC input overvoltage in mixed-voltage systems. |
| Channel Count | 10 analog input channels + 4 internal calibration channels (GND, 0.1VCAL, 0.9VCAL, VREF) - enables automated system-level calibration without external switches or references. |
| SPI Interface | 10 MHz max clock, daisy-chain capable (DIN/DOUT), Mode 0,0 or 1,1 - simplifies multi-PGA control with minimal GPIO usage on host microcontroller. |
Pinout & Package
TSSOP-20 package (6.50 mm × 4.40 mm) with exposed thermal pad; RoHS-compliant, lead-free finish.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 AVDD | Analog supply input | Provides power to analog front-end; must be bypassed with 0.1 μF ceramic capacitor near pin. |
| 7 VCAL/CH0 | MUX channel 0 / calibration reference input | Accepts external VCAL voltage used as reference for four internal calibration channels (GND, 0.1VCAL, 0.9VCAL, VREF). |
| 8 VREF | Reference input | Sets output offset; requires low-impedance source capable of ±2 mA; may be tied to GND for midsupply-referenced operation. |
| 9 VOUT | Analog output | Rail-to-rail output stage; clamped to AVDD + 300 mV when AVDD < DVDD to protect downstream ADC inputs. |
| 13 ENABLE | Hardware shutdown control | Logic low forces shutdown (IQ < 1 μA); complements SPI software shutdown for fail-safe power management. |
| 14 GND | Analog/digital ground | Common reference for all analog and digital circuitry; requires low-inductance connection to PCB ground plane. |
| 15 SCLK | SPI clock input | Accepts up to 10 MHz clock; timing-critical for register access and gain/channel updates. |
| 16 DIN | SPI data input | Serial command/data input; includes 10 μA internal pulldown for robust daisy-chain termination. |
| 17 DOUT | SPI data output | High-impedance when CS is high; enables cascaded SPI configurations without external tri-state logic. |
| 18 CS | SPI chip select | Active-low enable for SPI transactions; controls DOUT high-Z state and command latching timing. |
| 19 DVDD | Digital/op-amp output supply | Supplies digital logic and output stage; isolates digital noise from analog section; must be bypassed with 0.1 μF capacitor. |
| 20 CH6 | MUX channel 6 input | One of ten user-configurable analog inputs; high-impedance when unselected (2 pF off-channel capacitance). |
Key Features
| Feature | Design Value |
|---|---|
| Rail-to-rail input and output | Supports full supply-range signal capture and delivery, maximizing dynamic range into 3.3 V or 5 V ADCs without level-shifting. |
| Zero-drift architecture | Eliminates thermally induced offset drift, enabling stable DC-coupled measurements over –40°C to 125°C without recalibration. |
| Four internal calibration channels | Reduces BOM count and board space by integrating GND, 0.1VCAL, 0.9VCAL, and VREF switching-no external mux or reference required. |
| Dual supply isolation (AVDD/DVDD) | Prevents overvoltage lockup on microcontroller ADC inputs when PGA is powered from higher rail (e.g., 5 V PGA → 3.3 V MSP430 ADC). |
| Hardware + software shutdown | Enables two independent low-power entry methods: ENABLE pin for immediate cutoff and SPI command for controlled sequencing in firmware. |
Applications
| Remote e-Meter Reading | Portable Data Acquisition |
|---|---|
Use Scenario: High-accuracy voltage/current measurement in smart electricity meters with long-term calibration stability requirements. IC Role / Device Role / Timing Role: Programmable gain amplifier and analog multiplexer conditioning sensor outputs prior to sigma-delta ADC conversion. Use Value: 25 μV offset and 0.35 μV/°C drift ensure meter accuracy remains within ANSI C12.20 Class 0.2 over 10+ years and full temperature range. | Use Scenario: Battery-powered handheld instrument acquiring signals from multiple sensors (thermocouples, strain gauges, pH probes). IC Role / Device Role / Timing Role: Signal-conditioning front-end providing selectable gain and channel routing before low-power SAR ADC sampling. Use Value: 1.1 mA typical IQ and 4 μA shutdown current extend battery life; 10-channel MUX reduces external component count and PCB area. |
| PC-Based Signal Acquisition Systems | Programmable Logic Controllers |
Use Scenario: USB-connected DAQ modules requiring high linearity, low noise, and flexible gain configuration under PC control. IC Role / Device Role / Timing Role: Precision analog front-end with SPI interface enabling real-time gain and channel updates from host software. Use Value: Daisy-chain SPI support allows stacking multiple PGA116AIPWR units on single bus, simplifying modular hardware design and firmware scalability. | Use Scenario: Industrial I/O modules processing analog field signals (4–20 mA, RTD, thermocouple) in harsh factory environments. IC Role / Device Role / Timing Role: Robust signal conditioner with extended temperature rating (–40°C to 125°C) and ESD-hardened inputs (±3 kV HBM). Use Value: Internal calibration channels enable automatic field calibration without service technician intervention, reducing maintenance downtime. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar programmable gain amplifier applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| PGA117AIPWR | Scope gain set (1, 2, 5, 10, 20, 50, 100, 200) instead of binary; identical pinout, package, and feature set. | Better suited for applications requiring non-binary scaling (e.g., matching legacy sensor output ranges or standard test equipment steps). | Select PGA117AIPWR when gain steps like ×5 or ×20 are required; otherwise PGA116AIPWR offers finer resolution near unity gain. |
| INA128UA | Fixed-gain (5–10,000) instrumentation amplifier; no MUX, no SPI, no calibration channels; SO-8 package. | Limited to single-channel, fixed-gain use cases where digital configurability and multi-sensor support are unnecessary. | Choose INA128UA only for cost-sensitive, single-channel applications without need for channel selection, gain reconfiguration, or system calibration. |
Compared with PGA117AIPWR and INA128UA, the PGA116AIPWR uniquely combines 10-channel MUX, binary gain flexibility, integrated calibration, and daisy-chain SPI-making it optimal for scalable, self-calibrating multi-sensor systems where precision and configurability are co-prioritized.
Availability
PGA116AIPWR is available at Aetrix Electronics and suitable for remote e-meter reading, portable data acquisition, and PC-based signal acquisition systems requiring stable component supply, long-lifecycle support, and guaranteed traceable sourcing.
Supply support for PGA116AIPWR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor company specializing in analog and embedded processing technologies, with leadership in precision amplifiers, data converters, and industrial interface solutions.
The PGA116AIPWR belongs to TI's Zerø-Drift PGA product line, designed specifically for high-accuracy, multi-channel sensor signal conditioning in energy metering, test equipment, and industrial automation where offset stability and system-level calibration are critical.
FAQ
What is the maximum SPI clock frequency supported by PGA116AIPWR?
The PGA116AIPWR supports SPI clock frequencies up to 10 MHz in standard mode and up to 9.09 MHz in daisy-chain mode due to cumulative timing constraints from DIN setup and DOUT propagation delay. Operation at 10 MHz requires single-device configuration with proper signal integrity layout.
Does PGA116AIPWR require external components for basic operation?
Yes - PGA116AIPWR requires at minimum two 0.1 μF ceramic bypass capacitors (one on AVDD, one on DVDD), a low-impedance VREF source (or connection to GND), and a stable VCAL reference for calibration channel use. No external gain-setting resistors are needed due to its fully integrated programmable gain architecture.
How does the ENABLE pin interact with SPI software shutdown in PGA116AIPWR?
The ENABLE pin provides hardware-level shutdown independent of SPI state: pulling ENABLE low forces immediate analog and digital shutdown (IQ < 1 μA), overriding any active SPI commands. SPI software shutdown retains register contents and allows faster wake-up but draws slightly more current (~4 μA). Both methods can be used complementarily for layered power management.
Can PGA116AIPWR drive an ADC input directly without external buffering?
Yes - PGA116AIPWR's rail-to-rail output stage and specified load drive capability (±5 mA at 0.25 V from rail) allow direct connection to most SAR and sigma-delta ADC inputs. When AVDD < DVDD, VOUT is clamped to AVDD + 300 mV, preventing overvoltage on lower-voltage ADCs such as 3.3 V MSP430 peripherals.
What calibration channels are accessible through the PGA116AIPWR MUX and how are they selected?
The PGA116AIPWR provides four internal calibration channels: CAL1 (GND), CAL2 (0.9×VCAL), CAL3 (0.1×VCAL), and CAL4 (VREF). These are selected via SPI register writes - not physical pin connections - and appear as additional MUX inputs alongside CH0–CH9. Selection is transparent to the host MCU once configured.
PGA116AIPWR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 20-TSSOP (0.173", 4.40mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Amplifier Type:
- Programmable Gain
- Number of Circuits:
- 1
- Output Type:
- Rail-to-Rail
- Slew Rate:
- 8V/µs
- Gain Bandwidth Product:
- -
- -3db Bandwidth:
- 10 MHz
- Current - Input Bias:
- 1.5 nA
- Voltage - Input Offset:
- 75 µV
- Current - Supply:
- 330µA
- Current - Output / Channel:
- 60 mA
- Voltage - Supply Span (Min):
- 2.2 V
- Voltage - Supply Span (Max):
- 5.5 V
- Operating Temperature:
- -40°C ~ 125°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 20-TSSOP
PGA116AIPWR FAQ
1.How can I place an order for PGA116AIPWR through Aetrix?
Please submit a Request for Quotation (RFQ) for PGA116AIPWR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for PGA116AIPWR reliable?
The price and inventory of PGA116AIPWR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PGA116AIPWR is usually 5 days.
3.What payment methods are accepted for PGA116AIPWR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PGA116AIPWR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for PGA116AIPWR?
PGA116AIPWR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your PGA116AIPWR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for PGA116AIPWR?
For technical support, including PGA116AIPWR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PGA116AIPWR requirements.
6.How does Aetrix verify that PGA116AIPWR is sourced from the original manufacturer or authorized distributors?
All PGA116AIPWR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PGA116AIPWR meets industry standards.
7.What is the process for return or replacement of PGA116AIPWR?
All PGA116AIPWR units undergo pre-shipment inspection (PSI). If there is an issue with PGA116AIPWR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The PGA116AIPWR part is unused and in its original packaging.
Return procedure for PGA116AIPWR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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