Texas Instruments PGA204AU
- Part No.:
- PGA204AU
- Manufacturer:
- Texas Instruments
- Category:
- Instrumentation, Op Amps, Buffer Amps
- Package:
- 16-SOIC (0.295", 7.50mm Width)
- Datasheet:
-
PGA204AU.pdf
- Description:
- IC INST AMP 1 CIRCUIT 16SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:355
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
PGA204AU from Texas Instruments (originally Burr-Brown) is a digitally programmable instrumentation amplifier with four precision gain settings - 1, 10, 100, and 1000 V/V - selected via TTL/CMOS-compatible A0/A1 address inputs. It delivers 50 µV max input-referred offset voltage, 0.25 µV/°C drift, 115 dB CMRR at G=1000, ±40 V input over-voltage protection, and operates from ±4.5 V to ±18 V supplies. It is used in high-accuracy data acquisition systems where gain flexibility and analog integrity are critical.
For engineers reviewing the PGA204AU datasheet, PGA204AU pinout, PGA204AU application, or PGA204AU equivalent, key selection considerations include its SOL-16 surface-mount package, gain-switching settling time (1000 µs at G=1000), input bias current ≤2 nA, output swing limited to (V+)–1.3 V / (V–)+1.3 V, and compatibility with single-supply reference configurations using the Ref pin.
Technical Context
The PGA204AU integrates three op-amp stages: two matched input amplifiers (A1, A2) with laser-trimmed resistive feedback networks for gain selection, and an output difference amplifier (A3) that rejects common-mode error. Its digitally controlled gain is implemented via internal 25 kΩ resistor networks switched by CMOS logic, eliminating external gain-setting components.
It features over-voltage protection on both inputs (±40 V absolute max), input bias current return path requirements (≤±2 nA), and a dedicated digital ground (Pin 14) decoupled from analog ground to preserve CMRR. The Ref pin sets output common-mode level, and the Feedback pin (Pin 12) enables remote-sense accuracy when tied to the load.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Gain Settings | 1, 10, 100, 1000 V/V - digitally selected via A0/A1; no external resistors required |
| Input Offset Voltage | ±50 µV max at +25°C - enables sub-0.01% accuracy in 10 mV full-scale sensor measurements |
| CMRR | 115 dB at G=1000 - suppresses >3 million:1 common-mode interference in noisy industrial environments |
| Bandwidth | 1 kHz at G=1000 - supports DC-coupled, low-frequency precision signal conditioning up to ~100 Hz closed-loop |
| Supply Range | ±4.5 V to ±18 V - allows battery-powered (±5 V) or industrial (±15 V) operation without level-shifting |
| Input Over-Voltage Rating | ±40 V - protects against transients in bridge sensor or thermocouple front-ends without external clamping |
| Quiescent Current | ±6.5 mA max - enables low-power DAQ designs with <150 mW total dissipation at ±15 V |
Pinout & Package
SOL-16 surface-mount package (SOIC-DW, 16-pin), RoHS-compliant, MSL Level-3 (260°C peak reflow), –40°C to +85°C operating range.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 2, 3 | VO1, NC, NC | Pin 1 = primary output; Pins 2 & 3 = no internal connection - must be left floating or grounded per layout best practice |
| 4, 5 | V–IN, V+IN | Differential input terminals - high-impedance (10¹⁰ Ω || 6 pF); require bias current return path |
| 6, 7 | VOS Adj, VOS Adj | Laser-trimmed offset adjustment nodes - unused in standard operation; shorted together if trimming required |
| 8, 9, 10 | V–, VO2, Ref | V– = negative supply; VO2 = secondary output (not used in basic config); Ref = output reference node (typically grounded) |
| 11, 12 | VO, Feedback | VO = main output; Feedback = must connect directly to VO pin for stable operation and optimal accuracy |
| 13, 14 | V+, Digital Ground | V+ = positive supply; Digital Ground = dedicated low-noise return for A0/A1 logic - isolate from analog ground |
| 15, 16 | A0, A1 | Gain select address inputs - TTL/CMOS compatible; logic state changes gain immediately (no latching) |
Key Features
| Feature | Design Value |
|---|---|
| Digitally programmable gain | Four precise, factory-laser-trimmed gains eliminate manual calibration and external resistor networks |
| Over-voltage protected inputs | Withstands ±40 V differential or common-mode input faults without damage or latch-up |
| Separate digital ground | Dedicated Pin 14 prevents digital switching noise from degrading analog CMRR and offset stability |
| Ref pin for output level control | Allows output common-mode voltage to be set independently - essential for single-supply ADC interfacing |
| Internal feedback connection point | Pin 12 enables Kelvin sensing at the load to cancel PCB trace resistance errors in precision applications |
Applications
| Strain Gauge Data Acquisition | Medical ECG Front-End |
|---|---|
Use Scenario: Amplifying microvolt-level Wheatstone bridge outputs from load cells or pressure sensors in industrial test equipment. IC Role / Device Role / Timing Role: Precision instrumentation amplifier providing programmable gain to match varying sensor sensitivities and ADC input ranges. Use Value: 50 µV offset and 115 dB CMRR enable resolution of <1 µV signals amid 10 V common-mode noise from motor drives or power supplies. | Use Scenario: Conditioning low-amplitude, high-impedance biopotential signals from patient electrodes in portable ECG monitors. IC Role / Device Role / Timing Role: First-stage gain and common-mode rejection before filtering and digitization; gain selected dynamically per lead configuration. Use Value: ±40 V input protection safeguards against defibrillation pulses; 2 nA input bias avoids electrode polarization errors in DC-coupled designs. |
| Programmable Sensor Interface Board | Automated Test Equipment (ATE) |
Use Scenario: Modular analog input card supporting multiple sensor types (RTD, thermocouple, LVDT) via software-selectable gain. IC Role / Device Role / Timing Role: Reconfigurable gain block enabling one hardware design to serve diverse measurement ranges without component change. Use Value: G=1 to G=1000 range covers ±10 mV to ±10 V inputs; digital A0/A1 control integrates seamlessly with FPGA-based system controllers. | Use Scenario: High-channel-count DAQ system performing millivolt-level voltage measurements across DUTs under varying environmental conditions. IC Role / Device Role / Timing Role: Precision gain stage with temperature-stable offset (0.25 µV/°C) ensuring calibration validity across –40°C to +85°C operating range. Use Value: Laser-trimmed drift performance eliminates need for frequent recalibration during thermal soak tests or production burn-in. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar programmable-gain instrumentation amplifier applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| INA128UA | Fixed gain (10–10,000 V/V via single external resistor); no digital gain control; lower quiescent current (700 µA) | Requires manual resistor change per gain setting; unsuitable for dynamic gain switching | Select when gain is static and ultra-low power is critical; not a drop-in replacement for PGA204AU's digital interface |
| AD8253ARMZ | Gain controlled via SPI interface (not parallel A0/A1); 10 µV max offset; integrated reference buffer; 1 MSPS bandwidth at G=1 | Requires serial communication overhead; supports higher-speed multiplexed channel scanning | Select when system already uses SPI peripherals and needs faster settling (<1 µs) or integrated reference support |
Compared with INA128UA and AD8253ARMZ, the PGA204AU uniquely provides parallel TTL/CMOS gain selection with zero external components, making it optimal for deterministic, low-latency gain changes in resource-constrained embedded DAQ systems without SPI infrastructure.
Availability
PGA204AU is available at Aetrix Electronics and suitable for data acquisition systems, medical instrumentation, and industrial sensor interfaces requiring stable component supply, long-term lifecycle support, and RoHS-compliant surface-mount packaging.
Supply support for PGA204AU includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments acquired Burr-Brown in 2000 and maintains legacy precision analog product lines including the PGA204 series.
The PGA204 product line was designed for cost-sensitive, high-accuracy analog signal conditioning in data acquisition and instrumentation applications where programmability, robustness, and ease of use outweigh ultra-high-speed or ultra-low-power requirements.
FAQ
What gain settings does the PGA204AU support, and how are they selected?
The PGA204AU supports four discrete gain settings: 1, 10, 100, and 1000 V/V. These are selected using the logic states of address pins A0 (Pin 15) and A1 (Pin 16) per the truth table in the datasheet. No external components or latching circuitry is required - gain changes occur immediately upon logic transition. This behavior is confirmed for the exact PGA204AU part number in the "Digital Inputs" section of the official datasheet.
Does the PGA204AU require an external logic supply voltage for its digital inputs?
No, the PGA204AU does not require a separate logic supply. Its A0 and A1 inputs are TTL/CMOS-compatible and reference digital ground (Pin 14), which can be connected anywhere between V– and (V+)–4 V. The device draws only ~1 µA from each digital input at logic low, eliminating need for level translators. This feature is explicitly stated in the "DIGITAL LOGIC" specifications table for PGA204AU.
Can the PGA204AU operate from a single supply, and how is the output referenced?
Yes, the PGA204AU can operate from split supplies (±4.5 V to ±18 V) or asymmetric supplies, but it is not designed for true single-supply operation (e.g., 0 V and +15 V). Output common-mode level is set by the Ref pin (Pin 10), which must be driven by a low-impedance source - typically ground or a precision reference. A 5 Ω series resistance on Ref degrades CMRR to ~80 dB, so proper grounding is essential. This requirement applies identically to the PGA204AU variant.
What is the maximum safe input voltage for the PGA204AU, and does it apply with no power applied?
The PGA204AU supports ±40 V absolute maximum input voltage on either input terminal - even when unpowered. Internal over-voltage protection circuitry limits input current to ~1.5 mA under overload, preventing damage. This rating is specified in the Absolute Maximum Ratings table and confirmed for PGA204AU in the "INPUT PROTECTION" application note section. It applies independently to each input (e.g., +40 V on V+IN and –40 V on V–IN simultaneously).
Is the PGA204AU pin-compatible with the PGA205AU, and what is the key functional difference?
No, the PGA204AU and PGA205AU share identical pinout and package (SOL-16), but differ fundamentally in gain architecture: PGA204AU provides G=1/10/100/1000, while PGA205AU provides G=1/2/4/8. Their internal resistor networks and CMRR vs. gain profiles are optimized separately. Substituting one for the other requires logic-level reconfiguration and validation of signal chain bandwidth and offset performance - they are not functionally interchangeable despite mechanical compatibility.
PGA204AU Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 16-SOIC (0.295", 7.50mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Amplifier Type:
- Instrumentation
- Number of Circuits:
- 1
- Output Type:
- -
- Slew Rate:
- 0.7V/µs
- Gain Bandwidth Product:
- -
- -3db Bandwidth:
- 1 MHz
- Current - Input Bias:
- 500 pA
- Voltage - Input Offset:
- 25 µV
- Current - Supply:
- 5.2mA
- Current - Output / Channel:
- 23 mA
- Voltage - Supply Span (Min):
- 9 V
- Voltage - Supply Span (Max):
- 36 V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-SOIC
PGA204AU FAQ
1.How can I place an order for PGA204AU through Aetrix?
Please submit a Request for Quotation (RFQ) for PGA204AU on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for PGA204AU reliable?
The price and inventory of PGA204AU are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PGA204AU is usually 5 days.
3.What payment methods are accepted for PGA204AU?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PGA204AU transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for PGA204AU?
PGA204AU orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your PGA204AU order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for PGA204AU?
For technical support, including PGA204AU datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PGA204AU requirements.
6.How does Aetrix verify that PGA204AU is sourced from the original manufacturer or authorized distributors?
All PGA204AU products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PGA204AU meets industry standards.
7.What is the process for return or replacement of PGA204AU?
All PGA204AU units undergo pre-shipment inspection (PSI). If there is an issue with PGA204AU, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The PGA204AU part is unused and in its original packaging.
Return procedure for PGA204AU:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
PGA204AU Tags

-
LM358DT
STMicroelectronics

-
LM358DR
Texas Instruments

-
LM2904DR
Texas Instruments

-
LM358ADR
Texas Instruments
-
LM2904DGKR
Texas Instruments
-
LM324DR
Texas Instruments

-
MCP6006T-E/OT
Microchip Technology

-
MCP6006UT-E/OT
Microchip Technology

-
LM324PWR
Texas Instruments

-
LM2902PWR
Texas Instruments
-
LM2902DR
Texas Instruments

-
LM358P
Texas Instruments
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

