Texas Instruments PGA205AP
- Part No.:
- PGA205AP
- Manufacturer:
- Texas Instruments
- Category:
- Instrumentation, Op Amps, Buffer Amps
- Package:
- 16-DIP (0.300", 7.62mm)
- Datasheet:
-
PGA205AP.pdf
- Description:
- IC INST AMP 1 CIRCUIT 16DIP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
PGA205AP from Burr-Brown (now Texas Instruments) is a digitally programmable gain instrumentation amplifier with fixed gain options of 1, 2, 4, and 8 V/V, ±50 µV max input offset voltage, 0.25 µV/°C drift, and 16-pin plastic DIP package. It operates from ±4.5V to ±18V supplies and is used in precision data acquisition systems where low-noise, high-CMRR signal conditioning of sensor outputs is required.
For engineers reviewing the PGA205AP datasheet, PGA205AP pinout, PGA205AP application, or PGA205AP equivalent, key selection considerations include its 8-V/V maximum gain, 100 kHz bandwidth at G=8, ±40V input overvoltage protection, and compatibility with TTL/CMOS digital control lines A0/A1 without requiring a separate logic supply.
Technical Context
The PGA205AP integrates three op-amps (A1, A2, A3) in a classic three-op-amp instrumentation topology with digitally switched internal feedback resistors. Gain selection is performed via two unbuffered TTL/CMOS-compatible address inputs (A0, A1), directly controlling resistor networks that set the overall closed-loop gain.
It features laser-trimmed input stage offset (±50 µV max), internal overvoltage protection on both inputs (±40V survivable), and output referenced to a dedicated Ref pin-requiring low-impedance grounding for >112 dB CMRR at G=8. The device supports operation from –40°C to +85°C and draws ±5.2 mA quiescent current at ±15V.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Gain Options | 1, 2, 4, 8 V/V - discrete, digitally selected values; no interpolation or analog adjustment. |
| Input Offset Voltage | ±50 µV max (RTI) - enables sub-mV-level DC accuracy in bridge or thermocouple sensing. |
| CMRR | 112 dB min at G=8 - ensures rejection of common-mode noise in noisy industrial environments. |
| Bandwidth (–3 dB) | 100 kHz at G=8 - supports dynamic signals up to ~10 kHz with <0.1% gain error. |
| Slew Rate | 0.7 V/µs typ at G=8 - limits full-scale step response time to ~28 µs for 10V output swing. |
| Input Overvoltage Protection | ±40 V - allows direct connection to transducers or sensors without external clamping diodes. |
| Supply Range | ±4.5 V to ±18 V - supports battery-powered (±5V) and industrial (±15V) rails. |
Pinout & Package
PGA205AP is housed in a 16-pin plastic dual in-line package (PDIP, package number 180), through-hole mountable, with 0.3-inch body width and standard 0.1-inch pin spacing.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (VO1) | Output of first input amplifier (A1) | Internal node; not user-accessible; used only for internal feedback and overload detection. |
| 2, 3 (NC) | No internal connection | Unbonded die pads; must remain unconnected and unstubbed on PCB. |
| 4 (V–IN) | Inverting input terminal | Differential input pin; accepts negative-side sensor signal; protected to ±40V. |
| 5 (V+IN) | Non-inverting input terminal | Differential input pin; accepts positive-side sensor signal; protected to ±40V. |
| 6, 7 (VOS Adj) | Input offset trim terminals | Connect external potentiometer (200kΩ–1MΩ) to null input-stage offset; laser-trimmed so rarely needed. |
| 8 (V–) | Negative power supply | Must be connected to system V– rail; also serves as substrate bias reference. |
| 9 (VO2) | Output of second input amplifier (A2) | Internal node; not user-accessible; used only for internal feedback and overload detection. |
| 10 (Ref) | Output reference terminal | Defines output common-mode level; must be tied to low-impedance ground (<5 Ω) for full CMRR. |
| 11 (VO) | Main output terminal | Final amplified output; swing limited to (V+)–1.3V / (V–)+1.3V at temperature extremes. |
| 12 (Feedback) | Output feedback connection | Must be shorted to VO (pin 11); enables remote-sensing configuration when routed to load. |
| 13 (V+) | Positive power supply | Must be connected to system V+ rail; supplies all internal amplifiers and protection circuitry. |
| 14 (Digital Ground) | Digital reference for A0/A1 inputs | May be tied to analog ground or floated between V– and (V+)–4V; carries ~1.3 mA return current. |
| 15 (A0) | LSB gain select input | TTL/CMOS-compatible; logic high >2V above Digital Ground; unbuffered, draws ~1 µA when low. |
| 16 (A1) | MSB gain select input | TTL/CMOS-compatible; logic high >2V above Digital Ground; unbuffered, draws ~1 µA when low. |
Key Features
| Feature | Design Value |
|---|---|
| No logic supply required | Digital inputs A0/A1 operate directly from system analog supplies-eliminates need for separate 5V rail or level shifters. |
| ±40V input overvoltage protection | Withstands fault conditions beyond supply rails without latch-up or damage-reduces need for external protection components. |
| Laser-trimmed offset and drift | ±50 µV max offset and ±0.25 µV/°C drift enable stable DC measurements across industrial temperature range without recalibration. |
| 16-pin PDIP package | Standard through-hole footprint supports prototyping, manual assembly, and legacy board compatibility without rework. |
| 112 dB CMRR at G=8 | High common-mode rejection preserves signal integrity in electrically noisy environments such as motor drives or PLC I/O modules. |
Applications
| Data Acquisition Systems | Medical Instrumentation |
|---|---|
Use Scenario: Digitizing low-level outputs from strain-gauge bridges in industrial weigh scales or pressure transducers. IC Role / Device Role / Timing Role: Precision front-end gain stage that conditions mV-level differential signals before ADC sampling. Use Value: 8-V/V max gain and 100 kHz bandwidth support 10-bit+ resolution at 10 kSPS while rejecting 50/60 Hz line noise via high CMRR. | Use Scenario: Amplifying ECG electrode signals with minimal added noise and drift in portable patient monitors. IC Role / Device Role / Timing Role: First-stage instrumentation amplifier providing adjustable gain and robust input protection against defibrillation pulses. Use Value: ±40V input rating withstands clinical surge events; 0.25 µV/°C drift ensures stable baseline over patient-warm-up periods. |
| General Purpose Analog Boards | Test & Measurement Equipment |
Use Scenario: Modular signal conditioning on rack-mounted DAQ cards used in lab automation and calibration systems. IC Role / Device Role / Timing Role: Reconfigurable gain block enabling single hardware design to support multiple sensor types (RTD, thermocouple, LVDT). Use Value: Digital A0/A1 control allows host MCU to auto-configure gain per channel-reducing firmware complexity and BOM count. | Use Scenario: Input stage of handheld multimeters or portable oscilloscope front-ends measuring microvolt-level signals. IC Role / Device Role / Timing Role: High-accuracy, low-drift gain element preceding precision ADC and auto-ranging circuitry. Use Value: Laser-trimmed offset enables factory calibration stability over 1 year; 0.4 µVP-P 0.1–10 Hz noise supports true 5½-digit resolution. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar programmable-gain instrumentation amplifier applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| INA128UA | Fixed gain (5–10,000 V/V via external RG); no digital control; lower max gain (1000 V/V), higher CMRR (130 dB), lower noise (7 nV/√Hz @ 1 kHz). | Requires manual resistor change or DAC-controlled RG for gain adjustment; unsuitable for rapid digital switching. | Select when absolute DC precision and ultra-low noise outweigh need for digital gain control. |
| AD8253ARMZ | Digitally programmable (1/10/100/1000 V/V); SPI interface; rail-to-rail output; higher bandwidth (3 MHz @ G=1); requires 3.3V logic supply. | Needs external 3.3V logic rail and SPI controller; superior speed but higher quiescent current (1.2 mA vs 5.2 mA). | Select when system already includes SPI infrastructure and requires faster settling (<1 µs) or rail-to-rail output swing. |
Compared with INA128UA and AD8253ARMZ, the PGA205AP uniquely delivers TTL/CMOS-compatible digital gain control without auxiliary logic supplies or serial interfaces-making it optimal for simple, low-cost, through-hole-based analog front-ends where moderate bandwidth and proven industrial reliability are prioritized.
Availability
PGA205AP is available at Aetrix Electronics and suitable for data acquisition systems, medical instrumentation, general-purpose analog boards, and test equipment requiring stable component supply with long-term industrial temperature support (–40°C to +85°C).
Supply support for PGA205AP includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Burr-Brown Corporation, acquired by Texas Instruments in 2000, specialized in high-precision analog ICs including instrumentation amplifiers, data converters, and op-amps for measurement and control systems.
The PGA204/205 product line was designed specifically for cost-sensitive, high-accuracy analog signal conditioning in industrial and medical data acquisition-emphasizing digital programmability, input ruggedness, and laser-trimmed DC performance in standard packages.
FAQ
What gain settings does the PGA205AP support?
The PGA205AP supports four discrete, digitally selectable gains: 1 V/V, 2 V/V, 4 V/V, and 8 V/V. These are selected using the binary combination of logic inputs A0 and A1 (00 = 1×, 01 = 2×, 10 = 4×, 11 = 8×). Unlike the PGA204AP, the PGA205AP does not support gains of 10, 100, or 1000 V/V. This fixed low-gain range makes the PGA205AP ideal for applications requiring modest amplification with high bandwidth and low noise.
Does the PGA205AP require a separate logic supply voltage?
No, the PGA205AP does not require a separate logic supply. Its digital inputs A0 and A1 are TTL/CMOS-compatible and reference to the Digital Ground (pin 14), which can be connected anywhere between V– and (V+)–4V. The device draws only ~1 µA from each logic input when low, and nearly zero when high-enabling direct interfacing with microcontrollers or FPGAs operating at 3.3V or 5V without level-shifting circuitry. This simplifies design and reduces BOM count.
How is the output reference (Ref) pin used in the PGA205AP?
The Ref pin (pin 10) defines the output common-mode voltage level of the PGA205AP. It must be connected to a low-impedance ground (ideally <5 Ω) to achieve specified CMRR (up to 112 dB at G=8). If a series resistance >5 Ω is introduced, CMRR degrades significantly-e.g., to ~80 dB. The Ref pin may also accept an external offset voltage (e.g., from a buffered DAC) to level-shift the output, but this requires maintaining low impedance to preserve AC performance and CMRR.
What is the purpose of pins 6 and 7 (VOS Adj) on the PGA205AP?
Pins 6 and 7 are dedicated input offset voltage trim terminals for the PGA205AP's first-stage amplifiers (A1 and A2). They allow fine adjustment of input-stage offset using an external potentiometer (200kΩ–1MΩ). Because the device is laser-trimmed to ±50 µV max, external trimming is rarely needed-but when required, it should be performed at highest gain (G=8) with inputs grounded. Trimming here affects only input-stage offset and avoids degrading temperature drift, unlike output-stage adjustments.
Can the PGA205AP operate from a single supply?
No, the PGA205AP is specified only for dual-supply operation (±4.5V to ±18V). Its internal architecture-including input amplifiers A1 and A2 and output amplifier A3-requires symmetrical positive and negative rails to maintain linear input common-mode range (±12.7V) and full output swing. Attempting single-supply operation (e.g., 0V and +15V) will result in input saturation, degraded CMRR, and loss of specified performance. For single-supply applications, consider rail-to-rail alternatives like the AD8237 or INA333.
PGA205AP Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 16-DIP (0.300", 7.62mm)
- Packaging:
- Bulk
- Product Status:
- Active
- Amplifier Type:
- Instrumentation
- Number of Circuits:
- 1
- Output Type:
- -
- Slew Rate:
- 0.7V/µs
- Gain Bandwidth Product:
- -
- -3db Bandwidth:
- 1 MHz
- Current - Input Bias:
- 500 pA
- Voltage - Input Offset:
- 25 µV
- Current - Supply:
- 5.2mA
- Current - Output / Channel:
- 23 mA
- Voltage - Supply Span (Min):
- 9 V
- Voltage - Supply Span (Max):
- 36 V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Through Hole
- Supplier Device Package:
- 16-PDIP
PGA205AP FAQ
1.How can I place an order for PGA205AP through Aetrix?
Please submit a Request for Quotation (RFQ) for PGA205AP on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for PGA205AP reliable?
The price and inventory of PGA205AP are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PGA205AP is usually 5 days.
3.What payment methods are accepted for PGA205AP?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PGA205AP transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for PGA205AP?
PGA205AP orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your PGA205AP order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for PGA205AP?
For technical support, including PGA205AP datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PGA205AP requirements.
6.How does Aetrix verify that PGA205AP is sourced from the original manufacturer or authorized distributors?
All PGA205AP products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PGA205AP meets industry standards.
7.What is the process for return or replacement of PGA205AP?
All PGA205AP units undergo pre-shipment inspection (PSI). If there is an issue with PGA205AP, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The PGA205AP part is unused and in its original packaging.
Return procedure for PGA205AP:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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