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Texas Instruments PGA205AU/1K
- Part No.:
- PGA205AU/1K
- Manufacturer:
- Texas Instruments
- Category:
- Instrumentation, Op Amps, Buffer Amps
- Package:
- 16-SOIC (0.295", 7.50mm Width)
- Datasheet:
-
PGA205AU/1K.pdf
- Description:
- IC INST AMP 1 CIRCUIT 16SOIC
- Quantity:
- Payment:
- Shipping:
Inventory:925
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Product details
Overview
PGA205AU/1K from Texas Instruments (formerly Burr-Brown) is a digitally programmable gain instrumentation amplifier with fixed gain options of 1, 2, 4, and 8 V/V, ±50 µV max input offset voltage, 0.25 µV/°C drift, and 16-pin SOIC (DW) package rated for –40°C to +85°C operation. It serves as a precision front-end signal conditioner in data acquisition systems interfacing low-level sensor outputs.
For engineers reviewing the PGA205AU/1K datasheet, PGA205AU/1K pinout, PGA205AU/1K application, or PGA205AU/1K equivalent, key selection considerations include its TTL/CMOS-compatible digital gain control (A0/A1), ±40V input overvoltage protection, 100 kHz bandwidth at G=8, 0.7 V/µs slew rate, and dual-supply operation down to ±4.5V for battery-powered instrumentation.
Technical Context
The PGA205AU/1K implements a three-op-amp instrumentation architecture with digitally switched internal feedback networks to select gain. Its input stage (A1/A2) provides high common-mode rejection (up to 112 dB at G=8), while the output difference amplifier (A3) delivers rail-to-rail compatible swing and overload recovery in 70 µs.
Digital inputs A0 and A1 directly interface TTL/CMOS logic without requiring a separate logic supply; digital ground (pin 14) is configurable between V– and (V+)–4V. Gain switching is asynchronous and immediate-no latching required-with settling time of 28 µs to 0.01% at G=8.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Gains | 1, 2, 4, 8 V/V - discrete, digitally selected values; no interpolation or analog tuning. |
| Input Offset Voltage | ±50 µV max - enables sub-mV-level DC measurement accuracy without external trimming. |
| Offset Drift | 0.25 µV/°C - ensures stable baseline in temperature-varying industrial environments. |
| CMRR | 112 dB at G=8 - rejects common-mode noise from long sensor cables or noisy power domains. |
| Bandwidth | 100 kHz at G=8 - supports dynamic signals up to ~10 kHz full-scale with <0.1% gain error. |
| Slew Rate | 0.7 V/µs - limits large-signal transient distortion and supports fast step response in closed-loop systems. |
| Supply Range | ±4.5V to ±18V - allows direct integration into ±5V, ±12V, or ±15V legacy analog subsystems. |
Pinout & Package
PGA205AU/1K is housed in a 16-pin SOIC (DW) surface-mount package (JEDEC MS-013AC, 7.5 mm × 10.3 mm, 1.27 mm pitch), RoHS-compliant, MSL Level-3 rated.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (VO1) | Output of first input amplifier (A1) | Internal node; not user-accessible-used only for internal feedback and overvoltage protection. |
| 2, 3 (NC) | No internal connection | Unbonded die pads; must be left floating or tied to ground per layout best practice. |
| 4 (V–IN) | Inverting input | High-impedance (10¹⁰ Ω || 6 pF) differential input terminal; accepts ±40V safe input voltage. |
| 5 (V+IN) | Non-inverting input | Identical impedance and protection as V–IN; forms differential pair with pin 4. |
| 6, 7 (VOS Adj) | Input offset trim terminals | Laser-trimmed; external 200kΩ–1MΩ potentiometer connects across pins 6–7 to null input-stage offset. |
| 8 (V–) | Negative power supply | Must be connected to clean, low-impedance negative rail; supplies all internal amplifiers. |
| 9 (VO2) | Output of second input amplifier (A2) | Internal node; not user-accessible-used only for internal feedback and overvoltage protection. |
| 10 (Ref) | Output reference | Defines output common-mode level; must be low-impedance (≤5 Ω) to preserve CMRR. |
| 11 (VO) | Main output | Final amplified, gain-scaled output; drives loads ≥2 kΩ with ±10V swing on ±15V supplies. |
| 12 (Feedback) | Output feedback sense | Must be shorted to VO (pin 11); enables remote sensing at load to eliminate PCB trace errors. |
| 13 (V+) | Positive power supply | Must be connected to clean, low-impedance positive rail; decoupling recommended near pin. |
| 14 (Digital Ground) | Digital reference for A0/A1 | Configurable from V– to (V+)–4V; isolate from analog ground to prevent digital noise coupling. |
| 15 (A0) | Gain select LSB | TTL/CMOS-compatible; logic "1" = >2V above digital ground; draws ~1 µA when low. |
| 16 (A1) | Gain select MSB | Same electrical specs as A0; together with A0, selects one of four fixed gains per truth table. |
Key Features
| Feature | Design Value |
|---|---|
| Digitally programmable gain | Four precise, factory-laser-trimmed gain settings (1/2/4/8 V/V) selected by two logic inputs-no external resistors or calibration needed. |
| ±40V input overvoltage protection | Robust input clamping survives fault conditions beyond supply rails-eliminates need for external TVS or series resistors in harsh industrial I/O. |
| Low-drift, low-offset architecture | 50 µV max offset and 0.25 µV/°C drift enable high-resolution DC measurements without periodic recalibration. |
| Single-supply-compatible operation | Digital inputs accept logic levels referenced to configurable digital ground-enables seamless interface with 3.3V or 5V microcontrollers even under split-supply analog rails. |
| Internal laser trimming | Eliminates need for external offset trim in most applications; optional external adjustment available via pins 6/7 for system-level nulling. |
Applications
| Medical ECG Front-End | Industrial Bridge Sensor Interface |
|---|---|
Use Scenario: Amplifying microvolt-level differential signals from electrode pairs in portable ECG monitors with battery-powered operation. IC Role / Device Role / Timing Role: Precision instrumentation amplifier providing programmable gain staging before ADC sampling at 1–2 kHz. Use Value: ±40V input protection prevents damage from defibrillation pulses; low 0.25 µV/°C drift maintains baseline stability during patient movement-induced thermal gradients. | Use Scenario: Conditioning output from strain-gauge or pressure transducer bridges in PLC analog input modules. IC Role / Device Role / Timing Role: High-CMRR signal conditioner rejecting 50/60 Hz mains noise and enabling ratiometric measurement against bridge excitation voltage. Use Value: 112 dB CMRR at G=8 suppresses common-mode interference from shared industrial power buses; ±4.5V min supply supports wide-input-range 24V-powered field devices. |
| Data Acquisition Channel | Portable Test Equipment |
Use Scenario: Multi-channel DAQ system acquiring mixed-signal sensor data (thermocouples, RTDs, accelerometers) with software-selectable gain per channel. IC Role / Device Role / Timing Role: Digitally reconfigurable front-end amplifier allowing dynamic range optimization without hardware changes. Use Value: Asynchronous A0/A1 control enables real-time gain switching between samples; 28 µs 0.01% settling ensures accurate multi-rate sampling without inter-channel crosstalk. | Use Scenario: Handheld multimeter or oscilloscope probe amplifier requiring compact size, low power, and robust input handling. IC Role / Device Role / Timing Role: Input gain stage scaling unknown input ranges (mV to V) prior to digitization, with auto-ranging logic driving A0/A1. Use Value: SOIC-16 package fits space-constrained handheld enclosures; ±4.5V operation extends battery life vs. ±15V alternatives; 100 kHz bandwidth supports AC-coupled RMS measurement up to 10 kHz. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar programmable-gain instrumentation amplifier applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| INA128UA | Fixed gain (10–10,000 V/V via single resistor); no digital control; lower quiescent current (700 µA). | Requires manual gain configuration per board; unsuitable for dynamic gain switching or auto-ranging systems. | Select when gain is static and ultra-low power is critical; avoid if digital reconfiguration or fast settling is required. |
| AD8253ARMZ | Programmable gain (1–100 V/V in 1–2–5–10 steps); SPI interface; higher bandwidth (3 MHz at G=1); integrated reference buffer. | Requires SPI host controller and additional decoupling; supports higher-speed acquisition but adds firmware complexity. | Select for high-bandwidth, multi-channel synchronized gain control; avoid if only two digital lines are available or SPI overhead is unacceptable. |
Compared with INA128UA and AD8253ARMZ, PGA205AU/1K uniquely balances TTL/CMOS simplicity, robust ±40V input tolerance, and 100 kHz bandwidth at G=8-making it optimal for cost-sensitive, medium-speed industrial DAQ where digital gain agility matters more than ultra-low power or SPI-based configurability.
Availability
PGA205AU/1K is available at Aetrix Electronics and suitable for medical instrumentation, industrial sensor interfaces, portable test equipment, and data acquisition systems requiring stable component supply with guaranteed long-term sourcing.
Supply support for PGA205AU/1K includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments acquired Burr-Brown in 2000 and maintains full production, qualification, and technical support for the PGA204/205 family.
The PGA204/205 product line was designed specifically for precision analog signal conditioning in cost-sensitive, general-purpose instrumentation-emphasizing ease of use, rugged input protection, and minimal external components.
FAQ
What gain options does the PGA205AU/1K support, and how are they selected?
The PGA205AU/1K supports four discrete gain settings: 1, 2, 4, and 8 V/V. These are selected using two TTL/CMOS-compatible digital inputs-A0 (pin 15) and A1 (pin 16)-with no external logic supply required. The gain is updated asynchronously upon input change, and settling to 0.01% occurs in 28 µs at G=8. This behavior is explicitly specified in the PGA205AU/1K datasheet's settling time table and logic interface section.
Does the PGA205AU/1K require an external reference voltage?
No, the PGA205AU/1K does not require an external reference voltage for basic operation. Its Ref pin (pin 10) sets the output common-mode level and should be connected to a low-impedance ground or system reference point. An external voltage applied to Ref is algebraically summed with the amplified signal-useful for offset injection-but is optional. All specifications for the PGA205AU/1K assume Ref is grounded unless otherwise noted in test conditions.
Can the PGA205AU/1K operate from a single supply?
The PGA205AU/1K is designed for dual-supply operation (±4.5V to ±18V) and does not support true single-supply operation. Its input common-mode range extends to within 2.3V of either rail, and output swing is symmetric about Ref. While the digital inputs tolerate a wide VDG range (V– to V+–4V), the analog core requires both positive and negative supplies to maintain linearity and specified CMRR. This limitation is confirmed across all PGA205AU/1K electrical characteristics tables.
What is the purpose of the Feedback pin (pin 12) on the PGA205AU/1K?
The Feedback pin (pin 12) on the PGA205AU/1K must be connected directly to the main output (VO, pin 11) for normal operation. This connection closes the internal feedback loop of the output difference amplifier (A3). It can also be routed to the load to enable remote sensing-compensating for voltage drop across PCB traces or connectors-and thereby improving absolute output accuracy. This requirement is explicitly stated in the PGA205AU/1K application information section.
Is the PGA205AU/1K pin-compatible with the PGA204AU/1K?
Yes, the PGA205AU/1K is pin-compatible with the PGA204AU/1K-both use identical 16-pin SOIC (DW) packages and share identical pin functions and electrical interfaces. However, their gain tables differ: PGA204AU/1K offers 1/10/100/1000 V/V, while PGA205AU/1K offers 1/2/4/8 V/V. Swapping them requires corresponding firmware or logic updates to A0/A1 drive signals to avoid incorrect gain selection.
PGA205AU/1K Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 16-SOIC (0.295", 7.50mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Amplifier Type:
- Instrumentation
- Number of Circuits:
- 1
- Output Type:
- -
- Slew Rate:
- 0.7V/µs
- Gain Bandwidth Product:
- -
- -3db Bandwidth:
- 1 MHz
- Current - Input Bias:
- 500 pA
- Voltage - Input Offset:
- 25 µV
- Current - Supply:
- 5.2mA
- Current - Output / Channel:
- 23 mA
- Voltage - Supply Span (Min):
- 9 V
- Voltage - Supply Span (Max):
- 36 V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-SOIC
PGA205AU/1K FAQ
1.How can I place an order for PGA205AU/1K through Aetrix?
Please submit a Request for Quotation (RFQ) for PGA205AU/1K on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for PGA205AU/1K reliable?
The price and inventory of PGA205AU/1K are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PGA205AU/1K is usually 5 days.
3.What payment methods are accepted for PGA205AU/1K?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PGA205AU/1K transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for PGA205AU/1K?
PGA205AU/1K orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your PGA205AU/1K order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for PGA205AU/1K?
For technical support, including PGA205AU/1K datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PGA205AU/1K requirements.
6.How does Aetrix verify that PGA205AU/1K is sourced from the original manufacturer or authorized distributors?
All PGA205AU/1K products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PGA205AU/1K meets industry standards.
7.What is the process for return or replacement of PGA205AU/1K?
All PGA205AU/1K units undergo pre-shipment inspection (PSI). If there is an issue with PGA205AU/1K, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The PGA205AU/1K part is unused and in its original packaging.
Return procedure for PGA205AU/1K:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
PGA205AU/1K Tags
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