Texas Instruments PGA205BP

Overview

PGA205BP from Burr-Brown (now Texas Instruments) is a digitally programmable gain instrumentation amplifier with fixed gain options of 1, 2, 4, and 8 V/V, ±50 µV max input offset voltage, 0.25 µV/°C offset drift, and 16-pin plastic DIP package. It operates from ±4.5V to ±18V supplies and is used in precision data acquisition systems where low-noise, high-CMRR signal conditioning of sensor outputs is required.

For engineers reviewing the PGA205BP datasheet, PGA205BP pinout, PGA205BP application, or PGA205BP equivalent, key selection considerations include its 8-V/V maximum gain, 100 kHz bandwidth at G=8, ±40V input overvoltage protection, and compatibility with TTL/CMOS logic without external supply for digital control lines A0/A1.

Technical Context

The PGA205BP integrates three op-amps (A1, A2, A3) in a classic three-op-amp instrumentation topology with digitally switched internal feedback resistors. Gain selection is performed via two unbuffered TTL/CMOS-compatible address inputs (A0, A1), directly controlling resistor networks that set the overall closed-loop gain without latching.

It features laser-trimmed input and output stages for low offset (±50 µV max) and drift (±0.25 µV/°C), internal overvoltage protection on both inputs (±40V survivable), and a dedicated Ref pin for output-level shifting. The device maintains 112 dB CMRR at G=8 and supports operation across –40°C to +85°C.

Key Specifications

Pinout & Package

PGA205BP is supplied in a 16-pin plastic DIP (dual in-line package), 0.300-inch wide body, with standard through-hole mounting and JEDEC MS-001AC footprint.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar programmable-gain instrumentation amplifier applications.

Compared with INA128P and AD8253ARZ, the PGA205BP uniquely delivers TTL/CMOS-compatible digital gain control in a through-hole DIP package with ±40V input protection and sub-µV/°C drift-ideal for legacy industrial designs requiring robust, low-complexity programmable gain.

Availability

PGA205BP is available at Aetrix Electronics and suitable for data acquisition systems, medical instrumentation, industrial process control, and test & measurement equipment requiring stable component supply with long-term obsolescence management.

Supply support for PGA205BP includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Burr-Brown Corporation, acquired by Texas Instruments in 2000, specialized in high-precision analog signal-conditioning ICs for industrial, medical, and test equipment markets.

The PGA204/205 product line was designed specifically for cost-sensitive, high-accuracy instrumentation applications requiring digitally selectable gain without external components or logic supply rails.

FAQ

What gain options does the PGA205BP support, and how are they selected?

The PGA205BP supports four discrete gain settings: 1, 2, 4, and 8 V/V. These are selected using two TTL/CMOS-compatible digital inputs-A0 (pin 15) and A1 (pin 16)-with logic states decoded per the truth table in the datasheet. No external clock or latch is required; gain changes occur immediately upon input transition, with settling completed within 28 µs at 0.01% error for G=8. The PGA205BP does not support intermediate or analog-adjusted gains.

Does the PGA205BP require a separate logic supply voltage for its A0 and A1 pins?

No, the PGA205BP does not require a separate logic supply. Its A0 and A1 inputs are compatible with standard TTL and CMOS logic levels referenced to its Digital Ground (pin 14), which can be tied to system ground or any potential between V– and (V+ – 4V). A logic "1" is defined as ≥2V above Digital Ground, and input current is ≤1 µA for logic "0", eliminating need for pull-up resistors in most cases. This simplifies design versus alternatives requiring dedicated I/O voltage rails.

What is the purpose of the Ref pin (pin 10) on the PGA205BP, and how should it be connected?

The Ref pin (pin 10) sets the DC reference level of the PGA205BP's output voltage. It must be connected to a low-impedance node-ideally ≤5 Ω-to maintain specified common-mode rejection ratio (CMRR). In most applications, Ref is grounded; however, it can be driven by a precision voltage source (e.g., buffered DAC output) to offset the output. Connecting a high-impedance source or series resistor degrades CMRR significantly (e.g., 5 Ω raises error to ~80 dB at G=1), so the PGA205BP's Ref pin demands careful layout attention.

Can the PGA205BP operate from a single supply, or is dual-supply operation mandatory?

The PGA205BP is specified and characterized for dual-supply operation (±4.5V to ±18V) and requires symmetric or asymmetric dual rails-V+ and V– must both be powered. It cannot operate from a true single supply (e.g., 0V and +15V) because its input common-mode range and output swing are centered around midsupply only when V+ and V– are referenced to a system ground. Attempting single-supply use results in saturation, loss of linearity, and undefined behavior. For single-supply applications, consider rail-to-rail input/output instrumentation amplifiers such as the INA333.

How does the PGA205BP's input overvoltage protection work, and what failure modes does it prevent?

The PGA205BP incorporates internal overvoltage protection circuitry on both V+IN and V–IN pins, allowing them to withstand up to ±40V continuously-even with no power applied. This protection limits input current to ~1.5 mA during overload, preventing junction damage, metal migration, or oxide breakdown. It safeguards against wiring errors, relay bounce, inductive kickback, and ESD events. Unlike external diode clamps, this integrated protection adds no series resistance or leakage, preserving the PGA205BP's 10¹⁰ Ω input impedance and low noise performance under normal operation.